The LT®1764 is a low dropout regulator optimized for fast
transient response. The device is capable of supplying 3A
of output current with a dropout voltage of 340mV. Operating quiescent current is 1mA, dropping to <1µA in
shutdown. Quiescent current is well controlled; it does not
rise in dropout as it does with many other regulators. In
addition to fast transient response, the LT1764 has very
low output voltage noise which makes the device ideal for
sensitive RF supply applications.
Output voltage range is from 1.21V to 20V. The LT1764
regulators are stable with output capacitors as low as 10µF.
Internal protection circuitry includes reverse battery protection, current limiting, thermal limiting and reverse current protection. The device is available in fixed output
voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable
device with a 1.21V reference voltage. The LT1764 regulators are available in 5-lead TO-220 and DD packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
3.3VIN to 2.5V
IN
V
> 3V
IN
10µF
LT1764-2.5
SHDN
OUT
SENSE
GND
Regulator
OUT
U
Dropout Voltage
400
350
300
2.5V
++
3A
10µF
1764 TA01
250
200
150
100
DROPOUT VOLTAGE (mV)
50
0
00.5
1.02.01.5
LOAD CURRENT (A)
2.5
3.0
1764 TA02
1764fa
1
Page 2
LT1764 Series
WW
W
ABSOLUTE MAXIMUM RATINGS
U
(Note 1)
IN Pin Voltage........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 12) ....... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
Quiescent Current in ShutdownVIN = 6V, V
Ripple RejectionVIN – V
= Off to On●0.92V
OUT
V
= On to Off●0.250.75V
OUT
= 0V0.011µA
SHDN
= 20V730µA
SHDN
= 0V0.011µA
SHDN
f
RIPPLE
= 1.5V (Avg), V
OUT
= 120Hz, I
LOAD
= 1.5A
RIPPLE
= 0.5V
= 1mA●2.510mV
LOAD
= 1mA●310mV
LOAD
= 1mA●410mV
LOAD
= 1mA●4.510mV
LOAD
= 1mA●210mV
LOAD
= 1mA to 3A37mV
= 1mA to 3A, –40°C ≤ TJ ≤ 110°C23mV
= 1mA to 2.7A, 110°C < TJ ≤ 125°C23mV
= 1mA to 3A48mV
= 1mA to 3A, –40°C ≤ TJ ≤ 110°C25mV
= 1mA to 2.7A, 110°C < TJ ≤ 125°C25mV
= 1mA to 3A410mV
= 1mA to 3A, –40°C ≤ TJ ≤ 110°C30mV
= 1mA to 2.7A, 110°C < TJ ≤ 125°C30mV
= 1mA to 3A412mV
= 1mA to 3A, –40°C ≤ TJ ≤ 110°C40mV
= 1mA to 2.7A, 110°C < TJ ≤ 125°C40mV
= 1mA to 3A25mV
= 1mA to 3A, –40°C ≤ TJ ≤ 110°C20mV
= 1mA to 2.7A, 110°C < TJ ≤ 125°C20mV
RMS
,5563dB
P-P
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3
Page 4
LT1764 Series
TEMPERATURE (°C)
–50
DROPOUT VOLTAGE (mV)
400
500
600
2575
1764 G03
300
200
–250
50100 125
100
0
IL = 3A
IL = 1.5A
IL = 0.5A
IL = 100mA
IL = 1mA
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
PARAMETERCONDITIONSMINTYPMAXUNITS
Current LimitVIN = 7V, V
LT1764-1.8, LT1764-2.5, LT1764-3.3
VIN = V
= V
V
IN
LT1764, LT1764-1.5
= 2.7V, ∆V
V
IN
= 2.7V, ∆V
V
IN
Input Reverse Leakage CurrentVIN = –20V, V
Reverse Output Current (Note 10) LT1764-1.5 V
LT1764-1.8 V
LT1764-2.5 V
LT1764-3.3 V
LT1764 (Note 3) V
= 0V4A
OUT
OUT(NOMINAL)
OUT(NOMINAL)
= –0.1V, –40°C ≤ TJ ≤ 110°C3.1A
OUT
= –0.1V, 110°C < TJ ≤ 125°C2.8A
OUT
= 0V●1mA
OUT
= 1.5V, VIN < 1.5V6001200µA
OUT
= 1.8V, VIN < 1.8V6001200µA
OUT
= 2.5V, VIN < 2.5V6001200µA
OUT
= 3.3V, VIN < 3.3V6001200µA
OUT
+ 1V, ∆V
+ 1V, ∆V
= 1.21V, VIN < 1.21V300600µA
OUT
= –0.1V, –40°C ≤ TJ ≤ 110°C3.1A
OUT
= –0.1V, 110°C < TJ ≤ 125°C2.8A
OUT
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1764 regulators are tested and specified under pulse load
conditions such that T
≈ TA. The LT1764 is 100% tested at TA = 25°C.
J
Performance at –40°C and 125°C is assured by design, characterization
and correlation with statistical process controls.
Note 3: The LT1764 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 4. Operating conditions are limited by maximum junction temperature.
The regulated output voltage specification will not apply for all possible
combinations of input voltage and output current. When operating at
maximum input voltage, the output current range must be limited. When
operating at maximum output current, the input voltage range must be
limited.
Note 5: To satisfy requirements for minimum input voltage, the LT1764
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of
2.42V. The external resistor divider will add a 300µA DC load on the output.
Note 6: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V
Note 7: GND pin current is tested with VIN = V
= 2.7V (whichever is greater) and a current source load. The GND pin
V
IN
current will decrease at higher input voltages.
Note 8: ADJ pin bias current flows into the ADJ pin.
Note 9: SHDN pin current flows into the SHDN pin.
Note 10: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 11. For the LT1764, LT1764-1.5 and LT1764-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.
Note 12. All combinations of absolute maximum input voltage and
absolute maximum output voltage cannot be achieved. The absolute
maximum differential from input to output is ±20V. For example, with
VIN = 20V, V
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
600
500
Guaranteed Dropout Voltage
700
= TEST POINTS
600
– V
IN
DROPOUT
cannot be pulled below ground.
OUT
Dropout Voltage
.
OUT(NOMINAL)
+ 1V or
400
300
200
DROPOUT VOLTAGE (mV)
100
0
4
0
TJ = 125°C
1.01.52.0
0.5
OUTPUT CURRENT (A)
TJ = 25°C
2.53.0
1764 G01
500
400
300
200
100
GUARANTEED DROPOUT VOLTAGE (mV)
0
0
TJ ≤ 125°C
TJ ≤ 25°C
0.51.0
OUTPUT CURRENT (A)
2.03.0
1.52.5
1764 G02
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Page 5
LT1764 Series
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
25
1756 G06
–25050
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
75 100 125
IL = 1mA
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent CurrentLT1764-1.8 Output VoltageLT1764-2.5 Output Voltage
1.4
LT1764-1.8/2.5/3.3
1.2
1.0
0.8
0.6
0.4
VIN = 6V
QUIESCENT CURRENT (mA)
0.2
0
–50
=
R
L
IL = 0
V
SHDN
–250
∞
= V
IN
TEMPERATURE (°C)
2575
LT1764
50100 125
1764 G04
LT1764-3.3 Output VoltageLT1764 ADJ Pin VoltageLT1764-1.8 Quiescent Current
3.38
IL = 1mA
3.36
3.34
3.32
3.30
3.28
OUTPUT VOLTAGE (V)
3.26
3.24
3.22
–25050
–50
25
TEMPERATURE (°C)
75 100 125
1756 G07
1.84
IL = 1mA
1.83
1.82
1.81
1.80
1.79
OUTPUT VOLTAGE (V)
1.78
1.77
1.76
–25050
–50
1.230
IL = 1mA
1.225
1.220
1.215
1.210
1.205
ADJ PIN VOLTAGE (V)
1.200
1.195
1.190
–25050
–50
25
TEMPERATURE (°C)
25
TEMPERATURE (°C)
75 100 125
1756 G05
75 100 125
1756 G08
40
TJ = 25°C
=
∞
R
35
L
V
= V
SHDN
30
25
20
15
10
QUIESCENT CURRENT (mA)
5
0
0
IN
246 1071359
INPUT VOLTAGE (V)
8
1764 G09
40
35
30
25
20
15
10
QUIESCENT CURRENT (mA)
5
0
LT1764-2.5 Quiescent CurrentLT1764-3.3 Quiescent CurrentLT1764 Quiescent Current
TJ = 25°C
R
=
∞
L
V
= V
SHDN
IN
246 1071359
0
INPUT VOLTAGE (V)
40
35
30
25
20
15
10
QUIESCENT CURRENT (mA)
5
8
1764 G10
0
246 1071359
0
INPUT VOLTAGE (V)
TJ = 25°C
R
=
∞
L
V
= V
SHDN
8
IN
1764 G11
1.6
TJ = 25°C
R
= 4.3k
1.4
L
= V
V
SHDN
1.2
1.0
0.8
0.6
0.4
QUIESCENT CURRENT (mA)
0.2
0
0
IN
48122014261018
INPUT VOLTAGE (V)
16
1764 G12
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Page 6
LT1764 Series
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LT1764-1.8 GND Pin CurrentLT1764-2.5 GND Pin CurrentLT1764-3.3 GND Pin Current
20.0
17.5
15.0
12.5
RL = 3.6Ω
I
= 500mA*
L
10.0
7.5
GND PIN CURRENT (mA)
5.0
2.5
0
RL = 18Ω
= 100mA*
I
L
3578246 10
10
INPUT VOLTAGE (V)
TJ = 25°C
= V
V
SHDN
*FOR V
RL = 6Ω
I
= 300mA*
L
OUT
IN
= 1.8V
9
1764 G13
40
35
30
25
RL = 5Ω
I
= 500mA*
L
20
15
GND PIN CURRENT (mA)
10
5
0
3578246 10
10
INPUT VOLTAGE (V)
RL = 25Ω
= 100mA*
I
L
TJ = 25°C
V
= V
SHDN
*FOR V
RL = 8.33Ω
I
L
IN
= 2.5V
OUT
= 300mA*
9
1764 G14
LT1764 GND Pin CurrentLT1764-1.8 GND Pin CurrentLT1764-2.5 GND Pin Current
15
TJ = 25°C
= V
V
SHDN
IN
*FOR V
12
OUT
= 1.21V
9
6
RL = 12.1Ω
= 100mA*
I
GND PIN CURRENT (mA)
3
L
RL = 2.42Ω
I
L
RL = 4.33Ω
= 300mA*
I
L
= 500mA*
150
120
RL = 0.6Ω
I
90
= 3A*
L
60
GND PIN CURRENT (mA)
30
RL = 1.2Ω
I
= 1.5A*
L
TJ = 25°C
V
= V
SHDN
*FOR V
RL = 2.57Ω
I
L
IN
= 1.8V
OUT
= 0.7A*
80
70
60
50
40
RL = 6.6Ω
I
L
30
GND PIN CURRENT (mA)
20
10
0
3578246 10
10
INPUT VOLTAGE (V)
200
160
120
80
GND PIN CURRENT (mA)
40
= 500mA*
RL = 1.66Ω
= 1.5A*
I
L
TJ = 25°C
V
SHDN
*FOR V
RL = 11Ω
I
= 300mA*
L
RL = 33Ω
I
TJ = 25°C
V
SHDN
*FOR V
RL = 0.83Ω
= 3A*
I
L
RL = 3.57Ω
I
L
= V
IN
= 3.3V
OUT
= 100mA*
L
= V
IN
= 2.5V
OUT
= 0.7A*
9
1764 G15
0
2
3
19
0
6
7
8
4
5
10
INPUT VOLTAGE (V)
1764 G16
0
2
3
19
0
6
7
8
4
5
10
0
INPUT VOLTAGE (V)
1764 G17
2
19
0
LT1764-3.3 GND Pin CurrentLT1764 GND Pin CurrentGND Pin Current vs I
Current LimitReverse Output CurrentReverse Output Current
6
5
4
3
2
CURRENT LIMIT (A)
1
0
–50
–250
50100 125
2575
TEMPERATURE (°C)
VIN = 7V
= 0V
V
OUT
1764 G28
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
REVERSE OUTPUT CURRENT (mA)
0.5
LT1764
LT1764-1.8
LT1764-2.5
LT1764-3.3
V
0
2
19
0
(LT1764-1.8/-2.5/-3.3)
3
4
5
OUTPUT VOLTAGE (V)
TJ = 25°C
V
CURRENT FLOWS
INTO OUTPUT PIN
= V
OUT
(LT1764)
ADJ
V
OUT
6
7
8
= 0V
IN
= VFB
1764 G29
10
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Page 8
LT1764 Series
TEMPERATURE (°C)
–50
MINIMUM INPUT VOLTAGE (V)
2.0
2.5
3.0
2575
1764 G33
1.5
1.0
–250
50100 125
0.5
0
IL = 3A
IL = 1.5A
IL = 100mA
I
L
= 500mA
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Ripple RejectionRipple RejectionLT1764 Minimum Input Voltage
80
70
60
50
40
30
RIPPLE REJECTION (dB)
20
IL = 1.5A
10
= V
V
IN
0
101k10k1M
OUT(NOM)
+ 50mV
100
+ 1V
RIPPLE
RMS
FREQUENCY (Hz)
C
OUT
TANTALUM +
10 × 1µF
CERAMIC
C
OUT
TANTALUM
Load Regulation
10
5
+ 1V
25
LT1764
LT1764-2.5
LT1764-3.3
75 100 125
0
–5
–10
–15
LOAD REGULATION (mV)
–20
∆IL = 1mA TO 3A
V
= 2.7V (LT1764)
IN
–25
= V
V
IN
OUT(NOM)
(LT1764-1.8/-2.5/-3.3)
–30
–25050
–50
TEMPERATURE (°C)
LT1764-1.8
= 100µF
= 10µF
100k
1764 G31
1764 G34
75
70
65
60
RIPPLE REJECTION (dB)
55
50
–50 –25
0
TEMPERATURE (°C)
25
IL = 1.5A
V
IN
+ 0.5V
AT f = 120Hz
50
Output Noise Spectral Density
1
C
= 10µF
OUT
= 3A
I
LOAD
LT1764-3.3LT1764-2.5
0.1
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
0.01
10
LT1764
1001k10k100k
LT1764-1.8
FREQUENCY (Hz)
= V
OUT(NOM)
RIPPLE
P-P
75
100
+ 1V
1764 G32
1764 G35
125
RMS Output Noise vs Load Current
(10Hz to 100kHz)
40
C
= 10µF
OUT
35
)
30
RMS
25
20
15
OUTPUT NOISE (µV
10
5
0
0.001
0.00010.010.110
LT1764-3.3
LT1764-2.5
LT1764-1.8
LOAD CURRENT (A)
LT1764
1
1764 G36
LT1764-3.3 10Hz to 100kHz
Output NoiseLT1764-3.3 Transient Response
V
OUT
100µV/DIV
C
OUT
8
IL = 3A
= 10µF1ms/DIV1764 G37
0.2
0.1
0
–0.1
DEVIATION (V)
OUTPUT VOLTAGE
–0.2
1.00
0.75
0.50
0.25
LOAD CURRENT (A)
0
0
LT1764-3.3 Transient Response
0.2
0.1
0
VIN = 4.3V
= 3.3µF TANTALUM
C
IN
= 10µF TANTALUM
C
OUT
462
8
10
TIME (µs)
12 1418
16
20
1764 G38
–0.1
DEVIATION (V)
OUTPUT VOLTAGE
–0.2
3
2
1
0
LOAD CURRENT (A)
0
462
VIN = 4.3V
C
= 33µF
IN
C
= 100µF TANTALUM
OUT
+ 10 × 1µF CERAMIC
12 1418
8
10
TIME (µs)
16
20
1764 G39
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Page 9
LT1764 Series
U
UU
PI FU CTIO S
SHDN (Pin 1): Shutdown. The SHDN pin is used to put the
LT1764 regulators into a low power shutdown state. The
output will be off when the SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or opencollector logic with a pull-up resistor. The pull-up resistor
is required to supply the pull-up current of the opencollector gate, normally several microamperes, and the
SHDN pin current, typically 7µA. If unused, the SHDN pin
must be connected to VIN. The device will be in the low
power shutdown state if the SHDN pin is not connected.
IN (Pin 2): Input. Power is supplied to the device through
the IN pin. A bypass capacitor is required on this pin if the
device is more than six inches away from the main input
filter capacitor. In general, the output impedance of a
battery rises with frequency, so it is advisable to include a
bypass capacitor in battery-powered circuits. A bypass
capacitor in the range of 1µF to 10µF is sufficient. The
LT1764 regulators are designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reverse input, which can happen if a
battery is plugged in backwards, the device will act as if
there is a diode in series with its input. There will be no
reverse current flow into the regulator and no reverse
voltage will appear at the load. The device will protect both
itself and the load.
GND (Pin 3): Ground.
OUT (Pin 4): Output. The output supplies power to the
load. A minimum output capacitor of 10µF is required to
prevent oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
SENSE (Pin 5): Sense. For fixed voltage versions of the
LT1764 (LT1764-1.8/LT1764-2.5/LT1764-3.3), the SENSE
pin is the input to the error amplifier. Optimum regulation
will be obtained at the point where the SENSE pin is
connected to the OUT pin of the regulator. In critical
applications, small voltage drops are caused by the resistance (RP) of PC traces between the regulator and the load.
These may be eliminated by connecting the SENSE pin to
the output at the load as shown in Figure 1 (Kelvin Sense
Connection). Note that the voltage drop across the external PC traces will add to the dropout voltage of the
regulator. The SENSE pin bias current is 600µA at the
nominal rated output voltage. The SENSE pin can be pulled
below ground (as in a dual supply system where the
regulator load is returned to a negative supply) and still
allow the device to start and operate.
ADJ (Pin 5): Adjust. For the adjustable LT1764, this is the
input to the error amplifier. This pin is internally clamped
to ±7V. It has a bias current of 3µA which flows into the
pin. The ADJ pin voltage is 1.21V referenced to ground and
the output voltage range is 1.21V to 20V.
R
P
2
IN
LT1764
1
V
+
IN
Figure 1. Kelvin Sense Connection
SHDN
GND
OUT
SENSE
3
4
+
5
R
P
LOAD
1764 F01
1764fa
9
Page 10
LT1764 Series
WUUU
APPLICATIO S I FOR ATIO
The LT1764 series are 3A low dropout regulators optimized for fast transient response. The devices are capable
of supplying 3A at a dropout voltage of 340mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1764 regulators incorporate several protection features
which make them ideal for use in battery-powered systems. The devices are protected against both reverse input
and reverse output voltages. In battery backup applications where the output can be held up by a backup battery
when the input is pulled to ground, the LT1764-X acts like
it has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
Adjustable Operation
The adjustable version of the LT1764 has an output
voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the voltage at the ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.
IN
V
IN
VV
OUTADJ
VV
ADJ
IA
=°
ADJ
OUTPUT RANGE = 1.21V TO 20V
Figure 2. Adjustable Operation
OUT
LT1764
ADJ
GND
R
2
=+
121 1
.
=
121
.
3
µ AT 25 C
+
R
1
+
R2
R1
1764 F02
IR
2
()()
V
OUT
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to
1.21V: V
/1.21V. For example, load regulation for an
OUT
output current change of 1mA to 3A is –3mV typical at
V
= 1.21V. At V
OUT
= 5V, load regulation is:
OUT
(5V/1.21V)(–3mV) = –12.4mV
Output Capacitance and Transient Response
The LT1764 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 10µF with an ESR in
the range of 50mΩ to 3Ω is recommended to prevent
oscillations. Larger values of output capacitance can decrease the peak deviations and provide improved transient
response for larger load current changes. Bypass capacitors, used to decouple individual components powered by
the LT1764-X, will increase the effective output capacitor
value.
Extra consideration must be given to the use of ceramic
capacitors. In some applications the use of ceramic capacitors with an ESR below 50mΩ can cause oscillations.
Please consult our Applications Engineering department
for help with any issues concerning the use of ceramic
output capacitors. Ceramic capacitors are manufactured
with a variety of dielectrics, each with different behavior
over temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 3 and 4. When
used with a 5V regulator, a 10µF Y5V capacitor can exhibit
an effective value as low as 1µF to 2µF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
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WUUU
APPLICATIO S I FOR ATIO
LT1764 Series
20
0
–20
–40
–60
CHANGE IN VALUE (%)
–80
–100
0
Figure 3. Ceramic Capacitor DC Bias Characteristics
40
20
0
–20
–40
–60
CHANGE IN VALUE (%)
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50
Figure 4. Ceramic Capacitor Temperature Characteristics
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
X5R
Y5V
26
4
–250
8
DC BIAS VOLTAGE (V)
2575
TEMPERATURE (°C)
14
12
10
Y5V
50100 125
16
1764 F03
X5R
1764 F04
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Overload Recovery
Like many IC power regulators, the LT1764-X has safe
operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown.
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1764 series.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Common situations are immediately after the removal of a
short circuit or when the SHDN pin is pulled high after the
input voltage has already been turned on. The load line for
such a load may intersect the output current curve at two
points. If this happens, there are two stable output operating points for the regulator. With this double intersection, the input power supply may need to be cycled down
to zero and brought up again to make the output recover.
Output Voltage Noise
The LT1764 regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typically 50nV√Hz over this frequency bandwidth for the
LT1764 (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 15µV
the LT1764 increasing to 37µV
for the LT1764-3.3.
RMS
RMS
for
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1764-X. Power
supply ripple rejection must also be considered; the LT1764
regulators do not have unlimited power supply rejection
and will pass a small portion of the input noise through to
the output.
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11
Page 12
LT1764 Series
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APPLICATIONS INFORMATION
Thermal Considerations
The power handling capability of the device is limited by
the maximum rated junction temperature (125°C). The
power dissipated by the device is made up of two components:
1. Output current multiplied by the input/output voltage
differential: (I
2. GND pin current multiplied by the input voltage:
(I
)(VIN).
GND
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two
components listed above.
The LT1764 series regulators have internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the maximum
junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambient.
Additional heat sources mounted nearby must also be
considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heatsinks and plated
through-holes can also be used to spread the heat generated by power devices.
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
Table 1. Q Package, 5-Lead DD
COPPER AREA
TOPSIDE*BACKSIDEBOARD AREA(JUNCTION-TO-AMBIENT)
2500mm22500mm
1000mm22500mm
125mm22500mm
*Device is mounted on topside.
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 2.5°C/W
)(VIN – V
OUT
2
2
2
OUT
2500mm
2500mm
2500mm
), and
THERMAL RESISTANCE
2
2
2
23°C/W
25°C/W
33°C/W
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)(VIN(MAX)
– V
OUT
) + I
GND(VIN(MAX)
)
where,
I
OUT(MAX)
V
IN(MAX)
I
GND
at (I
= 500mA
= 6V
= 500mA, VIN = 6V) = 10mA
OUT
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
1.41W(28°C/W) = 39.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
= 50°C + 39.5°C = 89.5°C
JMAX
Protection Features
The LT1764 regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages of
20V. Current flow into the device will be limited to less than
1mA and no negative voltage will appear at the output. The
12
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Page 13
LT1764 Series
OUTPUT VOLTAGE (V)
012345678910
REVERSE OUTPUT CURRENT (mA)
1764 F05
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
LT1764-2.5
LT1764-3.3
LT1764-1.8
LT1764
T
J
= 25°C
V
IN
= OV
CURRENT FLOWS INTO
OUTPUT PIN
V
OUT
= V
ADJ
(LT1764)
V
OUT
= VFB (LT1764-1.8,
LT1764-2.5, LT1764-3.3)
U
WUU
APPLICATIONS INFORMATION
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
The output of the LT1764-X can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
pins divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
When the IN pin of the LT1764-X is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current
will typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.21V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
Figure 5. Reverse Output Current
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Page 14
LT1764 Series
TYPICAL APPLICATIO S
SCR Preregulator Provides Efficiency Over Line Variations
U
90V AC
TO 140V AC
ALL “V
POINTS
L2
10V AC
AT 115V
IN
10V AC
AT 115V
IN
1N40021N4002
“SYNC”
TO
+
”
L1: COILTRONICS CTX500-2-52
L2: STANCOR P-8560
*1% FILM RESISTOR
1N4002
+
22µF
NTE5437
NTE5437
2.4k
750Ω
1N4148
1k
+
1/2 LT1018
–
0.033µF
L1
500µH
C1A
+
V
750Ω
+
1/2 LT1018
10000µF
1N4148
C1B
LT1764-3.3
IN
OUT
SHDN
GND
34k*
12.1k*
+
V
200k
0.1µF
+
1N4148
–
10k
+
V
1µF
FB
V
LT1006
+
+
+
A1
–
22µF
10k
V
OUT
3.3V
3A
10k
LT1004
1.2V
1764 TA03
+
V
14
V
IN
> 2.7V
Adjustable Current Source
R5
0.01Ω
40.2k
R3
2k
R1
1k
R2
R4
2.2k
R6
2.2k
C2
3.3µF
+
C1
10µF
LT1004-1.2
ADJUST R1 FOR 0A TO 3A
CONSTANT CURRENT
IN
SHDN
–
2
1/2 LT1366
+
3
LT1764-1.8
GND
C3
1µF
8
4
1764 TA04
OUT
FB
R7
470Ω
1
LOAD
R8
100k
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Page 15
PACKAGE DESCRIPTION
LT1764 Series
U
Q Package
5-Lead Plastic DD Pak
(LTC DWG # 05-08-1461)
0.256
(6.502)
0.060
(1.524)
0.300
(7.620)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
(1.524)
(1.905)
0.060
0.075
0.183
(4.648)
0.060
(1.524)
TYP
0.330 – 0.370
(8.382 – 9.398)
+0.012
0.143
–0.020
+0.305
3.632
()
–0.508
0.028 – 0.038
(0.711 – 0.965)
0.390 – 0.415
(9.906 – 10.541)
15
° TYP
0.067
(1.70)
BSC
T Package
5-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1421)
0.165 – 0.180
(4.191 – 4.572)
0.059
(1.499)
TYP
0.013 – 0.023
(0.330 – 0.584)
0.045 – 0.055
(1.143 – 1.397)
+0.008
0.004
–0.004
+0.203
0.102
()
–0.102
0.095 – 0.115
(2.413 – 2.921)
± 0.012
0.050
(1.270 ± 0.305)
Q(DD5) 1098
0.390 – 0.415
(9.906 – 10.541)
0.460 – 0.500
(11.684 – 12.700)
0.067
BSC
(1.70)
0.147 – 0.155
(3.734 – 3.937)
0.230 – 0.270
(5.842 – 6.858)
0.330 – 0.370
(8.382 – 9.398)
0.028 – 0.038
(0.711 – 0.965)
DIA
0.570 – 0.620
(14.478 – 15.748)
SEATING PLANE
0.260 – 0.320
(6.60 – 8.13)
0.700 – 0.728
(17.78 – 18.491)
0.152 – 0.202
(3.861 – 5.131)
0.135 – 0.165
(3.429 – 4.191)
0.165 – 0.180
(4.191 – 4.572)
0.620
(15.75)
TYP
0.045 – 0.055
(1.143 – 1.397)
0.095 – 0.115
(2.413 – 2.921)
0.155 – 0.195*
(3.937 – 4.953)
0.013 – 0.023
(0.330 – 0.584)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
1764fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
Page 16
LT1764 Series
TYPICAL APPLICATIO
> 3.7V
V
IN
U
Paralleling of Regulators for Higher Output Current