Datasheet LM3940IMP-3.3 Specification

LM3940
1A Low Dropout Regulator for 5V to 3.3V Conversion

LM3940 1A Low Dropout Regulator for 5V to 3.3V Conversion

July 2007

General Description

The LM3940 is a 1A low dropout regulator designed to provide

3.3V from a 5V supply.
The LM3940 is ideally suited for systems which contain both

5V and 3.3V logic, with prime power provided from a 5V bus.
Because the LM3940 is a true low dropout regulator, it can

hold its 3.3V output in regulation with input voltages as low as

4.5V.
The T0-220 package of the LM3940 means that in most ap-

plications the full 1A of load current can be delivered without
using an additional heatsink.

The surface mount TO-263 package uses minimum board
space, and gives excellent power dissipation capability when
soldered to a copper plane on the PC board.

Features

Output voltage specified over temperature

■

Excellent load regulation

■

Guaranteed 1A output current

■

Requires only one external component

■

Built-in protection against excess temperature

■

Short circuit protected

■

Applications

Laptop/Desktop Computers

■

Logic Systems

■

Typical Application

*Required if regulator is located more than 1″ from the power supply filter capacitor or if battery power is used.

**See Application Hints.

1208001

Connection Diagram/Ordering Information

1208003

1208002

3-Lead SOT-223

(Front View)

Order Part Number LM3940IMP-3.3

Package Marked L52B

NSC Drawing Number MP04A

3-Lead TO-220 Package

(Front View)

Order Part Number LM3940IT-3.3

NSC Drawing Number TO3B

3-Lead TO-263 Package

(Front View)

Order Part Number LM3940IS-3.3

NSC Drawing Number TS3B

© 2007 National Semiconductor Corporation 12080 www.national.com

1208010

LM3940

8-Lead LLP

16-Lead Ceramic Dual-in-Line Package

1208027

(Top View)

Order Part Number LM3940J-3.3-QML

5962-9688401QEA

NSC Drawing Number J16A

16-Lead Ceramic Surface-Mount Package

1208028

(Top View)

Order Part Number LM3940WG-3.3-QML

5962-9688401QXA

NSC Drawing Number WG16A

Pin 2 and pin 7 are fused to center DAP

1208030

Pin 5 and 6 need to be tied together on PCB board

(Top View)

Order Part Number LM3940LD-3.3

NSC Drawing Number LDC08A

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LM3940

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 5 seconds) 260°C
Power Dissipation (Note 2) Internally Limited

Input Supply Voltage 7.5V
ESD Rating (Note 3) 2 kV

Operating Ratings (Note 1)

Junction Temperature Range, T

Input Supply Voltage, V

IN(MIN)

J

−40°C to +125°C
VO + V

DO

Electrical Characteristics

Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless
otherwise specified: VIN = 5V, IL = 1A, C

Symbol Parameter Conditions Typical

V

O

Output Voltage

Line Regulation

Load Regulation

Z

O

I

Q

e

n

V

DO

IL(SC)

Output Impedance

Quiescent Current

Output Noise Voltage

Dropout Voltage
(Note 5)

Short Circuit Current

= 33 μF.

OUT

5 mA ≤ IL ≤ 1A

IL = 5 mA

4.5V ≤ VIN ≤ 5.5V

50 mA ≤ IL ≤ 1A

IL (DC) = 100 mA
IL (AC) = 20 mA (rms)
f = 120 Hz

4.5V ≤ VIN ≤ 5.5V
IL = 5 mA

VIN = 5V
IL = 1A

BW = 10 Hz–100 kHz
IL = 5 mA

IL = 1A

IL = 100 mA

RL = 0

LM3940 (Note 4)

Units

min max

3.3

3.20

3.13

3.40

3.47

20

35

40

50

80

35

10

110

150

0.5

110

15

20

200

250

μV (rms)

0.8

1.0

150

200

1.7 1.2 A

V

mV

mΩ

mA

V

mV

Thermal Performance

Thermal Resistance

Junction-to-Case, θ

JC

Thermal Resistance

Junction-to-Ambient, θ

Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the
device outside of its rated operating conditions.

Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction-to-ambient thermal resistance, θJA, and
the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal
shutdown. The value of θJA (for devices in still air with no heatsink) is 60°C/W for the TO-220 package, 80°C/W for the TO-263 package, and 174°C/W for the
SOT-223 package. The effective value of θJA can be reduced by using a heatsink (see Application Hints for specific information on heatsinking). The value of

θJA for the LLP package is specifically dependant on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance

and power dissipation for the LLP package, refer to Application Note AN-1187. The θ
under the exposed pad.

Note 3: ESD rating is based on the human body model: 100 pF discharged through 1.5 kΩ.

Note 4: All limits guaranteed for TJ = 25°C are 100% tested and are used to calculate Outgoing Quality Levels. All limits at temperature extremes are guaranteed

via correlation using standard Statistical Quality Control (SQC) methods.

Note 5: Dropout voltage is defined as the input-output differential voltage where the regulator output drops to a value that is 100 mV below the value that is
measured at VIN = 5V.

3-Lead TO-220 4 °C/W

3-Lead TO-263 4 °C/W

8-Lead LLP 6 °C/W

3-Lead TO-220 60 °C/W

3-Lead TO-263 80 °C/W

JA

8-Lead LLP (Note 2) 35 °C/W

rating for the LLP is with a JESD51-7 test board having 6 thermal vias

JA

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Typical Performance Characteristics

LM3940

Dropout Voltage

Output Voltage vs. Temperature

1208013

Dropout Voltage vs. Temperature

1208014

Quiescent Current vs. Temperature

Quiescent Current vs. V

IN

1208015

1208017

1208016

Quiescent Current vs. Load

1208018

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LM3940

Line Transient Response

Ripple Rejection

1208019

Load Transient Response

1208020

Low Voltage Behavior

Output Impedance

1208021

1208023

1208022

Peak Output Current

1208024

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Application Hints

LM3940

EXTERNAL CAPACITORS

The output capacitor is critical to maintaining regulator stabil­ity, and must meet the required conditions for both ESR
(Equivalent Series Resistance) and minimum amount of ca­pacitance.

MINIMUM CAPACITANCE:
The minimum output capacitance required to maintain stabil-

ity is 33 μF (this value may be increased without limit). Larger
values of output capacitance will give improved transient re­sponse.

ESR LIMITS:
The ESR of the output capacitor will cause loop instability if it

is too high or too low. The acceptable range of ESR plotted
versus load current is shown in the graph below. It is essen-

tial that the output capacitor meet these requirements, or
oscillations can result.

HEATSINKING

A heatsink may be required depending on the maximum pow­er dissipation and maximum ambient temperature of the ap­plication. Under all possible operating conditions, the junction
temperature must be within the range specified under Abso­lute Maximum Ratings.

To determine if a heatsink is required, the power dissipated
by the regulator, PD, must be calculated.

The figure below shows the voltages and currents which are
present in the circuit, as well as the formula for calculating the
power dissipated in the regulator:

1208005

FIGURE 1. ESR Limits

It is important to note that for most capacitors, ESR is speci­fied only at room temperature. However, the designer must
ensure that the ESR will stay inside the limits shown over the
entire operating temperature range for the design.

For aluminum electrolytic capacitors, ESR will increase by
about 30X as the temperature is reduced from 25°C to −40°
C. This type of capacitor is not well-suited for low temperature
operation.

Solid tantalum capacitors have a more stable ESR over tem­perature, but are more expensive than aluminum electrolyt­ics. A cost-effective approach sometimes used is to parallel
an aluminum electrolytic with a solid Tantalum, with the total
capacitance split about 75/25% with the Aluminum being the
larger value.

If two capacitors are paralleled, the effective ESR is the par­allel of the two individual values. The “flatter” ESR of the
Tantalum will keep the effective ESR from rising as quickly at
low temperatures.

IIN = IL + I

G

PD = (VIN − V

) IL + (VIN) I

OUT

G

1208006

FIGURE 2. Power Dissipation Diagram

The next parameter which must be calculated is the maximum
allowable temperature rise, TR (max). This is calculated by
using the formula:

TR (max) = TJ (max) − TA (max)

Where: TJ (max)

is the maximum allowable junction tem­perature, which is 125°C for commercial
grade parts.

TA (max)

is the maximum ambient temperature
which will be encountered in the applica­tion.

Using the calculated values for TR(max) and PD, the maxi­mum allowable value for the junction-to-ambient thermal re­sistance, θ

θ

= TR (max)/P

(JA)

IMPORTANT: If the maximum allowable value for θ
found to be ≥ 60°C/W for the TO-220 package, ≥ 80°C/W for

, can now be found:

(JA)

D

(JA)

is

the TO-263 package, or ≥174°C/W for the SOT-223 package,
no heatsink is needed since the package alone will dissipate
enough heat to satisfy these requirements.

If the calculated value for θ
heatsink is required.

falls below these limits, a

(JA)

HEATSINKING TO-220 PACKAGE PARTS

The TO-220 can be attached to a typical heatsink, or secured
to a copper plane on a PC board. If a copper plane is to be
used, the values of θ
section for the TO-263.

will be the same as shown in the next

(JA)

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If a manufactured heatsink is to be selected, the value of
heatsink-to-ambient thermal resistance, θ
calculated:

θ

= θ

(H−A)

Where: θ

(JA)

(J−C)

− θ

− θ

(C−H)

(J−C)

is defined as the thermal resistance from the
junction to the surface of the case. A value of
4°C/W can be assumed for θ
culation.

   θ

is defined as the thermal resistance between

(C−H)

the case and the surface of the heatsink. The
value of θ
about 2.5°C/W (depending on method of at-

will vary from about 1.5°C/W to

(C−H)

, must first be

(H−A)

for this cal-

(J−C)

tachment, insulator, etc.). If the exact value is
unknown, 2°C/W should be assumed for θ

.

−H)

When a value for θ

heatsink must be selected that has a value that is less than

is found using the equation shown, a

(H−A)

or equal to this number.

θ

is specified numerically by the heatsink manufacturer

(H−A)

in the catalog, or shown in a curve that plots temperature rise
vs. power dissipation for the heatsink.

HEATSINKING TO-263 AND SOT-223 PACKAGE PARTS

Both the TO-263 (“S”) and SOT-223 (“MP”) packages use a
copper plane on the PCB and the PCB itself as a heatsink. To
optimize the heat sinking ability of the plane and PCB, solder
the tab of the package to the plane.

Figure 3 shows for the TO-263 the measured values of θ
for different copper area sizes using a typical PCB with 1

(JA)

ounce copper and no solder mask over the copper area used

for heatsinking.

LM3940

1208008

(C

FIGURE 4. Maximum Power Dissipation vs. T

TO-263 Package

AMB

for the

Figure 5 and Figure 6 show the information for the SOT-223
package. Figure 6 assumes a θ
copper and 51°C/W for 2 ounce copper and a maximum junc-

of 74°C/W for 1 ounce

(JA)

tion temperature of 125°C.

1208007

FIGURE 3. θ

vs. Copper (1 ounce) Area for the TO-263

(JA)

Package

As shown in the figure, increasing the copper area beyond 1
square inch produces very little improvement. It should also
be observed that the minimum value of θ
package mounted to a PCB is 32°C/W.

for the TO-263

(JA)

As a design aid, Figure 4 shows the maximum allowable
power dissipation compared to ambient temperature for the
TO-263 device (assuming θ
junction temperature is 125°C).

is 35°C/W and the maximum

(JA)

1208011

FIGURE 5. θ

FIGURE 6. Maximum Power Dissipation vs. T

vs. Copper (2 ounce) Area for the SOT-223

(JA)

Package

SOT-223 Package

1208012

AMB

for the

Please see AN1028 for power enhancement techniques to be
used with the SOT-223 package.

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Physical Dimensions inches (millimeters) unless otherwise noted

LM3940

3-Lead SOT-223 Package

Order Part Number LM3940IMP-3.3

NSC Package Number MP04A

3-Lead TO-220 Package

Order Part Number LM3940IT-3.3

NSC Package Number TO3B

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3-Lead TO-263 Package

Order Part Number LM3940IS-3.3

NSC Package Number TS3B

LM3940

16-Lead Ceramic Dual-in-Line Package

Order Part Number LM3940J-3.3-QML

5962-9688401QEA

NSC Drawing Number J16A

9 www.national.com

LM3940

16-Lead Ceramic Surface-Mount Package

Order Part Number LM3940WG-3.3-QML

5962-9688401QXA

NSC Package Number WG16A

Order Part Number LM3940LD-3.3

NSC Package Number LDC08A

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8-Lead LLP

Notes

LM3940

11 www.national.com

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LM3940 1A Low Dropout Regulator for 5V to 3.3V Conversion

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