Datasheet LM2901PWRG3 Specification

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LM2901EP Low Power Low Offset Voltage Quad Comparators

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FEATURES

• Wide Supply Voltage Range

• LM2901: 2 to 36 VDCor ±1 to ±18 V

• Very Low Supply Current Drain (0.8 mA) — Independent of Supply Voltage

• Low Input Biasing Current: 25 nA

• Low Input Offset Current: ±5 nA

• Offset Voltage: ±3 mV

• Input Common-Mode Voltage Range Includes GND

• Differential Input Voltage Range Equal to the Power Supply Voltage

• Low output saturation voltage: 250 mV at 4 mA

• Output Voltage Compatible with TTL, DTL, ECL, MOS and CMOS Logic Systems

ADVANTAGES

• High Precision Comparator

• Reduced VOSDrift Over Temperature

• Eliminates Need for Dual Supplies

• Allows Sensing Near GND

• Compatible with all Forms of Logic

• Power Drain Suitable for Battery Operation

APPLICATIONS

• Selected Military Applications

• Selected Avionics Applications

SNOSAF6B –JANUARY 2005–REVISED APRIL 2013

DESCRIPTION

The LM2901EP consists of four independent precision voltage comparators with an offset voltage specification as low as 2 mV max for all four comparators. These were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. This comparator also has a unique characteristic in that the input common-mode voltage range includes ground, even though operated from a single power supply voltage.

Application areas include limit comparators, simple analog to digital converters; pulse, squarewave and time delay generators; wide range VCO; MOS clock timers; multivibrators and high voltage digital logic gates. The LM2901EP was designed to directly interface with TTL and CMOS. When operated from both plus and minus power supplies, it will directly interface with MOS logic— where the low power drain of the LM2901EP is a distinct advantage over standard comparators.

ENHANCED PLASTIC

• Extended Temperature Performance of −40°C to +85°C

• Baseline Control - Single Fab & Assembly Site

• Process Change Notification (PCN)

• Qualification & Reliability Data

• Solder (PbSn) Lead Finish is standard

• Enhanced Diminishing Manufacturing Sources (DMS) Support

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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ABSOLUTE MAXIMUM RATINGS

Supply Voltage, V Differential Input Voltage

(3)

(1)(2)

Input Voltage −0.3 VDCto +36 V Input Current (VIN<−0.3 VDC), Power Dissipation

(5)

(4)

Molded PDIP 1050 mW

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36 VDCor ±18 V

36 V

50 mA

Small Outline Package (SOIC) 760 mW

Output Short-Circuit to GND,

(6)

Continuous Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 seconds) 260°C Operating Temperature Range LM2901 −40°C to +85°C Soldering Information Dual-In-Line Package Soldering (10 seconds) 260°C

Small Outline Package Vapor Phase (60 seconds) 215°C

Infrared (15 seconds) 220°C

ESD rating (1.5 kΩ in series with 100 pF) 600V

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. (2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. (3) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode

range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC(or 0.3 VDCbelow the magnitude of the negative power supply, if used) (at 25°C).

(4) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of

the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC(at 25°)C.

(5) For operating at high temperatures, the LM2901EP must be derated based on a 125°C maximum junction temperature and a thermal

resistance of 95°C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient. The low bias dissipation and the “ON-OFF” characteristic of the outputs keeps the chip dissipation very small (PD≤100 mW), provided the output transistors are allowed to saturate.

(6) Short circuits from the output to V+can cause excessive heating and eventual destruction. When considering short circuits to ground,

the maximum output current is approximately 20 mA independent of the magnitude of V+.

ELECTRICAL CHARACTERISTICS

(1)

(V+= 5 VDC, TA= 25°C, unless otherwise stated)

Parameter Conditions LM2901 Units

Min Typ Max

Input Offset Voltage See Input Bias Current I

Input Offset Current I Input Common-Mode Voltage Range V+= 30 V Supply Current RL= ∞ on all Comparators, 0.8 2.0 mA

Voltage Gain RL≥ 15 kΩ, V+= 15 V

(1) "Testing and other quality control techniques are used to the extent deemed necessary to ensure product performance over the

specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific PARAMETRIC testing, product performance is assured by characterization and/or design."

(2) At output switch point, VO≃1.4 VDC, RS= 0Ω with V+from 5 VDCto 30 VDC; and over the full input common-mode range (0 VDCto V

−1.5 VDC), at 25°C.

(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the

state of the output so no loading change exists on the reference or input lines.

(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end

of the common-mode voltage range is V+−1.5V at 25°C, but either or both inputs can go to +30 VDCwithout damage independent of the magnitude of V+.

(2)

or I

IN(+)

Linear Range,

IN(+)−IIN(−)

with Output in 25 250 nA

IN(−)

(3)

, VCM=0V

, VCM= 0V 5 50 nA

(4)

RL= ∞, V+= 36V, 1.0 2.5 mA

VO= 1 VDCto 11 V

2.0 7.0 mV

0 V+−1.5 V

100 V/mV

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DC DC

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ELECTRICAL CHARACTERISTICS

(1)

(continued)

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(V+= 5 VDC, TA= 25°C, unless otherwise stated)

Parameter Conditions LM2901 Units

Min Typ Max

Large Signal VIN= TTL Logic Swing, V

Response Time 1.4 VDC, VRL= 5 VDC,

RL= 5.1 kΩ, Response Time VRL= 5 VDC, RL= 5.1 kΩ, Output Sink Current V

Saturation Voltage V

Output Leakage V Current VO= 5 V

= 1 VDC, V

IN(−)

VO≤ 1.5 V

= 1 VDC, V

IN(−)

≤ 4 mA

SINK

= 1 VDC,V

IN(+)

= 0, 6.0 16 mA

IN(+)

= 0, 0.1 nA

IN(−)

(5) The response time specified is a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see

TYPICAL PERFORMANCE CHARACTERISTICS section.

ELECTRICAL CHARACTERISTICS

(V+= 5.0 VDC)

(2)

(1)

Parameter Conditions LM2901 Units

Input Offset Voltage See Input Offset Current I Input Bias Current I

Input Common-Mode V+= 30 V Voltage Range

Saturation Voltage V

Output Leakage Current V

(3)

IN(+)−IIN(−) IN(+)

Linear Range, VCM= 0V

IN(−)

SINK

IN(+) =

VO= 30 V

, VCM= 0V 50 200 nA

or I

with Output in 200 500 nA

IN(−)

(5)

= 1 VDC, V

≤ 4 mA

1 VDC, V

IN(+)

IN(−)

Differential Input Voltage Keep all VIN's ≥ 0 VDC(or V−, if used),

= 300 ns

REF

(5)

1.3 μs

= 0, 250 400 mV

Min Typ Max

9 15 mV

(4)

0 V+−2.0 V

= 0, 400 700 mV

= 0, 1.0 μA

(6)

36 V

DC DC DC

(1) "Testing and other quality control techniques are used to the extent deemed necessary to ensure product performance over the

design." (2) These specifications are limited to −40°C ≤ TA≤ +85°C, for the LM2901EP. (3) At output switch point, VO≃1.4 VDC, RS= 0Ω with V+from 5 VDCto 30 VDC; and over the full input common-mode range (0 VDCto V

−1.5 VDC), at 25°C.

(4) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the

state of the output so no loading change exists on the reference or input lines. (5) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end

of the common-mode voltage range is V+−1.5V at 25°C, but either or both inputs can go to +30 VDCwithout damage independent of the

magnitude of V+. (6) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode

range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC(or 0.3 VDCbelow

the magnitude of the negative power supply, if used) (at 25°C).

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TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current Input Current

Figure 1. Figure 2.

Output Saturation Voltage —Negative Transition

Response Time for Various Input Overdrives

Figure 3. Figure 4.

Response Time for Various Input Overdrives

—Positive Transition

Figure 5.

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APPLICATION HINTS

The LM2901EP is a high gain, wide bandwidth device which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only during the output voltage transition intervals as the comparator changes states. Power supply bypassing is not required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing this input resistors to < 10 kΩ reduces the feedback signal levels and finally, adding even a small amount (1 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with relatively fast rise and fall times, hysteresis is not required.

All pins of any unused comparators should be tied to the negative supply. The bias network of the LM2901EP series establishes a drain current which is independent of the magnitude of

the power supply voltage over the range of from 2 VDCto 30 VDC. It is usually unnecessary to use a bypass capacitor across the power supply line. The differential input voltage may be larger than V+without damaging the device. Protection should be provided

to prevent the input voltages from going negative more than −0.3 VDC(at 25°C). An input clamp diode can be used as shown in the Typical Applications section.

The output of the LM2901EP is the uncommitted collector of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected to any available power supply voltage within the permitted supply voltage range and there is no restriction on this voltage due to the magnitude of the voltage which is applied to the V+terminal of the LM2901EP package. The output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current which the output device can sink is limited by the drive available (which is independent of V+) and the β of this device. When the maximum current limit is reached (approximately 16 mA), the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the approximately 60Ω R output to clamp essentially to ground level for small load currents.

of the output transistor. The low offset voltage of the output transistor (1 mV) allows the

SAT

Typical Applications

(V+= 5.0 VDC) The LM139 within this data sheet's graphics is referenced because of it's a similarity to the LM2901, however is

not offered in this data sheet.

Figure 6. Basic Comparator

Figure 7. Driving CMOS

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Figure 8. Driving TTL

Figure 9. AND Gate

Figure 10. OR Gate

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Typical Applications

(V+= 15 VDC) The LM139 within this data sheet's graphics is referenced because of it's a similarity to the LM2901, however is

not offered in this data sheet.

Figure 11. One-Shot Multivibrator

Figure 12. Bi-Stable Multivibrator

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Figure 13. One-Shot Multivibrator with Input Lock Out

Figure 14. Pulse Generator

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Figure 15. Large Fan-In AND Gate

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Figure 16. ORing the Outputs

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Figure 17. Time Delay Generator

Figure 18. Non-Inverting Comparator with Hysteresis

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Figure 19. Inverting Comparator with Hysteresis

Figure 20. Squarewave Oscillator

Figure 21. Basic Comparator

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Figure 22. Limit Comparator

Figure 23. Comparing Input Voltages of Opposite Polarity

* Or open-collector logic gate without pull-up resistor

Figure 24. Output Strobing

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Figure 25. Crystal Controlled Oscillator

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V+= +30 V 250 mVDC≤ VC≤ +50 V 700 Hz ≤ fO≤ 100 kHz

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Figure 26. Two-Decade High-Frequency VCO

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Figure 27. Transducer Amplifier

Figure 28. Zero Crossing Detector (Single Power Supply)

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Split-Supply Applications

(V+= +15 VDCand V−= −15 VDC)

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Figure 29. MOS Clock Driver

Figure 30. Zero Crossing Detector

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Schematic Diagram

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Figure 31. Comparator With a Negative Reference

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Connection Diagrams

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Dual-In-Line Package - SOIC/PDIP

See Package Number D and NFF

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REVISION HISTORY

Changes from Revision A (April 2013) to Revision B Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 20

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PACKAGE OPTION ADDENDUM

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10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status

LM2901 MWA ACTIVE WAFERSALE YS 0 1 RoHS & Green Call TI Level-1-NA-UNLIM -40 to 85

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

Package Type Package

(1)

Drawing

Pins Package

Qty

Eco Plan

(2)

Lead finish/ Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

(2)

RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Samples

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