The LM2734Z regulator is a monolithic, high frequency, PWM
step-down DC/DC converter assembled in a 6-pin Thin
SOT23 and LLP non pull back package. It provides all the
active functions to provide local DC/DC conversion with fast
transient response and accurate regulation in the smallest
possible PCB area.
With a minimum of external components and online design
support through WEBENCH®™, the LM2734Z is easy to use.
The ability to drive 1A loads with an internal 300mΩ NMOS
switch using state-of-the-art 0.5µm BiCMOS technology results in the best power density available. The world class
control circuitry allows for on-times as low as 13ns, thus supporting exceptionally high frequency conversion over the entire 3V to 20V input operating range down to the minimum
output voltage of 0.8V. Switching frequency is internally set
to 3MHz, allowing the use of extremely small surface mount
inductors and chip capacitors. Even though the operating frequency is very high, efficiencies up to 85% are easy to
achieve. External shutdown is included, featuring an ultra-low
stand-by current of 30nA. The LM2734Z utilizes current-mode
control and internal compensation to provide high-performance regulation over a wide range of operating conditions.
Additional features include internal soft-start circuitry to reduce inrush current, pulse-by-pulse current limit, thermal
shutdown, and output over-voltage protection.
LM2734ZQMKESVBB250 Units on Tape and ReelAEC-Q100 Grade 1
TSOT-6MK06A
LM2734ZQMKSVBB1000 Units on Tape and Reel
LM2734ZQMKXSVBB3000 Units on Tape and Reel
LM2734ZSD
LM2734ZSDXL163B4500 Units on Tape and Reel
LM2734ZQSDEL238B250 Units on Tape and ReelAEC-Q100 Grade 1
6-Lead LLPSDE06A
LM2734ZQSDL238B1000 Units on Tape and Reel
LM2734ZQSDXL238B4500 Units on Tape and Reel
*Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies.
Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified
with the letter Q. For more information go to http://www.national.com/automotive.
Package
Supplied AsFeatures
Marking
SFTB1000 Units on Tape and Reel
Qualified. Automotive-Grade
Production Flow*
L163B1000 Units on Tape and Reel
Qualified. Automotive-Grade
Production Flow*
Pin Descriptions
PinNameFunction
1BOOSTBoost voltage that drives the internal NMOS control switch. A
bootstrap capacitor is connected between the BOOST and SW pins.
2GNDSignal and Power ground pin. Place the bottom resistor of the
feedback network as close as possible to this pin for accurate
regulation.
3FBFeedback pin. Connect FB to the external resistor divider to set output
voltage.
4ENEnable control input. Logic high enables operation. Do not allow this
pin to float or be greater than V
5V
IN
Input supply voltage. Connect a bypass capacitor to this pin.
6SWOutput switch. Connects to the inductor, catch diode, and bootstrap
capacitor.
DAPGNDThe Die Attach Pad is internally connected to GND
+ 0.3V.
IN
www.national.com2
Page 3
LM2734Z/LM2734ZQ
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Soldering Information
Infrared/Convection Reflow (15sec)220°C
Wave Soldering Lead Temp. (10sec)260°C
Distributors for availability and specifications.
V
IN
-0.5V to 24V
SW Voltage-0.5V to 24V
Boost Voltage-0.5V to 30V
Boost to SW Voltage-0.5V to 6.0V
FB Voltage-0.5V to 3.0V
EN Voltage-0.5V to (VIN + 0.3V)
SW Voltage-0.5V to 20V
Boost Voltage-0.5V to 25V
Boost to SW Voltage1.6V to 5.5V
Junction Temperature Range−40°C to +125°C
Thermal Resistance θJA (Note 3)
TSOT23–6118°C/W
3V to 20V
Storage Temp. Range-65°C to 150°C
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those in boldface type apply over the full Operating Temperature
Range (TJ = -40°C to 125°C). VIN = 5V, V
guaranteed by design, test, or statistical analysis.
SymbolParameterConditions
V
ΔVFB/ΔV
I
Feedback Voltage
FB
Feedback Voltage Line
IN
Regulation
Feedback Input Bias Current
FB
Undervoltage Lockout
UVLO
Undervoltage Lockout
UVLO Hysteresis0.300.440.62
F
D
D
R
DS(ON)
MAX
I
I
Switching Frequency
SW
Maximum Duty Cycle
Minimum Duty Cycle
MIN
Switch ON Resistance
Switch Current LimitV
CL
Quiescent CurrentSwitching1.52.5mA
Q
Quiescent Current (shutdown)VEN = 0V
I
BOOST
V
EN_TH
I
EN
I
SW
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see Electrical Characteristics.
Note 2: Human body model, 1.5kΩ in series with 100pF.
Note 3: Thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of T
maximum allowable power dissipation at any ambient temperature is PD = (T
board with 2oz. copper on 4 layers in still air. For a 2 layer board using 1 oz. copper in still air, θJA = 204°C/W.
Note 4: Guaranteed to National’s Average Outgoing Quality Level (AOQL).
Note 5: Typicals represent the most likely parametric norm.
– TA)/θJA . All numbers apply for packages soldered directly onto a 3” x 3” PC
J(MAX)
10
40
, θJA and TA . The
J(MAX)
Units
V
%
mΩ
mΩ
nA
V
nA
nA
3www.national.com
Page 4
Typical Performance Characteristics All curves taken at V
TA = 25°C, unless specified otherwise.
= 5V, V
IN
- VSW = 5V, L1 = 2.2 µH and
BOOST
Efficiency vs Load Current
LM2734Z/LM2734ZQ
Efficiency vs Load Current
V
V
OUT
OUT
= 1.5V
= 5V
20130336
Efficiency vs Load Current
V
= 3.3V
OUT
20130351
Oscillator Frequency vs Temperature
20130337
Line Regulation
V
= 1.5V, I
OUT
www.national.com4
= 500mA
OUT
20130354
Line Regulation
V
= 3.3V, I
OUT
= 500mA
OUT
20130327
20130355
Page 5
Block Diagram
LM2734Z/LM2734ZQ
Application Information
THEORY OF OPERATION
The LM2734Z is a constant frequency PWM buck regulator
IC that delivers a 1A load current. The regulator has a preset
switching frequency of 3MHz. This high frequency allows the
LM2734Z to operate with small surface mount capacitors and
inductors, resulting in a DC/DC converter that requires a minimum amount of board space. The LM2734Z is internally
compensated, so it is simple to use, and requires few external
components. The LM2734Z uses current-mode control to regulate the output voltage.
The following operating description of the LM2734Z will refer
to the Simplified Block Diagram (Figure 1) and to the waveforms in Figure 2. The LM2734Z supplies a regulated output
voltage by switching the internal NMOS control switch at constant frequency and variable duty cycle. A switching cycle
begins at the falling edge of the reset pulse generated by the
internal oscillator. When this pulse goes low, the output control logic turns on the internal NMOS control switch. During
this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and the inductor current (IL) increases with a linear
slope. IL is measured by the current-sense amplifier, which
generates an output proportional to the switch current. The
sense signal is summed with the regulator’s corrective ramp
and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and
V
. When the PWM comparator output goes high, the out-
REF
put switch turns off until the next switching cycle begins.
20130306
FIGURE 1.
During the switch off-time, inductor current discharges
through Schottky diode D1, which forces the SW pin to swing
below ground by the forward voltage (VD) of the catch diode.
The regulator loop adjusts the duty cycle (D) to maintain a
constant output voltage.
20130307
FIGURE 2. LM2734Z Waveforms of SW Pin Voltage and
Inductor Current
5www.national.com
Page 6
BOOST FUNCTION
Capacitor C
erate a voltage V
to the internal NMOS control switch. To properly drive the internal NMOS switch during its on-time, V
least 1.6V greater than VSW. Although the LM2734Z will op-
and diode D2 in Figure 3 are used to gen-
BOOST
BOOST
. V
- VSW is the gate drive voltage
BOOST
needs to be at
BOOST
erate with this minimum voltage, it may not have sufficient
gate drive to supply large values of output current. Therefore,
it is recommended that V
LM2734Z/LM2734ZQ
VSW for best efficiency. V
maximum operating limit of 5.5V.
5.5V > V
– VSW > 2.5V for best performance.
BOOST
FIGURE 3. V
be greater than 2.5V above
BOOST
– VSW should not exceed the
BOOST
Charges C
OUT
BOOST
When the LM2734Z starts up, internal circuitry from the
BOOST pin supplies a maximum of 20mA to C
current charges C
switch on. The BOOST pin will continue to source current to
C
until the voltage at the feedback pin is greater than
BOOST
0.76V.
There are various methods to derive V
1.
From the input voltage (VIN)
2.
From the output voltage (V
3.
From an external distributed voltage rail (V
4.
From a shunt or series zener diode
to a voltage sufficient to turn the
BOOST
:
BOOST
)
OUT
In the Simplifed Block Diagram of Figure 1, capacitor
C
and diode D2 supply the gate-drive current for the
BOOST
NMOS switch. Capacitor C
VIN. During a normal switching cycle, when the internal NMOS
control switch is off (T
VIN minus the forward voltage of D2 (V
OFF
current in the inductor (L) forward biases the Schottky diode
D1 (V
). Therefore the voltage stored across C
FD1
V
- VSW = VIN - V
BOOST
is charged via diode D2 by
BOOST
) (refer to Figure 2), V
), during which the
FD2
+ V
FD2
FD1
When the NMOS switch turns on (TON), the switch pin rises
to
forcing V
V
BOOST
VSW = VIN – (R
to rise thus reverse biasing D2. The voltage at
BOOST
is then
V
= 2VIN – (R
BOOST
DSON
x IL),
DSON
x IL) – V
FD2
+ V
which is approximately
2VIN - 0.4V
for many applications. Thus the gate-drive voltage of the
NMOS switch is approximately
VIN - 0.2V
An alternate method for charging C
the output as shown in Figure 3. The output voltage should
is to connect D2 to
BOOST
be between 2.5V and 5.5V, so that proper gate voltage will be
BOOST
)
EXT
BOOST
BOOST
FD1
20130308
. This
equals
is
applied to the internal switch. In this circuit, C
a gate drive voltage that is slightly less than V
In applications where both VIN and V
5.5V, or less than 3V, C
these voltages. If VIN and V
C
can be charged from VIN or V
BOOST
age by placing a zener diode D3 in series with D2, as shown
cannot be charged directly from
BOOST
OUT
are greater than
OUT
are greater than 5.5V,
minus a zener volt-
OUT
BOOST
OUT
provides
.
in Figure 4. When using a series zener diode from the input,
ensure that the regulation of the input supply doesn’t create
a voltage that falls outside the recommended V
(V
– VD3) < 5.5V
INMAX
(V
– VD3) > 1.6V
INMIN
FIGURE 4. Zener Reduces Boost Voltage from V
BOOST
voltage.
20130309
IN
An alternative method is to place the zener diode D3 in a
shunt configuration as shown in Figure 5. A small 350mW to
500mW 5.1V zener in a SOT-23 or SOD package can be used
for this purpose. A small ceramic capacitor such as a 6.3V,
0.1µF capacitor (C4) should be placed in parallel with the
zener diode. When the internal NMOS switch turns on, a pulse
of current is drawn to charge the internal NMOS gate capacitance. The 0.1 µF parallel shunt capacitor ensures that the
V
voltage is maintained during this time.
BOOST
Resistor R3 should be chosen to provide enough RMS current
to the zener diode (D3) and to the BOOST pin. A recommended choice for the zener current (I
current I
of the NMOS control switch and varies typically according to
into the BOOST pin supplies the gate current
BOOST
) is 1 mA. The
ZENER
the following formula:
I
= (D + 0.5) x (V
BOOST
where D is the duty cycle, V
I
is in milliamps. V
BOOST
anode of the boost diode (D2), and VD2 is the average forward
ZENER
is the voltage applied to the
ZENER
voltage across D2. Note that this formula for I
ical current. For the worst case I
by 25%. In that case, the worst case boost current will be
I
BOOST-MAX
= 1.25 x I
– VD2) mA
ZENER
and VD2 are in volts, and
gives typ-
BOOST
, increase the current
BOOST
BOOST
R3 will then be given by
R3 = (VIN - V
For example, let VIN = 10V, V
= 1mA, and duty cycle D = 50%. Then
I
= (0.5 + 0.5) x (5 - 0.7) mA = 4.3mA
BOOST
ZENER
) / (1.25 x I
ZENER
BOOST
+ I
ZENER
)
= 5V, VD2 = 0.7V, I
ZENER
R3 = (10V - 5V) / (1.25 x 4.3mA + 1mA) = 787Ω
www.national.com6
Page 7
20130348
LM2734Z/LM2734ZQ
Design Guide
INDUCTOR SELECTION
The Duty Cycle (D) can be approximated quickly using the
ratio of output voltage (VO) to input voltage (VIN):
The catch diode (D1) forward voltage drop and the voltage
drop across the internal NMOS must be included to calculate
a more accurate duty cycle. Calculate D by using the following
formula:
FIGURE 5. Boost Voltage Supplied from the Shunt Zener
on V
IN
ENABLE PIN / SHUTDOWN MODE
The LM2734Z has a shutdown mode that is controlled by the
enable pin (EN). When a logic low voltage is applied to EN,
the part is in shutdown mode and its quiescent current drops
to typically 30nA. Switch leakage adds another 40nA from the
input supply. The voltage at this pin should never exceed
VIN + 0.3V.
SOFT-START
This function forces V
ing start up. During soft-start, the error amplifier’s reference
to increase at a controlled rate dur-
OUT
voltage ramps from 0V to its nominal value of 0.8V in approximately 200µs. This forces the regulator output to ramp up in
a more linear and controlled fashion, which helps reduce inrush current.
OUTPUT OVERVOLTAGE PROTECTION
The overvoltage comparator compares the FB pin voltage to
a voltage that is 10% higher than the internal reference Vref.
Once the FB pin voltage goes 10% above the internal reference, the internal NMOS control switch is turned off, which
allows the output voltage to decrease toward regulation.
UNDERVOLTAGE LOCKOUT
Undervoltage lockout (UVLO) prevents the LM2734Z from
operating until the input voltage exceeds 2.74V(typ).
The UVLO threshold has approximately 440mV of hysteresis,
so the part will operate until VIN drops below 2.3V(typ). Hysteresis prevents the part from turning off during power up if
VIN is non-monotonic.
CURRENT LIMIT
The LM2734Z uses cycle-by-cycle current limiting to protect
the output switch. During each switching cycle, a current limit
comparator detects if the output switch current exceeds 1.7A
(typ), and turns off the switch until the next switching cycle
begins.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning off
the output switch when the IC junction temperature exceeds
165°C. After thermal shutdown occurs, the output switch
doesn’t turn on until the junction temperature drops to approximately 150°C.
VSW can be approximated by:
VSW = IO x R
DS(ON)
The diode forward drop (VD) can range from 0.3V to 0.7V depending on the quality of the diode. The lower VD is, the higher
the operating efficiency of the converter.
The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor, but
increase the output ripple current. An increase in the inductor
value will decrease the output ripple current. The ratio of ripple
current (ΔiL) to output current (IO) is optimized when it is set
between 0.3 and 0.4 at 1A. The ratio r is defined as:
One must also ensure that the minimum current limit (1.2A)
is not exceeded, so the peak current in the inductor must be
calculated. The peak current (I
by:
I
LPK
) in the inductor is calculated
LPK
= IO + ΔIL/2
If r = 0.5 at an output of 1A, the peak current in the inductor
will be 1.25A. The minimum guaranteed current limit over all
operating conditions is 1.2A. One can either reduce r to 0.4
resulting in a 1.2A peak current, or make the engineering
judgement that 50mA over will be safe enough with a 1.7A
typical current limit and 6 sigma limits. When the designed
maximum output current is reduced, the ratio r can be increased. At a current of 0.1A, r can be made as high as 0.9.
The ripple ratio can be increased at lighter loads because the
net ripple is actually quite low, and if r remains constant the
inductor value can be made quite large. An equation empirically developed for the maximum ripple ratio at any current
below 2A is:
r = 0.387 x I
OUT
-0.3667
Note that this is just a guideline.
The LM2734Z operates at frequencies allowing the use of
ceramic output capacitors without compromising transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple. See the output
capacitor section for more details on calculating output voltage ripple.
7www.national.com
Page 8
Now that the ripple current or ripple ratio is determined, the
inductance is calculated by:
transient is provided mainly by the output capacitor. The output ripple of the converter is:
where fs is the switching frequency and IO is the output current. When selecting an inductor, make sure that it is capable
LM2734Z/LM2734ZQ
of supporting the peak output current without saturating. Inductor saturation will result in a sudden reduction in inductance and prevent the regulator from operating correctly.
Because of the speed of the internal current limit, the peak
current of the inductor need only be specified for the required
maximum output current. For example, if the designed maximum output current is 0.5A and the peak current is 0.7A, then
the inductor should be specified with a saturation current limit
of >0.7A. There is no need to specify the saturation or peak
current of the inductor at the 1.7A typical switch current limit.
The difference in inductor size is a factor of 5. Because of the
operating frequency of the LM2734Z, ferrite based inductors
are preferred to minimize core losses. This presents little restriction since the variety of ferrite based inductors is huge.
Lastly, inductors with lower series resistance (DCR) will provide better operating efficiency. For recommended inductors
see Example Circuits.
INPUT CAPACITOR
An input capacitor is necessary to ensure that VIN does not
drop excessively during switching transients. The primary
specifications of the input capacitor are capacitance, voltage,
RMS current rating, and ESL (Equivalent Series Inductance).
The recommended input capacitance is 10µF, although 4.7µF
works well for input voltages below 6V. The input voltage rating is specifically stated by the capacitor manufacturer. Make
sure to check any recommended deratings and also verify if
there is any significant change in capacitance at the operating
input voltage and the operating temperature. The input capacitor maximum RMS input current rating (I
greater than:
RMS-IN
It can be shown from the above equation that maximum RMS
capacitor current occurs when D = 0.5. Always calculate the
RMS at the point where the duty cycle, D, is closest to 0.5.
The ESL of an input capacitor is usually determined by the
effective cross sectional area of the current path. A large
leaded capacitor will have high ESL and a 0805 ceramic chip
capacitor will have very low ESL. At the operating frequencies
of the LM2734Z, certain capacitors may have an ESL so large
that the resulting impedance (2πfL) will be higher than that
required to provide stable operation. As a result, surface
mount capacitors are strongly recommended. Sanyo
POSCAP, Tantalum or Niobium, Panasonic SP or Cornell
Dubilier ESR, and multilayer ceramic capacitors (MLCC) are
all good choices for both input and output capacitors and have
very low ESL. For MLCCs it is recommended to use X7R or
X5R dielectrics. Consult capacitor manufacturer datasheet to
see how rated capacitance varies over operating conditions.
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load
) must be
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output
ripple will be approximately sinusoidal and 90° phase shifted
from the switching action. Given the availability and quality of
MLCCs and the expected output voltage of designs using the
LM2734Z, there is really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is
their ability to bypass high frequency noise. A certain amount
of switching edge noise will couple through parasitic capacitances in the inductor to the output. A ceramic capacitor will
bypass this noise while a tantalum will not. Since the output
capacitor is one of the two external components that control
the stability of the regulator control loop, most applications will
require a minimum at 10 µF of output capacitance. Capacitance can be increased significantly with little detriment to the
regulator stability. Like the input capacitor, recommended
multilayer ceramic capacitors are X7R or X5R. Again, verify
actual capacitance at the desired operating voltage and temperature.
Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet the following condition:
CATCH DIODE
The catch diode (D1) conducts during the switch off-time. A
Schottky diode is recommended for its fast switching times
and low forward voltage drop. The catch diode should be
chosen so that its current rating is greater than:
ID1 = IO x (1-D)
The reverse breakdown rating of the diode must be at least
the maximum input voltage plus appropriate margin. To improve efficiency choose a Schottky diode with a low forward
voltage drop.
BOOST DIODE
A standard diode such as the 1N4148 type is recommended.
For V
small-signal Schottky diode is recommended for greater effi-
circuits derived from voltages less than 3.3V, a
BOOST
ciency. A good choice is the BAT54 small signal diode.
BOOST CAPACITOR
A ceramic 0.01µF capacitor with a voltage rating of at least
6.3V is sufficient. The X7R and X5R MLCCs provide the best
performance.
OUTPUT VOLTAGE
The output voltage is set using the following equation where
R2 is connected between the FB pin and GND, and R1 is
connected between VO and the FB pin. A good value for R2
is 10kΩ.
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Page 9
LM2734Z/LM2734ZQ
PCB Layout Considerations
When planning layout there are a few things to consider when
trying to achieve a clean, regulated output. The most important consideration when completing the layout is the close
coupling of the GND connections of the CIN capacitor and the
catch diode D1. These ground ends should be close to one
another and be connected to the GND plane with at least two
through-holes. Place these components as close to the IC as
possible. Next in importance is the location of the GND connection of the C
connections of CIN and D1.
capacitor, which should be near the GND
OUT
There should be a continuous ground plane on the bottom
layer of a two-layer board except under the switching node
island.
The FB pin is a high impedance node and care should be
taken to make the FB trace short to avoid noise pickup and
inaccurate regulation. The feedback resistors should be
placed as close as possible to the IC, with the GND of R2
placed as close as possible to the GND of the IC. The V
trace to R1 should be routed away from the inductor and any
OUT
other traces that are switching.
High AC currents flow through the VIN, SW and V
so they should be as short and wide as possible. However,
OUT
traces,
making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close
as possible to the IC. Please see Application Note AN-1229
for further considerations and the LM2734Z demo board as
an example of a four-layer layout.
Calculating Efficiency, and Junction
Temperature
The complete LM2734Z DC/DC converter efficiency can be
calculated in the following manner.
Or
Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are
not discussed.
Power loss (P
the converter, switching and conduction. Conduction losses
usually dominate at higher output loads, where as switching
losses remain relatively fixed and dominate at lower output
loads. The first step in determining the losses is to calculate
the duty cycle (D).
) is the sum of two basic types of losses in
LOSS
VSW is the voltage drop across the internal NFET when it is
on, and is equal to:
VSW = I
OUT
x R
DSON
VD is the forward voltage drop across the Schottky diode. It
can be obtained from the Electrical Characteristics section. If
the voltage drop across the inductor (V
the equation becomes:
) is accounted for,
DCR
This usually gives only a minor duty cycle change, and has
been omitted in the examples for simplicity.
The conduction losses in the free-wheeling Schottky diode
are calculated as follows:
P
DIODE
= VD x I
OUT
(1-D)
Often this is the single most significant power loss in the circuit. Care should be taken to choose a Schottky diode that
has a low forward voltage drop.
Another significant external power loss is the conduction loss
in the output inductor. The equation can be simplified to:
2
= I
OUT
x R
DCR
P
IND
The LM2734Z conduction loss is mainly associated with the
internal NFET:
P
COND
= I
OUT
x R
DSON
x D
2
Switching losses are also associated with the internal NFET.
They occur during the switch on and off transition periods,
where voltages and currents overlap resulting in power loss.
The simplest means to determine this loss is to empirically
measuring the rise and fall times (10% to 90%) of the switch
at the switch node:
P
SWF
P
SWR
= 1/2(VIN x I
= 1/2(VIN x I
PSW = P
OUT
OUT
SWF
x freq x T
x freq x T
+ P
SWR
FALL
RISE
)
)
Typical Rise and Fall Times vs Input Voltage
V
IN
T
RISE
T
FALL
5V8ns4ns
10V9ns6ns
15V10ns7ns
Another loss is the power required for operation of the internal
circuitry:
PQ = IQ x V
IN
IQ is the quiescent operating current, and is typically around
1.5mA. The other operating power that needs to be calculated
is that required to drive the internal NFET:
P
= I
BOOST
V
is normally between 3VDC and 5VDC. The I
BOOST
current is approximately 4.25mA. Total power losses are:
BOOST
x V
BOOST
BOOST
rms
9www.national.com
Page 10
Design Example 1:
Operating Conditions
LM2734Z/LM2734ZQ
V
IN
V
OUT
I
OUT
V
D
Freq3MHzP
I
Q
T
RISE
T
FALL
R
DSON
IND
DCR
5.0VP
2.5VP
1.0AP
0.35VP
1.5mAP
8nsP
8nsP
330mΩ
75mΩ
P
D0.568
η = 82%
Calculating the LM2734Z Junction Temperature
Thermal Definitions:
TJ = Chip junction temperature
TA = Ambient temperature
OUT
DIODE
IND
SWF
SWR
COND
Q
BOOST
LOSS
R
θJC
R
θJA
2.5W
151mW
75mW
53mW
53mW
187mW
7.5mW
21mW
548mW
= Thermal resistance from chip junction to device case
= Thermal resistance from chip junction to ambient air
FIGURE 6. Cross-Sectional View of Integrated Circuit Mounted on a Printed Circuit Board.
Heat in the LM2734Z due to internal power dissipation is removed through conduction and/or convection.
Conduction: Heat transfer occurs through cross sectional areas of material. Depending on the material, the transfer of
heat can be considered to have poor to good thermal conductivity properties (insulator vs conductor).
Heat Transfer goes as:
silicon→package→lead frame→PCB.
Convection: Heat transfer is by means of airflow. This could
be from a fan or natural convection. Natural convection occurs
when air currents rise from the hot device to cooler air.
Thermal impedance is defined as:
Thermal impedance from the silicon junction to the ambient
air is defined as:
www.national.com10
20130373
This impedance can vary depending on the thermal properties of the PCB. This includes PCB size, weight of copper
used to route traces and ground plane, and number of layers
within the PCB. The type and number of thermal vias can also
make a large difference in the thermal impedance. Thermal
vias are necessary in most applications. They conduct heat
from the surface of the PCB to the ground plane. Four to six
thermal vias should be placed under the exposed pad to the
ground plane if the LLP package is used. If the Thin SOT23-6
package is used, place two to four thermal vias close to the
ground pin of the device.
The datasheet specifies two different R
Thin SOT23–6 package. The two numbers show the differ-
numbers for the
θJA
ence in thermal impedance for a four-layer board with 2oz.
copper traces, vs. a four-layer board with 1oz. copper. R
equals 120°C/W for 2oz. copper traces and GND plane, and
θJA
235°C/W for 1oz. copper traces and GND plane.
Page 11
LM2734Z/LM2734ZQ
Method 1:
To accurately measure the silicon temperature for a given
application, two methods can be used. The first method requires the user to know the thermal impedance of the silicon
junction to case. (R
SOT23-6 package. Knowing the internal dissipation from the
) is approximately 80°C/W for the Thin
θJC
efficiency calculation given previously, and the case temperature, which can be empirically measured on the bench we
have:
Therefore:
TJ = (R
θJC
x P
LOSS
) + T
C
Design Example 2:
Operating Conditions
V
IN
V
OUT
I
OUT
V
D
Freq3MHzP
I
Q
T
RISE
T
FALL
R
DSON
IND
DCR
5.0VP
2.5VP
1.0AP
0.35VP
1.5mAP
8nsP
8nsP
330mΩ
75mΩ
OUT
DIODE
IND
SWF
SWR
COND
Q
BOOST
P
LOSS
2.5W
151mW
75mW
53mW
53mW
187mW
7.5mW
21mW
548mW
D0.568
Design Example 3:
Operating Conditions
PackageSOT23-6
V
IN
V
OUT
I
OUT
V
D
Freq3MHzP
I
Q
I
BOOST
V
BOOST
T
RISE
T
FALL
R
DSON
IND
DCR
12.0VP
3.30VP
750mAP
0.35VP
1.5mAP
4mAP
5VP
8nsP
OUT
DIODE
IND
SWF
SWR
COND
Q
BOOST
LOSS
8ns
400mΩ
75mΩ
2.475W
523mW
56.25mW
108mW
108mW
68.2mW
18mW
20mW
902mW
D30.3%
Using a standard National Semiconductor Thin SOT23-6
demonstration board to determine the R
four layer PCB is constructed using FR4 with 1/2oz copper
of the board. The
θJA
traces. The copper ground plane is on the bottom layer. The
ground plane is accessed by two vias. The board measures
2.5cm x 3cm. It was placed in an oven with no forced airflow.
The ambient temperature was raised to 94°C, and at that
temperature, the device went into thermal shutdown.
The second method can give a very accurate silicon junction
temperature. The first step is to determine R
cation. The LM2734Z has over-temperature protection cir-
of the appli-
θJA
cuitry. When the silicon temperature reaches 165°C, the
device stops switching. The protection circuitry has a hysteresis of 15°C. Once the silicon temperature has decreased
to approximately 150°C, the device will start to switch again.
Knowing this, the R
ing the early stages of the design by raising the ambient
for any PCB can be characterized dur-
θJA
temperature in the given application until the circuit enters
thermal shutdown. If the SW-pin is monitored, it will be obvious when the internal NFET stops switching indicating a
junction temperature of 165°C. Knowing the internal power
dissipation from the above methods, the junction temperature
and the ambient temperature, R
can be determined.
θJA
Once this is determined, the maximum ambient temperature
allowed for a desired junction temperature can be found.
If the junction temperature was to be kept below 125°C, then
the ambient temperature cannot go above 54.2°C.
TJ - (R
θJA
x P
LOSS
) = T
A
The method described above to find the junction temperature
in the Thin SOT23-6 package can also be used to calculate
the junction temperature in the LLP package. The 6 pin LLP
package has a R
on the application. R
as described in method #2 (see example 3).
11www.national.com
= 20°C/W, and R
θJC
can be calculated in the same manner
θJA
can vary depending
θJA
Page 12
LLP Package
The LM2734Z is packaged in a Thin SOT23-6 package and
the 6–pin LLP. The LLP package has the same footprint as
the Thin SOT23-6, but is thermally superior due to the exposed ground paddle on the bottom of the package.
LM2734Z/LM2734ZQ
No Pullback LLP Configuration
R
of the LLP package is normally two to three times better
θJA
than that of the Thin SOT23-6 package for a similar PCB configuration (area, copper weight, thermal vias).
20130374
Design Example 4:
Operating Conditions
PackageLLP-6
V
IN
V
OUT
I
OUT
V
D
Freq3MHzP
I
Q
I
BOOST
V
BOOST
T
RISE
T
FALL
R
DSON
IND
DCR
12.0VP
3.3VP
750mAP
0.35VP
1.5mAP
4mAP
5VP
8nsP
OUT
DIODE
IND
SWF
SWR
COND
Q
BOOST
LOSS
8ns
400mΩ
75mΩ
2.475W
523mW
56.25mW
108mW
108mW
68.2mW
18mW
20mW
902mW
D30.3%
This example follows example 2, but uses the LLP package.
Using a standard National Semiconductor LLP-6 demonstration board, use Method 2 to determine R
four layer PCB is constructed using FR4 with 1/2oz copper
of the board. The
θJA
traces. The copper ground plane is on the bottom layer. The
ground plane is accessed by four vias. The board measures
2.5cm x 3cm. It was placed in an oven with no forced airflow.
The ambient temperature was raised to 113°C, and at that
temperature, the device went into thermal shutdown.
20130370
FIGURE 7. Dog Bone
For certain high power applications, the PCB land may be
modified to a "dog bone" shape (see Figure 7). By increasing
the size of ground plane, and adding thermal vias, the R
for the application can be reduced.
www.national.com12
θJA
If the junction temperature is to be kept below 125°C, then the
ambient temperature cannot go above 73.2°C.
TJ - (R
θJA
x P
LOSS
) = T
A
Page 13
Package Selection
To determine which package you should use for your specific
application, variables need to be known before you can determine the appropriate package to use.
1.
Maximum ambient system temperature
2.
Internal LM2734Z power losses
3.
Maximum junction temperature desired
4.
R
of the specific application, or R
θJA
SOT23-6)
The junction temperature must be less than 125°C for the
worst-case scenario.
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