Datasheet LM2724ALD, LM2724AMX, LM2724AM, LM2724ALDX Datasheet (NSC)

LM2724A
High Speed 3A Synchronous MOSFET Driver

General Description

The LM2724A is a dual N-channel MOSFET driver which
can drive both the top and bottom MOSFETs in a push-pull
structure simultaneously. The LM2724A takes a logic input
and splits it into two complimentary signals with a typical
20ns dead time in between. The built-in cross-conduction
protection circuitry prevents the top and bottom MOSFETs
from turning on simultaneously. With a bias voltage of 5V, the
peak sourcing and sinking current for each driver of the
LM2724A is about 3A. Input UVLO (Under-Voltage-Lock­Out) ensures that all the driver outputs stay low until the
supply rail exceeds the power-on threshold during system
power on, or after the supply rail drops below power-on
threshold by a specified hysteresis during system power
down. The cross-conduction protection circuitry detects both
driver outputs and will not turn on a driver until the other
driver output is low. The top gate voltage needed by the top
MOSFET is obtained through an external boot-strap struc­ture. When not switching, the LM2724A only draws up to

195µA from the 5V rail. The synchronization operation of the
bottom MOSFET can be disabled by pulling the SYNC pin to
ground.

Features

n Shoot-through protection
n Input Under-Voltage-Lock-Out
n 3A peak driving current
n 195µA quiescent current
n 28V input voltage in buck configuration
n SO-8 and LLP packages

Applications

n High Current DC/DC Power Supplies
n High Input Voltage Switching Regulators
n Fast Transient Microprocessors
n Notebook Computers

LM2724A High Speed 3A Synchronous MOSFET Driver

June 2003

Typical Application

20073501

© 2003 National Semiconductor Corporation DS200735 www.national.com

Connection Diagram

LM2724A

8-Lead SO (NS Package # M08A)

20073502

= 172˚C/W

θ

JA

8-Lead LLP (NS Package # LDC08A)

Ordering Information

Order Number Size NSC Package

Drawing

LM2724AM SO-8 M08A 95 Units/Rail

LM2724AMX 2500 Units/Reel

LM2724ALD LDC08A LDC08A 1000 Units/Rail

LM2724ALDX 4500 Units/Reel

Pin Descriptions

Pin Name Function

1SW

2 HG Top gate drive output. Should be connected to the top FET gate.

3 BOOT

4 IN Accepts a logic control signal

5 SYNC Bottom gate enable

6V

CC

7LG

8 GND Ground

Top driver return. Should be connected to the common node of top
and bottom FETs

Bootstrap. Accepts a bootstrap voltage for powering the high-side
driver

Connect to +5V supply

Bottom gate drive output. Should be connected to the bottom FET
gate.

= 39˚C/W

θ

JA

Supplied As

20073506

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Block Diagram

LM2724A

20073503

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/

LM2724A

Distributors for availability and specifications.

V

CC

BOOT to SW 7V

7V

Storage Temperature −65˚C to 150˚C

ESD Susceptibility

Human Body Model (Note 4) 2.0 kV

Soldering Time, Temperature 10sec., 300˚C

Operating Ratings (Note 1)

BOOT to GND (Note 2) 35V

V

SW to GND 30V

Junction Temperature +150˚C

Power Dissipation
(Note 3)

720mW (SO-8)

3.2W (LLP-8)

CC

Junction Temperature Range -40˚C to 125˚C

Electrical Characteristics LM2724A

VCC= BOOT = SYNC = 5V, SW = GND = 0V, unless otherwise specified. Typicals and limits appearing in plain type apply for
T

POWER SUPPLY

I

q_op

TOP DRIVER

t

4

t

6

t

3

t

5

BOTTOM DRIVER

t

8

t

2

t

7

t

1

LOGIC

V

uvlo_up

V

uvlo_dn

V

uvlo_hys

V

IH_SYNC

V

IL_SYNC

I

leak_SYNC

= +25˚C. Limits appearing in boldface type apply over the entire operating temperature range.

A=TJ

Symbol Parameter Condition Min Typ Max Units

Operating Quiescent

IN = 0V 145 195 µA

Current

Peak Pull-Up Current 3.0 A

Pull-Up Rds_on I

BOOT=IHG

= 0.3A 1.2 Ω

Peak Pull-down Current −3.2 A

Pull-down Rds_on I

SW=IHG

Rise Time Timing Diagram, C

Fall Time 12 ns

3.3nF

= 0.3A 0.5 Ω

LOAD

=

17 ns

Pull-Up Dead Time Timing Diagram 19 ns

Pull-Down Delay Timing Diagram, from IN

Falling Edge

27 ns

Peak Pull-Up Current 3.2 A

Pull-up Rds_on I

VCC=ILG

= 0.3A 1.1 Ω

Peak Pull-down Current 3.2 A

Pull-down Rds_on I

GND=ILG

Rise Time Timing Diagram, C

Fall Time 14 ns

3.3nF

= 0.3A 0.6 Ω

LOAD

=

17 ns

Pull-up Dead Time Timing Diagram 22 ns

Pull-down Delay Timing Diagram 13 ns

V

CC

Under-Voltage-Lock-Out

rises from 0V toward

V

CC

5V 4 V

Upper Threshold

V

CC

Under-Voltage-Lock-Out

VCC falls from 5V toward
0V 2.5 V

Lower Threshold

V

CC

Under-Voltage-Lock-Out

falls from 5V toward 0V

V

CC

0.8 V

Hysteresis

SYNC Pin High Input 55%

SYNC Pin Low Input 25%

SYNC Pin Leakage
Current

SYNC = 5V, Sink Current 2

SYNC = 0V, Source Current 10

4.3V to 6.8V

V

CC

µA

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Electrical Characteristics
LM2724A

VCC= BOOT = SYNC = 5V, SW = GND = 0V, unless otherwise specified. Typicals and limits appearing in plain type apply for
T

I

leak_IN

t

on_min1

t

on_min2

t

on_min3

t

off_min1

t

off_min2

V

IH_IN

V

IL_IN

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating ratings are conditions under which the device operates
correctly. The gaurnteed specifications apply only for the listed test conditions. Some performance characteristics may degrade when the part is not operated under
listed conditions.

Note 2: If BOOT voltage exceeds this value, the ESD structure will degrade.

Note 3: Maximum allowable power dissipation is a function of the maximum junction temperature, T

ambient temperature, T
ambient thermal resistance, θ
LM2724A LLP package is 39˚C/W. For a T

Note 4: ESD machine model susceptibility is 200V.

Note 5: If the positive pulse width at IN pin is below this value but above t

value.

Note 6: If the positive pulse width at IN pin is below this value but above t

Note 7: If the positive pulse width at IN pin is below this value, the pulse will be completely ignored. Neither HG or LG will respond to it.

Note 8: If the negative pulse width at IN pin is below this value but above t

Note 9: If the negative pulse width at IN pin is below this value, the pulse will be completely ignored. Neither HG or LG will respond to it.

= +25˚C. Limits appearing in boldface type apply over the entire operating temperature range.

A=TJ

Symbol Parameter Condition Min Typ Max Units

(Continued)

IN Pin Leakage Current IN = 0V, Source Current 2 µA

IN = 5V, Sink Current 10

Minimum Positive Pulse
Width at IN Pin

160

(Note 5)

Minimum Positive Pulse
Width at IN Pin for HG to
Respond

45

(Note 6)

Minimum Positive Pulse
Width at IN Pin for LG to
Respond

10

ns

(Note 7)

Minimum Negative Pulse
Width at IN Pin for LG to
Respond

40

(Note 8)

Minimum Negative Pulse
Width at IN Pin for HG to
Respond

5

(Note 9)

IN High Level Input
Voltage

IN Low Level Input
Voltage

. The maximum allowable power dissipation at any ambient temperature is calculated using: P

A

, for LM2724A is 172˚C/W. For a T

JA

of 150˚C and TAof 25˚C, the maximum allowable power dissipation is 3.2W.

JMAX

When IN pin goes high from
0V

When IN pin goes low from
5V

of 150˚C and TAof 25˚C, the maximum allowable power dissipation is 0.7W. The θJA, for

JMAX

, the pulse is internally stretched to t

on_min2

, then HG stops responding while LG still responds to the pulse.

on_min3

, then LG stops responding while HG still responds.

off_min2

55%

25%

, the junction-to-ambient thermal resistance, θJA, and the

JMAX

=(T

MAX

, so the HG width will be a constant

on_min1

)/θJA. The junction-to-

JMAX-TA

V

LM2724A

CC

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Timing Diagram

LM2724A

20073504

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Physical Dimensions inches (millimeters) unless otherwise noted

LM2724A

8-Lead Small Outline Package

Order Number LM2724AM, LM2724AMX

NS Package Number M08A

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

8-Lead LLP Package

Order Number LM2724ALD, LM2724ALDX

NS Package Number LDC08A

LM2724A High Speed 3A Synchronous MOSFET Driver

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