Datasheet LM2686MTCX, LM2686MTC Datasheet (NSC)

LM2686
Regulated Switched Capacitor Voltage Converter

LM2686 Regulated Switched Capacitor Voltage Converter

November 1999

General Description

The LM2686 CMOS charge-pump voltage converter oper­ates as an input voltage doubler and a +5V regulator for an
input voltage in the range of +2.85V to +6.5V. Three low cost
capacitors are used in this circuit to provide up to 50mA of
output current at +5.0V (
130 kHz switching frequency to reduce output resistance
and voltage ripple. With an operating current of only 450µA
(operating efficiency greater than 80%with most loads) and

6.0µA typical shutdown current, the LM2686 is ideal for use
in battery powered systems. The device is in a small 14-pin
TSSOP package.

±

5%). The LM2686 operates at a

Features

n +5V regulated output
n Doubles input supply voltage
n TSSOP 14 package
n 80%typical conversion efficiency at 25mA
n Input voltage range of 2.85V to 6.5V
n Independent shutdown control pins

Applications

n Cellular phones
n Pagers
n PDAs
n Handheld Instrumentation
n 3.3V to 5V Voltage Conversion Applications

Typical Application and Connection Diagram

DS101141-1

Ordering Information

DS101141-2

14-Pin TSSOP

Order Number Package Type

LM2686MTC TSSOP-14 MTC14 94 Units, Rail

LM2686MTCX TSSOP-14 MTC14 2.5k Units, Tape and Reel

© 1999 National Semiconductor Corporation DS101141 www.national.com

NSC Package

Drawing

Supplied As

Pin Description

LM2686

Pin No. Name Function

1V
2 GND
3 GND
4 GND
5 CE Chip enable input. This pin is high for normal operation and low for shutdown and V

6

7V
8 NC No connection.

9 NC No connection.
10 V
11 V
12 V
13 C
14 C

*

All VINpins, pin 1 and pin 7 must be tied together for proper operation.

**

All ground pins, pin 2, pin 3 and pin 4 must be tied together for proper operation.

SD

PSW

DBL

*

IN

**

**

**

Power supply input voltage.
Power supply ground.
Power supply ground.
Power supply ground.

load disconnect.
Shutdown input. This pin is low for normal operation and high for shutdown and V

load disconnect.

*

IN

05

Power supply input voltage.

Regulated +5V output.
V05output connected through a series switch, PSW.
Output of doubled input voltage.

+

1

−

1

The positive terminal of doubling charge-pump capacitor, C1.
The negative terminal of doubling charge-pump capacitor, C1.

PSW

PSW

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V
SD, CE (GND − 0.3V) to

V

Continuous Output Current 80mA

05

V

Short-Circuit Duration to GND

05

(Note 2)
Continuous Power Dissipation (T

=

25˚C) (Note 3)

to GND) 6.8V

IN

(V

In

Indefinite

A

600mW

+ 0.3V)

T

(Note 3) 150˚C

JMAX

θ

(Note 3) 140˚C/W

JA

Operating Ambient Temp. Range −40˚C to 85˚C
Operating Junction Temperature

Range −40˚C to 125˚C
Storage Temp. Range −65˚C to 150˚C
Lead Temp. (Soldering, 10 sec.) 300˚C
ESD Rating (Note 4) 2kV

Electrical Characteristics

Limits with standard typeface apply for T
otherwise specified V

IN

=

3.6V, C

Symbol Parameter Conditions Min Typ Max Units

+

Supply Voltage 2.85 6.5 V

V

I

Supply Current No Load 450 950 µA

Q

I

V

I

(+5V) Output Current at V

L

F

P

V

G

G

LOAD

R

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in­tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: V
Note 3: The maximum allowable power dissipation is calculated by usingP

ambient temperature and θ

Note 4: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 5: In the typical operating circuit, capacitors C

reduce output voltage and efficiency.
Note 6: The 50mA maximum current assumes no current is drawn from V

Shutdown Supply Current V

SD

Shutdown Pin Input Voltage for

SD

CE, SD

Switch Frequency 85 130 180 kHz

SW

Average Power Efficiency at V052.85V<V

EFF

Output Regulation 1mA<I

05

Line Regulation 2.85V<V

LINE

05

Load Regulation 1mA<I
Series Switch Resistance from

SW

to V

V

05

PSW

may be shorted to GND without damage. For temperature above 85˚C, V05must not be shorted to GND or device may be damaged.

05

is the junction-to-ambient thermal resistance of the specified package.

JA

=

25˚C, and limits in boldface type apply over the full temperature range. Unless

J

=

=

C

2.2µF. C

1

3

=

4.7µF. (Note 5)

2

=

6.5V 6 30 µA

IN

Logic Input High@6.5V 2.4

@

Logic Input Low

2.85V<V

=

25mA to GND 82

I

L

L

(Note 6)

<

I

1mA

L

(Note 6)

<

V

3.6V

IN

L

>

V

2.85V 5.0 Ω

IN

and C3are 2.2µF, 0.3Ω maximum ESR capacitors. Capacitors with higherESRwillincrease output resistance,

1

6.5V 0.8

<

6.5V 50 mA

IN

<

6.5V

IN

<

50mA, V

<

50mA, V

<

IN

<

<

50mA, V

DMAX

pin. See Voltage Doubler section in the Detailed Device Description.

DBL

=

6.5V

IN

=

6.5V

IN

4.848 5.05 5.252 V

4.797 5.05 5.303 V

3.6V 0.25

6.5V 0.05
=

6.5V 0.3 1.0

IN

=

(T

JMAX—TA

)/θJA, where T

is the maximum junction temperature,TAis the

JMAX

V

%

%

%

LM2686

/V

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Typical Performance Characteristics Unless otherwise specified, T

LM2686

Supply Current vs Input Voltage

Supply Current vs Temperature

A

=

25˚C, V

=

3.6V.

IN

Efficiency vs Load Current (V

3.0V)

=

IN

DS101141-6

Output Resistance (VDBL) vs.
Temperature (V

=

3.6V)

IN

DS101141-12

V05Load Transient Response

DS101141-15

A: LOAD CURRENT: I
10mA/div

B: OUTPUT VOLTAGE: V

LOAD

05

=

5mA to 39.6mA,

: 10mV/div

DS101141-7

Switch Frequency vs. Temperature

=

(V

3.6V)

IN

DS101141-13

V

Response to CE

PSW

(with 5mA Load)

A: CE INPUT: 5V/div
B: OUTPUT VOLTAGE: V

PSW

DS101141-17

: 5V/div

DS101141-8

Line Transient Response (with 5mA
Load)

DS101141-14

A: INPUT VOLTAGE: V
B: OUTPUT VOLTAGE: V

=

3.2V to 6.0V, 5V/div

IN

: 100mV/div

PSW

V05Response to SD (with 5mA
Load)

A: SD INPUT: 5V/div
B: OUTPUT VOLTAGE: 5V/div

DS101141-18

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Typical Performance Characteristics Unless otherwise specified, T

3.6V. (Continued)

A

=

25˚C, V

LM2686

=

IN

Output Voltage (V
Current

=

(V

3.6V)

IN

) vs. Load

05

DS101141-9

Output Resistance (VDBL) vs. Input
Voltage

DS101141-11

V05Voltage vs. Input Voltage

DS101141-19

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Detailed Device Description

LM2686

FIGURE 1. Functional Block Diagram

The LM2686 CMOS charge pump voltage converter oper­ates as an input voltage doubler, +5V regulator for an input
voltage in the range of +2.85V to +6.5V. It delivers maximum
load currents of 50mA for the regulated +5V,with an operat­ing current of only 450µA. It also has a typical shutdown cur­rent of 6µA. All these performance qualities make the
LM2686 an ideal device for battery powered systems.

The LM2686 has two main functional blocks: a voltage dou­bler and a low dropout (LDO) regulator.
LM2686 functional block diagram.

Voltage Doubler

The voltage doubler ties directly to V
voltage in the range from +2.85V to +5.4V up to 5.7V to

10.8V at the V
off and the input voltage is passed directly to VDBL via an in-

pin. For VINabove 5.4V,the doubler shuts

DBL

ternal power switch.
The doubler contains four large CMOS switches which are

switched in a sequence to double the input supply voltage.

Figure 2

illustrates the voltage conversion scheme. When S2
and S4 are closed, C1 charges to the supply voltage V
During this time interval, switches S1 and S3 are open. In the
next time interval, S2 and S4 are opened at the same time,
S1 and S3 are closed, the sum of the input voltage V
the voltage across C1 gives the 2V
C2 gives the 2V
regulator. It is recommended not to load V

at V

DBL

output. V

IN

a load of 50mA. For proper operation, the sum of V
V

loads must not be more than 50mA.

05

Figure 1

and doubles the input

IN

and the voltage across

In

supplies the LDO

DBL

DBL

shows the

and

IN

when V05has

and

DBL

DS101141-3

+5 LDO Regulator

V

is the input to an LDO regulator that regulates it to a +5

DBL

output voltage at V
switch PSW. The LDO output capacitor (4.7µF Tantalum)

05.VPSW

may be connected to either V

is tied to V05through a series

or V

PSW

.

05

Shutdown and Load Disconnect

In addition to the nominal charge pump and regulator func­tions, the LM2686 features shutdown and load disconnect
circuitry. CE (chip enable) and SD (shutdown positive) per­form the same task with opposite input polarities. When CE
is low or SD is high, all circuit blocks are disabled and V
falls to ground potential. This is the same result as when the

05

die temperature exceeds 150˚C, and the device’s internal
thermal shutdown is triggered.

The LM2686 incorporates a low impedance switch tied to the
V

output, because some special applications require load

05

disconnect and this is achievable via the switch. Switch PSW
connects V
closed, allowing 5V loads to be tied to either V
Forcing CE low or SD high opens the PSW.

.

IN

to V

05

. In normal operation, this switch is

PSW

05

or V

PSW

.

Application Information

Capacitor Selection

The output resistance and ripple voltage are dependent on
the capacitance and ESR values of the external capacitors.

Voltage Doubler External Capacitors

The selection of capacitors are based on the specifications
of the dropout voltage (which equals I
voltage ripple, and the converter efficiency.

OUTROUT

), the output

DS101141-4

FIGURE 2. Voltage Doubler Principle

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where RSWis the sum of the ON resistance of the internal
MOSFET switches as shown in

Figure 2

.

The peak-to-peak output voltage ripple is determined by the
oscillator frequency, the capacitance and ESR of the capaci­tor C3.

Application Information (Continued)

High capacitance (2.2µF to higher), low ESR capacitors can
reduce the output resistance and the voltage ripple.

where IQ(V+) is the quiescent power loss of the IC device,

2

and I

R is the conversion loss associated with the switch

L

on-resistance, the two external capacitors and their ESRs.
Low ESR capacitors (table to be referenced) are recom-

mended to maximize efficiency, reduce the output voltage
drop and voltage ripple.

+5 LDO Regulator External Capacitors

The voltage doubler output capacitor,C3, serves as the input
capacitor of the 5 LDO regulator. The output capacitor C4,
must meet the requirement for minimum amount of capaci­tance and appropriate ESR (Equivalent Serving Resistance)
for proper operations. The ESR value must remain within the
regions of stability as shown in

5

to ensure output’s stability.A minimum capacitance of 1µF
is required at the output. This can be increased without limit,
but a 4.7µF tantalum capacitor is recommended for loads
ranging upto the maximum specification. In lighter loads of
less or equal to 10mA, ceramic capacitor of at least 1µF and
ESR in the milliohms can be used. This has to be connected
to V

pin instead of the V05pin.

PSW

Any output capacitor used should have a good tolerance
over temperature for capacitance and ESR values. The
larger the capacitor, with ESR within the stable region, the
better the stability and noise performance.

Figure 3,Figure 4

and

Figure

FIGURE 3. ESR Curve for C

OUT

DS101141-25

=

2.2µF

LM2686

FIGURE 4. ESR Curve for C

FIGURE 5. ESR Curve for C

OUT

OUT

DS101141-26

=

4.7µF

DS101141-27

=

10µF

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Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Thin Shrink Small-Outline Package

TSSOP-14 Package

For Ordering, Refer to Ordering Information Table

LM2686 Regulated Switched Capacitor Voltage Converter

NS Package Number MTC14

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