Ordering number : ENN*6730
LC86P5420
LC86P5420
8-Bit Single Chip Microcontroller
with the One-Time Programmable PROM
Preliminary
Overview
The LC86P5420 is a CMOS 8-bit single chip microcontroller with one-time PROM for the LC865500 / LC865400
series.
This microcontroller has the function and the pin description of the LC865500 / LC865400 series mask ROM
version, and the 20K-byte PROM.
Features
(1) Option switching by PROM data
The option function of the LC865400 series can be specified by the PROM data.
The LC86P5420 can be checked the functions of the trial pieces using the mass production board.
(2) Internal one-time PROM capacity : 20736 bytes
(3) Internal RAM capacity : 512 bytes
CMOS IC
Mask ROM version PROM capacity RAM capacity
LC865520 20480 bytes 512 bytes
LC865516 16384 bytes 512 bytes
LC865512 12288 bytes 512 bytes
LC865508 8192 bytes 512 bytes
LC865504 4096 bytes 512 bytes
LC865412 12288 bytes 224 bytes
LC865408 8192 bytes 224 bytes
LC865404 4096 bytes 224 bytes
(4) Operating supply voltage : 4.5V to 6.0V
(5) Instruction cycle time : 1.0µs to 366µs
(6) Operating temperature : -30°C to +70°C
(7) The pin and the package compatible with the LC865400 series mask ROM devices
(8) Applicable mask ROM version : LC865520 / LC865516 / LC865512 / LC865508 / LC865504
LC865412 / LC865408 / LC865404
(9) Factory shipment : DIP42S, QFP48E
Ver. 2.00
31395
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
13001 RM (IM) FS
No.6730-1/22
LC86P5420
Notice for use
The LC86P5420 is provided for the first release and small shipping of the LC865500 / LC865400 series.
At using, take notice of the followings.
(1) A point of difference the LC86P5420 and the LC865500 / LC865400 series
Item LC86P5420
Operation after reset The option is specified by degrees The program is executed from 00H of the
releasing until 3ms after going to a 'H' level program counter immediately after going
to the reset terminal. The program to a 'H' level to the reset terminal.
is executed from 00H of the
program counter.
Operating supply 4.5V to 6.0V 2.5V to 6.0V
voltage range (VDD)
Power dissipation Refer to 'electrical characteristics' on the semiconductor news.
The LC86P5420 functions same as the followings while resetting ; LC865520 / 16 / 12 / 08 / 04, LC865412
/ 08 / 04.
The LC86P5420 uses 256 bytes that is addressed on 7F00H to 7FFFH in the program memory as the
option configulation data area.
•A kind of the option corresopnding of the LC86P5420
A kind of option Pins, Circuits Contents of the option
Input / output form of Port 0 1. N-channel open drain output
input / output ports 2. CMOS output *1
Port 1 1. Input : Programmable pull-up MOS Tr.
*1 Output : CMOS
Port 3 1. Input : No Programmable pull-up
*1 Output : CMOS
*1) Specified in bit
*2) Specified in nibble unit. Pull-up MOS Tr. is not provided in N-channel open drain output port.
LC865520 / 16 / 12 / 08 / 04 LC865412 / 08 / 04
1. Pull-up MOS Tr. provided
2. Pull-up MOS Tr. not provided *2
Output : N-channel open drain
2. Input : Programmable pull-up MOS Tr.
MOS Tr.
Output : N-channel open drain
2. Input : Programmable pull-up MOS Tr.
(2) Option
The option data is created by the option specified program "SU86K.EXE". The created option data is
linked to the program area by the linkage loader "L86K.EXE".
No.6730-2/22
LC86P5420
(3) ROM space
The LC86P5420 and LC865500 / LC865400 series use 256 bytes that is addressed on 7F00H to
7FFFH in the program memory as the option specified data area. These program memory capacity are
20480 bytes that is addressed on 0000H to 4FFFH.
7FFFH
7F00H
6FFFH
5FFFH
4FFFH
3FFFH
2FFFH
1FFFH
0FFFH
0000H
Option Data
area 256 bytes
Program Area
20K bytes
LC865520
Option Data Area Option Data Area Option Data Area Option Data Area
Program Area
16K bytes
LC865516
Program Area
12K bytes
LC865512
LC865412
Program Area
08K bytes
LC865508
LC865408
Program Area
04K bytes
LC865504
LC865404
(4) Ordering information
1. When ordering the identical mask ROM and PROM devices simultaneously.
Provide an EPROM containing the tar get memory contents tog ether with the separate order forms for
each of the mask ROM and PROM versions.
2. When ordering a PROM device.
Provide an EPROM containing the target memory contents together with an order form.
How to use
(1) Create a programming data for LC86P5420
Programming data for EPROM of the LC86P5420 is required.
Debugged ev aluation file (EVA f ile) must be conv erted to an INTEL-HEX formatted file (HEX file) with f ile
converter program, EVA2HEX.EXE. The HEX file is used as the programming data for the LC86P5420.
(2) How to program for the EPROM
The LC86P5420 can be programmed by the EPROM programmer with attachment ; W86EP5420D,
W86EP5420Q.
• Recommended EPROM programmer
Productor EPROM programmer
Advantest R4945, R4944, R4943
Andou AF-9704
AVAL PKW-1100, PKW-3000
Minato electronics MODEL1890A
• "27512 (Vpp=12.5V) Intel high speed programming" mode available. The address must be set to
"0000H to 7FFFH" and a jumper (DASEC) must be set to 'OFF' at programming.
No.6730-3/22
LC86P5420
(3) How to use the data security function
"Data security" is the disabled function to read the data of the EPROM.
The following is the process in order to execute the data security.
1. Set 'ON' the jumper of attachment.
2. Program again. Then the EPROM programmer displays the error. The error means normally
activity of the data security. It is not a trouble of the EPROM programmer or the LSI.
Notes
• Data security is not executed when the data of all address have 'FFH' at the sequence 2 above.
• The programming by a sequential operation "BLANK=>PROGRAM=>VERIFY" cannot be executed
data security at the sequence 2 above.
• Set 'OFF' to the jumper after executing the data security.
Data security
Data security
Not data security
W86EP5420D W86EP5420Q
Not data security
No.6730-4/22
Pin Assignment
•DIP42S
LC86P5420
P00
P01
P02
P03
P04
P05
P06
P07
P70/INT0
RES
XT1/P74
XT2/P75
V
SS
CF1
CF2
V
DD
P80/AN0
P81/AN1
P82/AN2
P83/AN3
P84/AN4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 22
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
P17/PWM0
P16/BUZ
P15/SCK1
P14/S11/SB1
P13/SO1
P12/SCK0
P11/SI0/SB0
P10/SO0
P36
P35
P34
P33
P32
P31
P30
P73/INT3/T0IN
P72/INT2/T0IN
P71/INT1
P87/AN7
P86/AN6
P85/AN5
ILC00019
Package Dimension
(unit : mm)
3025B
42
1
37.9
0.95
0.48
1.78
22
13.8
15.24
21
4.25
5.1max
3.8
0.51min
1.15
0.25
SANYO : DIP-42S(600mil)
No.6730-5/22
Pin Assignment
•QFP48E
P12 / SCK0
P11 / SI0 / SB0
P10 / SO0
LC86P5420
P35
P33NCP32
P34
P36
P31
P30
P73 / INT3 / T0IN
P13 / SO1
P14 / SI1 / SB1
P15 / SCK1
P16 / BUZ
P17 / PWM0
NC
P00
P01
P02
P03
P04
NC
363534
37
38
39
40
41
42
43
44
45
46
47
48
123456789
P05
P06
33
P07
P70 / INT0
32
RES
31302928272625
101112
SS
NC
XT1 / P74
CF1
V
XT2 / P75
CF2
*NC pin must not connect to anything.
24
23
22
21
20
19
18
17
16
15
14
13
V
DD
NC
P72 / INT2 / T0IN
P71 / INT1
P87 / AN7
P86 / AN6
P85 / AN5
NC
P84 / AN4
P83 / AN3
P82 / AN2
P81 / AN1
P80 / AN0
ILC00020
Package Dimension
(unit : mm)
3156
17.2
1.6
14.0
0.8
1.5
1.0
1.5
17.2
1.5
12
1.6
0.15
25
24
13
0.1
2.7
3.0max
14.0
0.35
1.0
1.5
36
37
48
1
15.6
SANYO : QIP-48E
No.6730-6/22
System Block Diagram
LC86P5420
Base Timer
SIO0
SIO1
Timer 0
Timer 1
Interrupt Control
Stand-by Control
CF
RC
X'tal
Clock
Generator
Bus Interface
Port 1
Port 3
Port 7
Port 8
IR PLA
EPROM
Control
EPROM(20KB)
PC
ACC
B Register
C Register
A14--A0
D7--D0
TA
CE
OE
DASEC
ALU
ADC
INT0 to 3
Noise Filter
PSW
RAR
RAM
Stack Pointer
Port 0
W atchdog Timer
ILC00035
No.6730-7/22
LC86P5420
Pin Description
Pin name I / O Function description Option PROM mode
V
SS
V
DD
PORT0 I / O •8-bit input / output port •Pull-up resistor :
P00 - P07 Input / output in nibble units Provided / Not provided
PORT1 I / O •8-bit input / output port •Output form : Data line
P10 - P17 Input / output can be specified CMOS / N-channel open drain D0 to D7
PORT3 I / O •7-bit input / output port •Pull-up resistor :
P30 - P36 Input / output in bit unit Provided / Not provided
PORT7 •4-bit input / output port
P70 - P73 I / O P70 : INT0 input / HOLD release PROM control
P74, P75 I P71 :
Power pin (-)
Power pin (+)
•Input for port 0 interrupt (specify every 4-bit)
•Input for HOLD release •Output form :
•15V withstand at N-channel open CMOS / N-channel open drain
drain output (specify in bit)
in bit unit. (specify in bit)
•Other pin functions
P10 SIO0 data output
P11 SIO0 data input /
bus input / output
P12 SIO0 clock input / output
P13 SIO1 data output
P14 SIO1 data input /
bus input / output
P15 SIO1 clock input / output
P16 Buzzer output
P17 Timer1 (PWM0) output
•15V withstand at N-channel open •Output form :
drain output CMOS / N-channel open drain
Input / output in bit unit
•2-bit input port
•Other pin functions
input / N-channel Tr. output for signals
watchdog timer •DASEC (*1)
INT1 input / HOLD release input
P72 :
INT2 input / timer 0 event input
P73 : INT3 input with noise filter /
timer 0 event input
P74 : Input pin XT1 for 32.768kHz
crystal oscillation
P75 : Output pin XT2 for 32.768kHz
crystal oscillation
•Interrupt received form,
vector address
rising falling rising high low vector
& level level
falling
INT0 enable enable disable enable enable 03H
INT1 enable enable disable enable enable 0BH
INT2 enable enable enable disable disable 13H
INT3 enable enable enable disable disable 1BH
•OE (*2)
•CE (*3)
No.6730-8/22
LC86P5420
Pin name I / O Function description Option PROM mode
PORT8
P80 - P83 I •4-bit input port TA (*4)
P84 - P87 I / O •4-bit input / output port
Input / output can be specified in
bit unit
•Other function
AD input port (AN7 to AN0)
RES
XT1 / P74
XT2 / P75 O •Output pin for the 32.768kHz
CF1 I Input pin for the ceramic resonator
CF2 O Output pin for the ceramic resonator
■ All of port options except the pull-up resistor option of Port 0 can be specified in a bit unit.
I Reset pin
I •Input pin for the 32.768kHz cyrstal
oscillation
•Other function
XT1 : Input port P74
In case of non use, connect to V
crystal oscillation
•Other function
XT2 : Input port P75
In case of non use, connect to V
at using as port or unconnect at using
as oscillation.
oscillation
oscillation
DD
DD
*1 Memory select input for data security
*2 Output enable input
*3 Chip enable input
*4 TA---> PROM control signal input
No.6730-9/22
LC86P5420
1. Absolute Maximum Ratings at VSS= 0V and Ta=25°C
Parameter Symbol Pins Conditions
Supply voltage VDDMAX V
Input voltage VI(1)
Input / output VIO(1) •Port 1 -0.3 VDD+0.3
voltage
VIO(2) Ports 0, 3 at N-ch -0.3 15
High Peak IOPH •Ports 0, 1, 3 CMOS output -10 mA
Level output •Ports 71, 72, 73 At each pins
output current •
current Total ∑IOAH(1) Ports 0, 1 The total all -30
output pins
current ∑IOAH(2) Port 3 The total all -15
∑IOAH(3) •Ports 71, 72, 73 The total all -10
Low Peak IOPL(1) Ports 0, 1, 3 At each pins 20
Level output IOPL(2) •
output current •
current Total ∑IOAL(1) Ports 0, 1, 70 The total all 60
output pins
current ∑IOAL(2) Port 3 The total all 40
∑IOAL(3) •Ports 71, 72, 73 The total all 20
Power Pd max (1) DIP42S Ta=-30 to +70°C 630 mW
dissipation Pd max (2) QFP48E Ta=-30 to +70°C 410
(max.)
Operating Topg -30 70 °C
temperature
range
Storage Tstg -65 150
temperature
range
DD
•Ports 74, 75
•
Ports 80, 81, 82, 83
•RES
•Ports 70, 71, 72, 73
•Ports 84, 85, 86, 87
•Ports 0,3 at CMOS
output option
open drain output
option
Ports 84, 85, 86, 87
•
Ports 84, 85, 86, 87
Ports 70, 71, 72, 73
Ports 84, 85, 86, 87
•
Ports 84, 85, 86, 87
V
DD
pins
pins
At each pins 15
pins
pins
VDD [V] min. typ. max.
-0.3 +7.0 V
-0.3 VDD+0.3
Ratings
unit
No.6730-10/22
LC86P5420
2. Recommended Operating Range at Ta= -- 30°C to +70°C, VSS=0V
SS
SS
SS
SS
SS
SS
DD
DD
DD
DD
DD
DD
DD
Ratings
V
DD
13.5
V
DD
13.5
V
DD
V
DD
V
DD
0.2V
0.25V
0.25V
0.25V
0.8V
0.25V
DD
DD
DD
DD
DD
DD
Parameter Symbol Pins Conditions
Operating V
supply tCYC≤400µs
voltage range
HOLD voltage VHD V
Input high VIH(1) Port 0 at CMOS Output disable 4.5 to 6.0 0.33V
voltage output +1.0
Input low VIL(1) Port 0 at CMOS Output disable 4.5 to 6.0 V
voltage output option
Operation tCYC 4.5 to 6.0 0.98 400 µs
cycle time
DD
VIH(2) Port 0 at N-ch Output disable 4.5 to 6.0 0.75V
VIH(3) •Port 1 Output disable 4.5 to 6.0 0.75V
VIH(4) Port 3 at N-ch Output disable 4.5 to 6.0 0.75V
VIH(5) •Port 70 Output disable 4.5 to 6.0 0.75V
VIH(6) Port 70 Output disable 4.5 to 6.0 0.9V
VIH(7) •Port 8 Output disable 4.5 to 6.0 0.75V
VIL(2) Port 0 at N-ch Output disable 4.5 to 6.0 V
VIL(3) •Ports 1, 3 Output disable 4.5 to 6.0 V
VIL(4) •Port 70 Output disable 4.5 to 6.0 V
VIL(5) Port 70 Output disable 4.5 to 6.0 V
VIL(6) •Port 8 Output disable 4.5 to 6.0 V
V
DD
DD
open drain output
option.
•Ports 72, 73
•Port 3 at CMOS
output
open drain output
option.
Port input /
interrupt
•Port 71
•RES
Watchdog timer
•Ports 74, 75 Using as port
open drain output
option.
•Ports 72, 73
Port input /
interrupt
•Port 71
•RES
Watchdog timer -1.0
•Ports 74, 75 Using as port
0.98µs≤ tCYC 4.5 6.0 V
RAMs and 2.0 6.0
Registers hold
voltage at HOLD
mode.
VDD [V] min. typ. max.
unit
No.6730-11/22
LC86P5420
Parameter Symbol Pins Conditions
Oscillation fre- FmCF(1) CF1, CF2 •6MHz (ceramic 4.5 to 6.0 5.88 6 6.12 MHz
quency range resonator oscil-
(Note 1) lation)
•
Refer to figure 1
FmCF(2) CF1, CF2 •3MHz (ceramic 4.5 to 6.0 2.94 3 3.06
resonator oscillation)
•
Refer to figure 1
FmRC RC oscillation 4.5 to 6.0 0.3 0.8 3.0
FsXtal XT1, XT2 •32.768kHz 4.5 to 6.0 32.768 kHz
(crystal oscillation)
•
Refer to figure 2
Oscillation tmsCF(1) CF1, CF2 •6MHz (ceramic 4.5 to 6.0 0.05 0.50 ms
stable time resonator oscilperiod lation)
(Note 1) •
tmsCF(2) CF1, CF2 •3MHz (ceramic 4.5 to 6.0 0.10 1.00
tssXtal XT1, XT2 •32.768kHz 4.5 to 6.0 1.00 1.50 s
(Note 1) The oscillation constant is shown on table 1 and table 2.
Refer to figure 3
resonator oscil lation)
•
Refer to figure 3
(crystal oscillation)
•
Refer to figure 3
VDD [V] min. typ. max.
Ratings
unit
No.6730-12/22
LC86P5420
3. Electrical Characteristics at Ta= -- 30°C to +70°C, VSS=0V
Parameter Symbol Pins Conditions
Input high IIH(1) Ports 0, 3 of Open •Output disable 4.5 to 6.0 5 µA
current drein output •VIN=13.5V
(including off-leak
current of the
output Tr.)
IIH(2) •Port 0 without •Output disable 4.5 to 6.0 1
pull-up MOS Tr. •
•Ports 1, 3 OFF.
•
Ports 70, 71, 72, 73
•Port 8
IIH(3)
IIH(4)
Input low IIL(1) •Ports 1, 3, •Output disable 4.5 to 6.0 -1
current •Port 0 without •
IIL(2)
IIL(3)
Output high VOH(1) Ports 0, 1, 3 IOH=-1.0mA 4.5 to 6.0 VDD-1 V
voltage of CMOS output
VOH(2) •Ports 71, 72, 73 IOH=-0.1mA 4.5 to 6.0 VDD-0.5
Output low VOL(1) Ports 0, 1, 3 IOL=10mA 4.5 to 6.0 1.5
voltage VOL(2) IOL=1.6mA 4.5 to 6.0 0.4
VOL(3) •Ports 71, 72, 73 IOL=1.6mA 4.5 to 6.0 0.4
VOL(4) Port 70 IOL=1.0mA 4.5 to 6.0 0.4
Pull-up MOS Rpu •Ports 0, 1, 3 VOH=0.9 V
Tr. resistor •
Hysteresis VHIS •Port 1 Output disable 4.5 to 6.0 0.1V
voltage •
Pin CP All pins •f=1MHz 4.5 to 6.0 10 pF
capacitance
RES
Ports 74, 75
pull-up MOS Tr. OFF.
•
Ports 70, 71, 72, 73
•Port 8
RES
Ports 74, 75
•
Ports 84, 85, 86, 87
•
Ports 84, 85, 86, 87
Ports 70, 71, 72, 73
•
Ports 84, 85, 86, 87
Ports 70, 71, 72, 73
•RES
Pull-up MOS Tr.
•VIN=V
(including off-leak
current of the
output Tr.)
VIN=V
VIN=V
at using as port
Pull-up MOS Tr
•VIN=V
(including off-leak
current of the
output Tr.)
VIN=V
VIN=V
at using as port
Unmeasurement
terminals for
input are set to
V
•Ta=25°C
SS
DD
DD
DD
SS
SS
SS
level.
VDD [V] min. typ. max.
4.5 to 6.0 1
4.5 to 6.0 1
.
4.5 to 6.0 -1
4.5 to 6.0 -1
4.5 to 6.0 15 40 70 kΩ
DD
Ratings
DD
unit
V
No.6730-13/22
LC86P5420
4. Serial Input / Output Characteristics at Ta=-30°C to +70°C, VSS= 0V
Parameter Symbol Pins Conditions
Cycle tCKCY(1) SCK0, SCK1 Refer to figure 5 4.5 to 6.0 2 tCYC
Low tCKL(1) 4.5 to 6.0 1
level
width
High tCKH(1) 4.5 to 6.0 1
level
Input clockOutput clock
pulse
width
Cycle tCKCY(2) SCK0, SCK1 •Use pull-up 4.5 to 6.0 2
resistor (1kΩ)
Serial clockSerial input
Low tCKL(2) output. 4.5 to 6.0
level •
pulse
width
High tCKH(2) 4.5 to 6.0
level
pulse
width
Data set-up tICK •SI0, SI1 •Data set-up to 4.5 to 6.0 0.1 µs
time •SB0, SB1 SCK0, 1
Data hold tCKI •Data hold from 4.5 to 6.0 0.1
time SCK0, 1
Output delay tCKO(1) •SO0, SO1 •Use pull-up 4.5 to 6.0
time •SB0, SB1 resistor (1kΩ) +0.2
(Serial clock
is extrnal output.
clock)
Output delay tCKO(2) •Data hold from 4.5 to 6.0
time SCK0, 1 +0.2
Serial output
(Serial clock
is internal
clock)
when open drain
Refer to figure 5
•
Refer to figure 5
when open drain
•
Refer to figure 5
VDD [V] min. typ. max.
Ratings
1 / 2 tCKCY
1 / 2 tCKCY
7 / 12 tCYC
1 / 3 tCYC
unit
No.6730-14/22
LC86P5420
5. Pulse Input Conditions at Ta=-30°C to +70°C , V
Parameter Symbol Pins Conditions
High / low tPIH(1) •INT0, INT1 •
level pulse tPIL(1) •INT2 / T0IN able
width •
tPIH(2) INT3 / T0IN •
tPIL(2) (The noise able
rejection clock •
select to 1 / 1.)
tPIH(3) INT3 / T0IN •
tPIL(3) (The noise able
rejection clock •
select to 1 / 16.)
tPIH(4) INT3 / T0IN •
tPIL(4) (The noise able
rejection clock •
select to 1 / 64.)
tPIL(5)
6. A / D Converter Characteristics at Ta=-30°C to +70°C , VSS = 0V
Parameter Symbol Pins Conditions
Resolution N 4.5 to 6.0 8 bit
Absolute ET 4.5 to 6.0 ±1.5 LSB
precision
(Note 2)
Conversion tCAD AD conversion 4.5 to 6.0 15.68 65.28 µs
time
Analog input VAIN AN0 to AN7 4.5 to 6.0 V
voltage range
Analog port IAINH VAIN=V
input current IAINL VAIN=V
(Note 2) Absolute precision excepts quantizing error (±1 / 2 LSB).
(Note 3) The conversion time means the time from executing the AD conversion instruction to setting the
complete digital conversion value to the register.
RES
Interrupt accept-
Timer0-countable
Interrupt accept-
Timer0-countable
Interrupt accept-
Timer0-countable
Interrupt accept-
Timer0-countable
Reset acceptable 4.5 to 6.0 200 µs
time=16 ✕ tCYC
(ADCR2=0) 0.98µs) 4.08µs)
(Note 3)
AD conversion 31.36 130.56
time=32 ✕ tCYC
(ADCR2=1) 0.98µs) 4.08µs)
(Note 3)
SS
= 0V
DD
SS
Ratings
VDD [V] min. typ. max.
4.5 to 6.0 1 tCYC
4.5 to 6.0 2
4.5 to 6.0 32
4.5 to 6.0 128
Ratings
VDD [V] min. typ. max.
(tCYC = (tCYC =
(tCYC = (tCYC =
SS
4.5 to 6.0 1 µA
4.5 to 6.0 -1
V
DD
unit
unit
V
No.6730-15/22
LC86P5420
7. Current Dissipation Characteristics at Ta=-30°C to +70°C, V
Parameter Symbol Pins Conditions
Current IDDOP(1) V
dissipation
during basic tor oscillation
operation •
(Note 4)
IDDOP(2) •FmCF=3MHz 4.5 to 6.0 6.5 14
IDDOP(3) •FmCF=0Hz 4.5 to 6.0 4 12
IDDOP(4) •FmCF=0Hz 4.5 to 6.0 3.5 9
DD
•FmCF=6MHz 4.5 to 6.0 14 26 mA
Ceramic resona-
FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops.
•1 / 1 divider
Ceramic resona-
tor oscillation
•
FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops.
•1 / 2 divider
(when oscillation
stops).
•
FsXtal=32.768kHz
crystal oscillation
•System clock :
RC oscillation
•1 / 2 divider
(when oscillation
stops).
•
FsXtal=32.768kHz
crystal oscillation
•System clock :
crystal oscillation
•Internal RC
oscillation stops.
•1 / 2 divider
VDD [V] min. typ. max.
SS
= 0V
Ratings
unit
No.6730-16/22
LC86P5420
Parameter Symbol Pins Conditions
Current
dissipation •FmCF=6MHz
HALT mode
(Note 4) tor oscillation
Current IDDHOLD V
dissipation
HOLD mode
(Note 4)
(Note 4) The currents of output transistors and pull-up MOS transistors are ignored.
IDDHALT(1)
IDDHALT(2)
IDDHALT(3)
IDDHALT(4)
V
DD
DD
•HALT mode 4.5 to 6.0 4 9 mA
Ceramic resona-
•
FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops.
•1 / 1 devider
•HALT mode 4.5 to 6.0 2.2 5
FmCF=3MHz
Ceramic resona-
tor oscillation
•FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops.
•1 / 2 devider
•HALT mode 4.5 to 6.0 400 1600 µA
FmCF=0Hz
(when oscillation
stops).
•FsXtal=32.768kHz
crystal oscillation
•System clock :
RC oscillation
•1 / 2 devider
•HALT mode 4.5 to 6.0 25 100
FmCF=0Hz
(when oscillation
stops).
•
FsXtal=32.768kHz
crystal oscillation
•System clock :
32.768kHz
•Internal RC
oscillation stops.
•1 / 2 devider
HOLD mode 4.5 to 6.0 0.05 30
VDD [V] min. typ. max.
Ratings
unit
No.6730-17/22
LC86P5420
Table 1. Ceramic resonator oscillation guaranteed constant (main-clock)
A kind of oscillation Producer Oscillator C1 C2
6MHz ceramic resonator Murata CSA 6.00MG 33pF 33pF
oscillation CST 6.00MGW on chip
Kyocera KBR-6.0MSA 33pF 33pF
PBRC 6.00A (chip type) 33pF 33pF
KBR-6.0MKS on chip
PBRC 6.00B (chip type)
3MHz ceramic resonator Murata CSA 3.00MG 33pF 33pF
oscillation CST 3.00MGW on chip
Kyocera KBR-3.0MS 47pF 47pF
* Both C1 and C2 must use K rank (±10%) and SL characteristics.
Table 2. Crystal oscillation guaranteed constant (sub-clock)
A kind of oscillation Producer Oscillator C3 C4
32.768kHz crystal Kyocera KF-38G-13P0200 18pF 18pF
oscillation
* Both C3 and C4 must use J rank (±5%) and CH characteristics.
(It is about the application which is not in need of high precision. Use K rank (±10%) and
SL characteristics.)
Notes •Since the circuit pattern affects the oscillation frequency, place the oscillation-related parts
as close to the oscillation pins as possible with the shortest possible pattern length.
•If you use other oscillators herein, we provide no guarantee for the characteristics.
CF1 CF2
CF
C2C1
XT1 XT2
X'tal
C4C3
Figure 1. Main-clock circuit
Ceramic resonator oscillation
Figure 2. Sub-clock circuit
Cryatal oscillation
ILC00059 ILC00065
No.6730-18/22
Power supply
RES
Internal RC
resonator
oscillation
CF1, CF2
XT1, XT2
LC86P5420
Reset time
tms CF
tss Xtal
V
DD
VDD limit
0V
Operation mode
HOLD release signal
Internal RC
resonator
oscillation
CF1, CF2
XT1, XT2
Operation mode
Unfixed
Reset
OCR6=1
Instruction execution mode
<Reset time and oscillation stable time.>
Valid
tms CF
tss Xtal
Instruction execution modeHOLD
<HOLD release signal and oscillation stable time.>
Figure 3. Oscillation stable time
ILC00044
No.6730-19/22
RES
LC86P5420
V
DD
R
RES
C
RES
(Note) Fix the value of R
sure to reset untill 200µs, after Power supply
has been over inferior limit of supply voltage.
RES,
C
RES
that is
SCK0
SCK1
SI0
SI1
SO0, SO1
SB0, SB1
tCKO
Figure 4. Reset circuit
0.5V
DD
<AC timing point>
tCKCY
tCKL tCKH
tICK tCKI
<Timing> <Test load>
1kΩ
50pF
ILC00052
V
DD
Figure 5. Serial input / output test condition
tPIL tPIH
Figure 6. Pulse input timing condition
ILC00073
ILC00074
No.6730-20/22
LC86P5420
Notice for use
• The construction of the one-time programmable microcomputer with a blank built-in PROM makes it
impossible for Sanyo to completely factory-test it before shipping. To probe reliability of the pro grammed devices, the screening procedure shown in the following figure should always be followed.
• It is not possible to perform a writing test on the blank PROM. 100% yield, therefore, cannot be
guaranteed.
• Keeping the dry packing
The environment must be held at a temparature of 30°C or less and a humidity level of 70% or less.
• After opening the packing
After opening the packing, a controlled environment must be maintained until soldering.
The environment must be held at a temperature of 30°C or less and a humidity level of 70% or less.
Please solder within 96 hours.
a. Shipping with a blank PROM (Programming the data by yourself)
This microcomputer is provided DIP / QFP packages, but the condition before mounting is
different. Refer to the mounting procedure as follows.
DIP
Writing data for program / Verifying
Recommended process of screening
Heat-soak
150±5°C, 24
Reading ascertain of program
Mounting
+1
--0
Hr
QFP
Writing data for program / Verifying
Recommended process of screening
Heat-soak
150±5°C, 24
Reading ascertain of program
Mounting
+1
--0
Hr
b. Shipping with a programmed PROM (Programming the data by Sanyo)
DIP
Mounting
QFP
Mounting
No.6730-21/22
memo :
LC86P5420
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products(including technical data,services) described or
contained herein are controlled under any of applicable local export control laws and regulations,
such products must not be exported without obtaining the export license from the authorities
concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co. , Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of January, 2001. Specifications and information herein are subject to
change without notice.
No.6730-22/22
PS
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