Page 1
®
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
HIGH VOLTAGE RAIL UP TO 600 V
dV/dt IMMUNITY +- 50 V/nsec IN FULL TEM-
PERATURE RANGE
DRIVER CURRENT CAPABILITY :
400 mA SOURCE,
650 mA SINK
SWITCHING TIMES 50/30 nsec RISE/FALL
WITH 1nF LOAD
CMOS/TTL SCHMITT TRIGGER INPUTS
WITH HYSTERESIS AND PULL DOWN
INTERNAL BOOTSTRAP DIODE
OUTPUTS IN PHASE WITH INPUTS
DESCRIPTION
The L6387 is an high-voltage device, manufactured with the BCD"OFF-LINE " technology. I t has
a Driver structure that enables to drive independent referenced N Channel Power MOS or
L6387
SO8 Minidip
ORDERING NUMBERS:
L6387D L6387
IGBT. The Upper (Floating) Section is enabled to
work with voltage Rail up to 600V. The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.
BLOCK DIAGRAM
V
3
CC
DETECTION
2
HIN
1
LIN
UV
BOOTSTRAP DRIVER
LOGIC
LEVEL
SHIFTER
R
S
LVG
DRIVER
V
CC
HVG
DRIVER
D00IN1135
Vboot
8
H.V.
HVG
7
OUT
6
LVG
5
GND
4
Cboot
TO LOAD
May 2001
1/9
Page 2
L6387
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
Vout Output Voltage -3 to Vboot - 18 V
Vcc Supply Voltage - 0.3 to +18 V
Vboot Floating Supply Voltage - 1 to 618 V
Vhvg Upper Gate Output Voltage - 1 to Vboot V
Vlvg Lower Gate Output Voltage -0.3 to Vcc +0.3 V
Vi Logic Input Voltage -0.3 to Vcc +0.3 V
dVout/dt Allowed Output Slew Rate 50 V/ns
Ptot Total Power Dissipation (Tj = 85 °C) 750 mW
Tj Junction Temperature 150 °C
Ts Storage Temperature -50 to 150 °C
Note:
ESD immunity for pins 6, 7 and 8 is guaranteed up to 900V (Human Body Model)
PIN CONNECTION
LIN
HIN
Vcc
GND
1
2
3
4LVG
D97IN517
7
6
5
Vboot8
HVG
OUT
THERMAL DATA
Symbol Parameter SO8 Minidip Unit
R
th j-amb
Thermal Resistance Junction to Ambient 150 100 °C/W
PIN DESCRIPTION
N. Name Type Function
1 LIN I Lower Driver Logic Input
2 HIN I Upper Driver Logic Input
3 Vcc I Low Voltage Power Supply
4 GND Ground
5 LVG (*) O Low Side Driver Output
6 VOUT O Upper Driver Floating Reference
7 HVG (*) O High Side Driver Output
8 Vboot Bootstrap Supply Voltage
(*) The circuit guarantees 0.3V maxim um on the pin (@ I
and the source of the external MOSFET normally used to hold the pin low.
= 10mA). This allows to omit the "bleeder" resistor connected between the gate
sink
2/9
Page 3
L6387
RECOMMENDED OPERATIN G CONDITIONS
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
Vout 6 Output Voltage Note 1 580 V
Vboot-
Vout
fsw Switching Frequency HVG,LVG load CL = 1 nF 400 kHz
Vcc 2 Supply Voltage 17 V
T
Note 1:
ELECTRICAL CHARACTERISTICS
AC Operation (Vcc = 15V; Tj = 25°C)
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
ton 1 vs 7 High/Low Side Driver Turn-On
toff 2 vs 5 High/Low Side Driver Turn-Off
tr 7,5 Rise Time CL = 1000pF 50 ns
tf 7,5 Fall Time CL = 1000pF 30 ns
DC OPERATION (Vcc = 15V; Tj = 25°C)
8 Floating Supply Voltage Note 1 17 V
j
If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V.
Junction Temperature -45 125 °C
Vout = 0V 110 ns
Propagation Delay
Vout = 600V 105 ns
Propagation Delay
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
Low Supply Voltage Section
Vcc 3 Supply Voltage 17 V
Vccth1 Vcc UV Turn On Threshold 5.5 6 6.5 V
Vccth2 Vcc UV Turn Off Threshold 5 5.5 6 V
Vcchys Vcc UV Hysteresis 0.5 V
Iqccu Undervoltage Quiescent Supply
Vcc ≤ 9V 150 220 µA
Current
Iqcc Quiescent Current Vcc = 15V 250 320 µA
R
dson
Bootstrap Driver on Resistance (*) Vcc ≥ 12.5V 125 Ω
Bootstrapped supply Voltage Section
VBS 8 Bootstrap Supply Voltage 17 V
IQBS VBS Quiescent Current HVG ON 200 µA
ILK High Voltage Leakage Current VS = VB = 600V 10 µA
High/Low Side Driver
Iso 5,7 Source Short Circuit Current VIN = Vih (tp < 10µs) 300 400 mA
Isi Sink Short Circuit Current VIN = Vil (tp < 10µs) 450 650 mA
Logic Inputs
Vil 2,3 Low Level Logic Threshold Voltage 1.5 V
Vih High Level Logic Threshold Voltage 3.6 V
Iih High Level Logic Input Current VIN = 15V 50 70 µA
Iil Low Level Logic Input Current VIN = 0V 1 µA
(*) R
is tested in the following way: R
DSON
where I1 is pin 8 current when V
CBOOT
= V
DSON
CBOOT1
(
V
CC
=
(
I
V
1
, I2 when V
− V
CBOOT1
CC,VCBOOT1
CBOOT
− (VCC − V
)
) −
(
I
V
2
CC,VCBOOT2
= V
CBOOT2
CBOOT2
.
)
)
3/9
Page 4
L6387
Figure 1. Typical Rise and Fall Times vs.
Load Capacitance
time
(nsec)
250
200
150
100
50
0
0 1 2 3 4 5 C (nF)
For both high and low side buffers @25˚C Tamb
D99IN1054
Tr
Tf
Input Logic
L6387 Input Logic is V
(17V) compatible. An in-
CC
terlocking features is offered ( see truth table below) to avoid undesired simultaneous turn ON of
both Power Switches driven.
Table 1.
Figure 2. Quiescent Current vs. Supply
Voltage
Iq
(µA)
4
10
3
10
2
10
10
0246810121416V
Q
=
gate
V
gate
and C
EXT
C
EXT
The ratio between the capacitors C
is proportional to the cyclical voltage loss .
It has to be:
D99IN1055
BOOT
(V)
S
Input HIN 0011
LIN 0 1 0 1
Output HVG 0 0 1 0
LVG 0 1 0 0
BOOTSTRAP DRIVER
A bootstrap circuitry is needed to supply the high
voltage section. This function is normally accomplished by a high voltage fast recovery diode (fig.
3a). In the L6387 a patented integrated structure
replaces the external diode. It is realized by a
high voltage DMOS, driven synchronously with
the low side driver (LVG), with in series a diode,
as shown in fig. 3b
An internal charge pump (fig. 3b) provides the
DMOS driving voltage .
The diode connected in series to the DMOS has
been added to avoid undesirable turn on of it.
CBOOT selection and charging
To choose the proper C
BOOT
:
value the external
MOS can be seen as an equivalent capacitor.
This capacitor C
is related to the MOS total
EXT
gate charge :
C
e.g.: if Q
gate
3nF. With C
>>>C
BOOT
is 30nC and V
= 100nF the drop would be
BOOT
EXT
is 10V, C
gate
EXT
is
300mV.
If HVG has to be supplied for a long time, the
selection has to take int o account also t he
C
BOOT
leakage losses.
e.g.: HVG steady state consumption is lower than
200µA, so if HVG T
supply 1µC to C
EXT
is 5ms, C
ON
. This charge on a 1µF ca-
BOOT
has to
pacitor means a voltage drop of 1V.
The internal bootstrap driver gives great advantages: the external fast recovery diode can be
avoided (it usually has great leakage current).
This structure can work only if V
is close to
OUT
GND (or lower) and in the meanwhile the LVG is
on. The charging time (T
charge
) of the C
BOOT
is
the time in which both conditions are f ulfilled and
it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop
due to the DMOS R
(typical value: 125
DSON
Ohm). At low frequency this drop can be neglected. Anyway increasing the frequency it
must be taken in to account.
The following equation is useful to compute the
4/9
Page 5
)
L6387
drop on the bootstrap DMOS:
Q
V
= I
drop
chargeRdson
where Q
power MOS, R
is the gate charge of the external
gate
is the on resistance of the
dson
bootstrap DMOS, and T
→ V
charge
drop
gate
=
T
charge
R
dson
is the charging time
of the bootstrap capacitor.
For example: using a power MOS with a total
gate charge of 30nC the drop on the bootstrap
Figure 3. Bootstrap Driver.
D
BOOT
V
S
HVG
LVG
V
V
BOOT
OUT
H.V.
C
BOOT
TO LOAD
DMOS is about 1V, if the T
drop
30nC
=
BOOT
⋅ 125Ω ~
5µs
is calculated: if this drop is
V
V
has to be taken into account when the volt-
drop
age drop on C
is 5µs. In fact:
charge
0.8V
too high, or the circuit topology doesn’t allow a
sufficient charging time, an external diode can be
used.
V
V
BOOT
OUT
H.V.
C
BOOT
TO LOAD
V
S
HVG
LVG
ab
Figure 4. Turn On Time vs. Temperature
250
@ Vcc = 15V
200
150
Typ.
100
Ton (ns)
50
0
-45 -25 0 25 50 75 100 125
Tj (°C)
D99IN1056
Figure 5. Turn Off Time vs. Temperature
250
@ Vcc = 15V
200
150
Typ.
100
Toff (ns)
50
0
-45 -25 0 25 50 75 100 125
Tj (°C
5/9
Page 6
)
)
L6387
Figure 6. Output Source Current vs.
Temperature
1000
@ Vcc = 15V
800
600
Typ.
400
current (mA)
200
0
-45-250 255075100125
Tj (°C
Figure 7. Output Sink Current vs. Temperature
1000
@ Vcc = 15V
800
600
Typ.
400
curre nt (mA)
200
0
-45 -25 0 25 50 75 100 125
Tj (°C
6/9
Page 7
L6387
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0.260
I 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060
mm inch
OUTLINE AND
MECHANICAL DATA
Minidip
7/9
Page 8
L6387
DIM.
D (1) 4.8 5.0 0.189 0.197
F (1) 3.8 4.0 0.15 0.157
(1) D and F do not include mold flash or protrusions. Mold flash or
potrusions shall not exceed 0.15mm (.006inch).
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020
c1 45° (typ.)
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
L 0.4 1.27 0.016 0.050
M 0.6 0.024
S8° (max.)
mm inch
OUTLINE AND
MECHANICAL DATA
SO8
8/9
Page 9
L6387
Information furnished is believ ed t o be accurate and rel i abl e. However, STM icroel ectronics assumes no responsibility f or the consequences
of use of such informati on nor for any infringement of patents or other ri ghts of third parties which may result from its use. No license is
granted by im plica tion or otherw ise under any patent or pa tent right s of STMicr oelectronic s. Speci fication mentioned in this publication are
subject to c hange without notice. Thi s publication supersedes and replac es all information prev i ously supplied. STMic roel ectronics produc ts
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2001 STMicroelectronics – Printed in Italy – All Rights Reserved
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