Datasheet L6386AD Datasheet (ST)

Features

L6386AD

High-voltage high and low side driver

■ High voltage rail up to 600 V

■ dV/dt immunity ±50 V/nsec in full temperature

range

■ Driver current capability:

– 400 mA source,
– 650 mA sink

■ Switching times 50/30 nsec rise/fall with 1nF

load

■ CMOS/TTL Schmitt trigger inputs with

hysteresis and pull down

■ Under voltage lock out on lower and upper

driving section

■ Integrated bootstrap diode

■ Outputs in phase with inputs

Figure 1. Block diagram

BOOTSTRAP DRIVER

V

HIN

SD

LIN

SGND

CC

4

3

2

1

7 6

UV

DETECTION

UV

DETECTION

LEVEL

SHIFTER

LOGIC

SO-14

Description

The L6386AD is an high-voltage device,
manufactured with the BCD "OFF-LINE"
technology. It has a driver structure that enables
to drive independent referenced Channel Power
MOS or IGBT. The high-side (floating) section is
enabled to work with voltage rail up to 600 V. The
Logic Inputs are CMOS/TTL compatible for ease
of interfacing with controlling devices.

Vboot

VREF

R

R

S

-

+

LVG

DRIVER

V

CC

14

HVG

DRIVER

13

12

H.V.

HVG

OUT

LVG

9

PGND

8

DIAG

5

CIN

C

BOOT

TO LOAD

D97IN520D

July 2008 Rev 1 1/17

www.st.com

17

Contents L6386AD

Contents

1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.1 CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2/17

L6386AD Electrical data

1 Electrical data

1.1 Absolute maximum ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

V

V

V

V

V

dV

P

T

Output voltage -3 to V

out

Supply voltage - 0.3 to +18 V

cc

Floating supply voltage -1 to 618 V

boot

High-side gate output voltage - 1 to V

hvg

Low-side gate output voltage -0.3 to Vcc +0.3 V

lvg

V

Logic input voltage -0.3 to Vcc +0.3 V

i

Open drain forced voltage -0.3 to Vcc +0.3 V

diag

Comparator input voltage -0.3 to 10 V V

cin

/dt Allowed output slew rate 50 V/ns

out

Total power dissipation (TJ = 85 °C) 750 mW

tot

T

Junction temperature 150 °C

j

Storage temperature -50 to 150 °C

stg

- 18 V

boot

V

boot

Note: ESD immunity for pins 12, 13 and 14 is guaranteed up to 900V (Human Body Model)

1.2 Thermal data

Table 2. Thermal data

Symbol Parameter SO-14 Unit

Thermal Resistance Junction to ambient 165 °C/W

R

th(JA)

1.3 Recommended operating conditions

Table 3. Recommended operating conditions

Symbol Pin Parameter Test condition Min Typ Max Unit

V

V

BS

f

sw

V

T

1. If the condition V

2. VBS = V

12 Output voltage

out

(2)

14 Floating supply voltage

Switching frequency HVG,LVG load CL = 1 nF 400 kHz

cc

4 Supply voltage 17 V

J

Junction temperature -45 125 °C

- V

boot

- V

boot

out

< 18 V is guaranteed, V

out

can range from -3 to 580 V

out

3/17

(1)

(1)

17 V

580 V

Pin connection L6386AD

2 Pin connection

Figure 2. Pin connection (Top view)

1

2

3

4

5

6

7 PGND

D97IN521A

14

13

12

11

10

9

8

Table 4. Pin description

LIN

SD

HIN

V

CC

DIAG

CIN

SGND

N° Pin Type Function

1 LIN I Low-side driver logic input

2 SD

(1)

I Shut down logic input

3 HIN I High-side driver logic input

4 VCC Low voltage supply

5 DIAG O Open drain diagnostic output

6 CIN I Comparator input

7 SGND Ground

8 PGND Power ground

(1)

9 LVG

O Low-side driver output

10, 11 N.C. Not connected

V

boot

HVG

OUT

N.C.

N.C.

LVG

12 OUT O High-side driver floating driver

(1)

13 HVG

14 V

1. The circuit guarantees 0.3V maximum on the pin (@ Isink = 10 mA), with VCC >3V. This allows to omit the
"bleeder" resistor connected between the gate and the source of the external MOSFET normally used to
hold the pin low; the gate driver assures low impedance also in SD condition.

O High-side driver output

Bootstrapped supply voltage

boot

4/17

L6386AD Electrical characteristics

3 Electrical characteristics

3.1 AC operation

Table 5. AC operation electrical characteristcs (VCC = 15 V; TJ = 25 °C)

Symbol Pin Parameter Test condition Min Typ Max Unit

t

on

1,3 vs

t

off

t

sd

t

r

t

f

High/low-side driver turn-on
propagation delay

9,13

High/low-side driver turn-off
propagation delay

2 vs

Shut down to high/low side

9,13

propagation delay

Rise time C

9, 13

Fall time CL = 1000 pF 30 ns

3.2 DC operation

Table 6. DC operation electrical characteristcs (VCC = 15 V; TJ = 25 °C)

Symbol Pin Parameter Test condition Min Typ Max Unit

Low supply voltage section

V

ccth1

V

ccth2

V

cchys

I

qccu

I

qcc

Bootstrapped supply section

V

cc

Vcc UV turn off threshold 7.9 8.3 8.8 V

Vcc UV hysteresis 1.3 V

4

Undervoltage quiescent
supply current

Quiescent current Vcc = 15 V 250 320 µA

110 150 ns

= 0 V

V

out

110 150 ns

105 150

= 1000 pF 50 ns

L

UV turn on threshold 9.1 9.6 10.1 V

≤ 9 V 200 µA

V

cc

V

bth1

V

V

bth2

V

V

I

qboot

R

DS(on)

bhys

I

14

lk

V

UV turn on threshold 8.5 9.5 10.5 V

boot

UV turn off threshold 7.2 8.2 9.2 V

boot

UV hysteresis 1.3 V

boot

V

quiescent current HVG ON 200 µA

boot

High voltage leakage current

Bootstrap driver on
resistance

(1)

Vhvg = Vout = Vboot
= 600 V

Vcc ≥ 12.5 V;
Vin = 0 V

125 Ω

5/17

10 µA

Electrical characteristics L6386AD

Table 6. DC operation electrical characteristcs (continued)(VCC = 15 V; TJ = 25 °C)

Symbol Pin Parameter Test condition Min Typ Max Unit

Driving buffers section

I

so

I

si

9, 13High/low side source short

9, 13High/low side sink short

Logic inputs

V

il

V

ih

1,2,

I

ih

I

il

3

Sense comparator

V

io

I

V

V

1. R

where I

io

ref

DS(on)

6 Input bias current V

2

ol

is tested in the following way:

is pin 14 current when V

1

= Vih (tp < 10 µs) 300 400 mA

V

circuit current

circuit current

IN

VIN = Vil (tp < 10 µs) 500 650 mA

Low level logic voltage 1.5 V

High level logic voltage

3.6 V

High level logic input current VIN = 15 V 50 70 µA

Low level logic input current VIN = 0 V 1 µA

Input offset voltage -10 10 mV

≥ 0.5 0.2 µA

cin

Open drain low level output
voltage

Comparator reference
voltage

V

R

DSON

CBOOT

CCVCBOOT1

------------------------------------------------------------------------------------------------------ -=

()I2VCC,V

I

1VCC,VCBOOT1

= V

CBOOT1

Iod = -2.5 mA 0.8 V

0.46 0.50 0.54 V

–()VCCV

, I2 when V

CBOOT

()–

= V

–()–

CBOOT2

CBOOT2

CBOOT2

6/17

L6386AD Electrical characteristics

3.3 Timing diagram

Figure 3. Input/output timing diagram

HIN

LIN

SD

HOUT
LOUT

V

REF

V

CIN

DIAG

Note: SD active condition is latched until next negative IN edge.

D97IN522A

7/17

Bootstrap driver L6386AD

4 Bootstrap driver

A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6386AD a patented
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low side driver (LVG), with in series a diode, as shown in

Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The

diode connected in series to the DMOS has been added to avoid undesirable turn on of it.

4.1 C

To choose the proper C
capacitor. This capacitor C

The ratio between the capacitors C
It has to be:

e.g.: if Q
300 mV.

If HVG has to be supplied for a long time, the C
the leakage losses.

e.g.: HVG steady state consumption is lower than 200 µA, so if HVG T
to supply 1 µC to C

The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has great leakage current).

This structure can work only if V
LVG is on. The charging time (T
fulfilled and it has to be long enough to charge the capacitor.

BOOT

selection and charging

value the external MOS can be seen as an equivalent

BOOT

is related to the MOS total gate charge:

EXT

C

EXT

and C

EXT

C

is 30 nC and V

gate

. This charge on a 1 µF capacitor means a voltage drop of 1 V.

EXT

is 10 V, C

gate

charge

EXT

is close to GND (or lower) and in the meanwhile the

OUT

) of the C

Q

gate

-------------- -=

V

gate

is proportional to the cyclical voltage loss.

BOOT

>>>C

BOOT

EXT

is 3 nF. With C

BOOT

BOOT

= 100 nF the drop would be

BOOT

selection has to take into account also

is 5ms, C

ON

BOOT

has

is the time in which both conditions are

The bootstrap driver introduces a voltage drop due to the DMOS R
125 Ω). At low frequency this drop can be neglected. Anyway increasing the frequency it
must be taken in to account.

The following equation is useful to compute the drop on the bootstrap DMOS:

==

V

dropIch eargRdsonVdrop

where Q
bootstrap DMOS, and T

8/17

is the gate charge of the external power MOS, R

gate

is the charging time of the bootstrap capacitor.

charge

→

Q

gate

-------------------

T

ch earg

(typical value:

DS(on)

R

dson

is the on resistance of the

dson

L6386AD Bootstrap driver

For example: using a power MOS with a total gate charge of 30 nC the drop on the
bootstrap DMOS is about 1 V, if the T

V

drop

V

has to be taken into account when the voltage drop on C

drop

is 5 µs. In fact:

charge

30nC

-------------- -

5µs

125Ω 0.8 V∼⋅=

is calculated: if this drop

BOOT

is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.

Figure 4. Bootstrap driver

D

BOOT

V

S

HVG

LVG

ab

V

BOOT

H.V.

C

BOOT

V

OUT

TO LOAD

V

S

HVG

LVG

V

BOOT

H.V.

C

BOOT

V

OUT

TO LOAD

D99IN1056

9/17

Typical characteristic L6386AD

5 Typical characteristic

Figure 5. Typical rise and fall times vs

time

(nsec)

250

200

150

100

50

0

load capacitance

D99IN1054

Tr

Tf

0 1 2 3 4 5 C (nF)

For both high and low side buffers @25˚C Tamb

Figure 6. Quiescent current vs supply

Iq

(µA)

4

10

3

10

2

10

10

246810121416V

0

Figure 7. Turn on time vs temperature Figure 8. V

250

200

150

Typ.

100

Ton (ns)

50

0

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (°C)

15

14

13

Typ.

12

11

Vbth1 (V)

10

9

8

7

-45 -25 0 25 50 75 100 125

voltage

UV turn on threshold

BOOT

vs temperature

@ Vcc = 15V

Tj (°C)

D99IN1057

(V)

S

Figure 9. Turn Off time vs temperature Figure 10. V

250

200

150

Typ.

100

Toff (ns)

50

0

-45 -25 0 25 50 75 100 125

10/17

@ Vcc = 15V

Tj (°C)

UV turn off threshold

BOOT

vs temperature

15

14

13

12

11

Vbth2 (V)

Typ.

10

9

8

7

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (°C)

L6386AD Typical characteristic

Figure 11. Shutdown time vs

250

200

150

tsd (ns0

100

temperature

@ Vcc = 15V

Typ.

50

0

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 13. VCC UV turn on threshold vs

15

14

13

12

Vccth1(V)

11

10

temperature

Typ.

Figure 12. V

3

UV hysteresis

BOOT

@ Vcc = 15V

2.5

Typ.

2

Vbhys (V)

1.5

1

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 14. Output source current vs

temperature

1000

800

600

Typ.

current (mA)

400

200

@ Vcc = 15V

9

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 15. VCC UV turn off threshold vs

12

11

10

Vccth2(V)

temperature

Typ.

9

8

7

-45 -25 0 25 50 75 100 125

Tj (°C)

0

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 16. Output sink current vs

temperature

1000

800

Typ.

600

400

current (mA)

200

0

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (°C)

11/17

Typical characteristic L6386AD

Figure 17. VCC UV hysteresis vs

2.5

Vcchys (V)

1.5

temperature

3

Typ.

2

1

-45 -25 0 25 50 75 100 125
Tj (°C)

12/17

L6386AD Package mechanical data

6 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com

13/17

Package mechanical data L6386AD

Figure 18. SO-14 mechanical data and package dimensions

DIM.

A 1.35 1.75 0.053 0.069

A1 0.10 0.30 0.004 0.012

A2 1.10 1.65 0.043 0.065

B 0.33 0.51 0.013 0.020

C 0.19 0.25 0.007 0.01

(1)

D

E 3.80 4.0 0.150 0.157

e 1.27 0.050

H 5.8 6.20 0.228 0.244

h 0.25 0.50 0.01 0.02

L 0.40 1.27 0.016 0.050

k 0° (min.), 8° (max.)

ddd 0.10 0.004

(1) “D” dimension does not include mold flash, protusions or gate

burrs. Mold flash, protusions or gate burrs shall not ex ceed

0.15mm per side.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

8.55 8.75 0.337 0.344

OUTLINE AND

MECHANICAL DATA

SO-14

14/17

0016019 D

L6386AD Order codes

7 Order codes

Table 7. Order codes

Order codes Package Packaging

L6386AD SO-14 Tube

L6386AD013TR SO-14 Tape and reel

15/17

Revision history L6386AD

8 Revision history

Table 8. Document revision history

Date Revision Changes

14-Jul-2008 1 First release

16/17

L6386AD

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