Datasheet L6385E, L6385ED Specification

High voltage high and low-side driver

DIP-8 SO-8

Features

 High voltage rail up to 600 V
 dV/dt immunity ± 50 V/nsec in full temperature

range

 Driver current capability:

– 400 mA source
– 650 mA sink

 Switching times 50/30 nsec rise/fall with 1 nF

load

 CMOS/TTL Schmitt trigger inputs with

hysteresis and pull-down

 Undervoltage lockout on lower and upper

driving section

 Internal bootstrap diode
 Outputs in phase with inputs

Applications

 Home appliances
 Induction heating
 HVAC
 Motor drivers

– SR motors
– DC, AC, PMDC and PMAC motors

 Asymmetrical half-bridge topologies
 Industrial applications and drives
 Lighting applications
 Factory automation
 Power supply systems

L6385E

Datasheet - production data

Description

The L6385E is a simple and compact high volt age
gate driver , manufactured with the BCD™ “of fline”
technology, and able to drive a half-bridge of
power MOSFET or IGBT devices. The high-side
(floating) section is able to work with voltage rail
up to 600 V . Both device outputs can
independently sink and source 650 mA and 400
mA respectively and can be simultaneously
driven high.

The L6385E device provides two input pins and
two output pins and guarantees the outputs tog gle
in phase with inputs. The logic inputs are
CMOS/TTL compatible to ease the interfacing
with controlling devices.

The bootstrap diode is integrated inside the
device, allowing a more compact and reliable
solution.

The L6385E features the UVLO protection on
both lower and upper driving sections (V
V

), ensuring greater protection against volt age

boot

drops on the supply lines.
The device is available in a DIP-8 tube and SO-8

tube, and tape and reel packaging options.

Part number Package Packaging

L6385ED SO-8 Tube

L6385ED013TR SO-8 Tape and reel

Table 1. Device summary

L6385E DIP-8 Tube

CC

and

December 2014 DocID13863 Rev 3 1/15

This is information on a product in full production.

www.st.com

Contents L6385E

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4.3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

C

selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

BOOT

6 Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2/15 DocID13863 Rev 3

L6385E Block diagram

LOGIC

UV

DETECTION

LEVEL

SHIFTER

BOOTSTRAP DRIVER

R
R
S

V

CC

LVG

DRIVER

V

CC

8

7

6

5

4

HIN

LIN

HVG

DRIVER

HVG

H.V.

TO LOAD

OUT

LVG

GND

D97IN514B

Vboot

3

2

1

Cboot

UV

DETECTION

1 Block diagram

Figure 1. Block diagram

DocID13863 Rev 3 3/15

15

Electrical data L6385E

2 Electrical data

2.1 Absolute maximum ratings

Symbol Parameter Value Unit

V

V

V

V

V

dV

P

T

Output voltage -3 to V

out

Supply voltage - 0.3 to +18 V

cc

Floating supply voltage -1 to 618 V

boot

High-side gate output voltage -1 to V

hvg

Low-side gate output voltage -0.3 to Vcc +0.3 V

lvg

Logic input voltage -0.3 to Vcc +0.3 V

V

i

Allowed output slew rate 50 V/ns

out/dt

Total power dissi pation (TJ = 85 °C) 750 mW

tot

T

Junction temperature 150 °C

j

Storage temperature -50 to 150 °C

s

2.2 Thermal data

Symbol Parameter SO-8 DIP-8 Unit

Table 2. Absolute maximum ratings

Table 3. Thermal data

-18 V

boot

V

boot

R

Thermal resistance junction to ambient 150 100 °C/W

th(JA)

2.3 Recommended operating conditions

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

V

out

V

BS

f

sw

V

cc

T

1. If the condition V

2. VBS = V

6 Output voltage

(2)

8 Floating supply voltage

3 Supply voltage 17 V

J

- V

boot

Table 4. Recommended operating conditions

Switching frequency HVG,LVG load CL = 1 nF 400 kHz

Junction temperature -45 125 °C

- V

out

boot

.

< 18 V is guaranteed, V

out

can range from -3 to 580 V.

out

(1)
(1)

17 V

580 V

4/15 DocID13863 Rev 3

L6385E Pin connection

V

CC

HIN

LIN

GND

1

3

2

4 LVG

OUT

HVG

V

boot

8
7
6
5

D97IN517A

3 Pin connection

Figure 2. Pin connection (top view)

Table 5. Pin description

No. Pin Type Function

1 LIN I Low-side driver logic input
2 HIN I High-side driver logic input
3 V

P Low voltage power supply

CC

4 GND P Ground
5 LVG

(1)

O Low-side driver output
6 OUT P High-side driver floating reference
7 HVG
8 V

1. The circuit guarantees 0.3 V maximum on the pin (at Isink = 10 mA). This allows to omit the “bleeder”
resistor connected between the gate and the source of the external MOSFET normally used to hold the pin
low.

(1)

O High-side driver output

P Bootstrap supply voltage

boot

DocID13863 Rev 3 5/15

15

Electrical characteristics L6385E

4 Electrical characteristics

4.1 AC operation

Table 6. AC operation electrical characteristics (VCC = 15 V; TJ = 25 °C)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

t

t

1 vs. 5

on

2 vs. 7
1 vs. 5

off

2 vs. 7

t

r

t

f

High/low-side driver turn-on
propagation delay

High/low-side driver turn-off
propagation delay

= 0 V 110 ns

V

out

= 0 V 105 ns

V

out

5, 7 Rise time CL = 1000 pF 50 ns
5, 7 Fall time CL = 1000 pF 30 ns

4.2 DC operation

Table 7. DC operation electrical characteristics (VCC = 15 V; TJ = 25 °C)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

Low supply voltage section

V
V
V
V

cchys

I

qccu

cc
ccth1
ccth2

Supply voltage 17 V
VCC UV turn-on threshold 9.1 9.6 10.1 V
VCC UV turn-off threshold 7.9 8.3 8.8 V
VCC UV hysteresis 1.3 V

3

Undervoltage quiescent supply
current

V

 9 V 150 220 A

cc

I

qcc

R

dson

Quiescent current Vin = 15 V 250 320 A
Bootstrap driver on resistance

(1)

V

 12.5 V 125 

cc

Bootstrapped supply voltage section

V

BS

V

V

BSth1

V

V

BSth2

V

V

BShys

I

QBS

I

LK

Bootstrap supply voltage 17 V

UV turn-on threshold 8.5 9.5 10.5 V

BS

UV turn-off threshold 7.2 8.2 9.2 V

BS

8

UV hysteresis 1.3 V

BS

VBS quiescent current HVG ON 200 A
High voltage leakage current V

hvg

= V

out

= V

= 600 V 10 A

boot

High/low-side driver

I

so

I

Sink short-circuit current VIN = Vil (tp < 10 s) 450 650 mA

si

Source short-circuit current V

5, 7

= Vih (tp < 10 s) 300 400 mA

IN

6/15 DocID13863 Rev 3

L6385E Electrical characteristics

R

DSON

V

CCVCBOOT1

–V

CCVCBOOT2

––

I

1VCC,VCBOOT1

I2VCC,V

CBOOT2

–

------------------------------------------------------------------------------------------------------ -=

HIN

HVG

LVG

LIN

D99IN1053

Table 7. DC operation electrical characteristics (VCC = 15 V; TJ = 25 °C) (continued)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

Logic inputs

Vil

Low level logic threshold voltage 1.5 V

1, 2

V

ih

I

ih

I

il

1. R

where I

is tested in the following way:

DS(on)

is pin 8 current when V

1

High level logic threshold voltage
High level logic input current V

1, 2

Low level logic input current VIN = 0 V 1 A

CBOOT

= V

CBOOT1

, I2 when V

4.3 Timing diagram

Figure 3. Input/output timing diagram

3.6 V
= 15 V 50 70 A

IN

CBOOT

= V

CBOOT2

.

DocID13863 Rev 3 7/15

15

Bootstrap driver L6385E

C

EXT

Q

gate

V

gate

-------------- -=

V

dropIch eargRdsonVdrop



Q

gate

T

ch earg

------------------- R

dson

==

5 Bootstrap driver

A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6385E device
a patented integrated structure replaces the external diode. It is realized by a high voltage
DMOS, driven synchronously with the low-side driver (LVG), with a diode in series, as
shown in Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving
voltage. The diode connected in series to the DMOS has been added to avoid undesirable
turn-on.

C

BOOT

selection and charging

To choose the proper C
capacitor. This capacitor C

Equation 1

The ratio between the capacitors C
It has to be:

E.g.: if Q

is 30nC and V

gate

300 mV.
If HVG has to be supplied for a long time, the C

the leakage losses.
E.g.: HVG steady state consumption is lower than 200 A, so if HVG T

has to supply a maximum of 1 µC to C
drop of 1 V.

The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has a great leakage current).

This structure can work only if V
L VG is on. The ch argin g time (T
fulfilled and it has to be long enough to charge the capacitor.

value, the external MOS can be seen as an equivalent

BOOT

is related to the MOS total gate charge:

EXT

is 10V, C

gate

and C

EXT

C

BOOT

EXT

. This charge on a 1mF capacitor m eans a volt age

EXT

is close to GND (or lower) and in the meanwhile the

OUT

) of the C

charge

is proportional to the cyclical voltage loss.

BOOT

>>>C

EXT

is 3nF. With C

selection has to take into account also

BOOT

is the time in which both conditions are

BOOT

= 100nF the drop would be

BOOT

ON

is 5 ms, C

BOOT

The bootstrap driver introduces a voltage drop due to the DMOS R
125 ). At low frequency this drop can be neglected. Anyway increasing the frequency it
must be taken in to account.

The following equation is useful to compute the drop on the bootstrap DMOS:

Equation 2

where Q
bootstrap DMOS, and T

8/15 DocID13863 Rev 3

is the gate charge of the external power MOS, R

gate

is the charging time of the bootstrap capacitor.

charge

(typical value:

DSON

is the on resistance of the

dson

L6385E Bootstrap driver

V

drop

30nC

5 s

-------------- - 125 0.8V=

TO LOAD

D99IN1056

H.V.

HVG

ab

LVG

HVG

LVG

C

BOOT

TO LOAD

H.V.

C

BOOT

D

BOOT

V

BOOT

V

S

V

S

V

OUT

V

BOOT

V

OUT

For example: using a power MOS with a total gate charge of 30 nC the drop on the
bootstrap DMOS is about 1 V, if the T

is 5 ms. In fact:

charge

Equation 3

V

has to be taken into account when the voltage drop on C

drop

is calculated: if this drop

BOOT

is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diod e
can be used.

Figure 4. Bootstrap driver

DocID13863 Rev 3 9/15

15

Typical characteristic L6385E

For both high and low side buffers @25˚C Tamb

0 1 2 3 4 5 C (nF)

0

50

100

150

200

250

time

(nsec)

Tr

D99IN1054

Tf

0

2 4 6 8 10 12 14 16 V

S

(V)

10

10

2

10

3

10

4

Iq

(μA)

D99IN1055

-45 -25 0 25 50 75 100 125

0

50

100

150

200

250

Ton (ns)

Tj (°C)

Typ.

@ Vcc = 15V

-45 -25 0 25 50 75 100 125

0

50

100

150

200

250

Toff (ns)

Tj (°C)

Typ.

@ Vcc = 15V

-45 -25 0 25 50 75 100 125

5

6

7

8

9

10

11

12

13

Vbth1 (V)

Tj (°C)

Typ.

@ Vcc = 15V

-45 -25 0 25 50 75 100 125

6

7

8

9

10

11

Vccth2(V)

Tj (°C)

Typ.

6 Typical characteristic

Figure 5. Typical rise and fall times

Figure 7. Turn-on time vs. temperature Figure 8. Turn-off time vs. temperature

vs. load capacitance

Figure 6. Quiescent current vs. supply

voltage

10/15 DocID13863 Rev 3

Figure 9. V

UV turn-on threshold

BOOT

vs. temperature

Figure 10. VCC UV turn-off threshold

vs. temperature

L6385E Typical characteristic

-45 -25 0 25 50 75 100 125

6

7

8

9

10

11

12

13

14

Vbth2 (V)

Typ.

@ Vcc = 15V

-45 -25 0 25 50 75 100 125

0

200

400

600

800

1000

current (mA)

Tj (°C)

Typ.

@ Vcc = 15V

-45 -25 0 25 50 75 100 125

0

200

400

600

800

1000

current (mA)

Tj (°C)

Typ.

@ Vcc = 15V

-45 -25 0 25 50 75 100 125

7

8

9

10

11

12

13

Vccth1(V)

Tj (°C)

Typ.

-45 -25 0 25 50 75 100 125

0

200

400

600

800

1000

current (mA)

Tj (°C)

Typ.

@ Vcc = 15V

Figure 11. V

Figure 13. VCC UV turn-on threshold

UV turn-off threshold

BOOT

vs. temperature

vs. temperature

Figure 12. Output source current

vs. temperature

Figure 14. Output sink current

vs. temperature

DocID13863 Rev 3 1 1/15

15

Package information L6385E

7 Package information

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.

Figure 15. DIP-8 package outline

Table 8. DIP-8 package mechanical data

Dimensions (mm) Dimensions (inch)

Symbol

Min. Typ. Max. Min. Typ. Max.

A 3.32 0.131

a1 0.51 0.020

B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022

b1 0.204 0.304 0.008 0.012

D 10.92 0.430

E 7.95 9.75 0.313 0.384

e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300

F 6.6 0.260

I 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060

12/15 DocID13863 Rev 3

L6385E Package information

$09

Figure 16. SO-8 package outline

Table 9. SO-8 package mechanical data

Dimensions (mm) Dimensions (inch)

Symbol

Min. Typ. Max. Min. Typ. Max.

A 1.750 0.0689

A1 0.100 0.250 0.0039 0.0098
A2 1.250 0.0492

b 0.280 0.480 0.0110 0.0189
c 0.170 0.230 0.0067 0.0091

(1)

D

4.800 4.900 5.000 0.1890 0.1929 0.1969

E 5.800 6.000 6.200 0.2283 0.2362 0.2441

E1

(2)

3.800 3.900 4.000 0.1496 0.1535 0.1575
e 1.270 0.0500
h 0.250 0.500 0.0098 0.0197
L 0.400 1.270 0.0157 0.0500

L1 1.040 0.0409

k0°8°0°8°

ccc 0.10 0.0039

1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both sides).

2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.

DocID13863 Rev 3 13/15

15

Revision history L6385E

8 Revision history

Table 10. Document revision history

Date Revision Changes

02-Oct-2007 1 First release

Added Section : Applications on page 1.
Updated Section : Description on page 1 (replaced by new

description).
Updated Table 1: Device summary on page 1 (moved from page 15

to page 1, renamed title of Table 1).
Updated Figure 1: Block diagram on page 3 (moved from page 1 to

page 3, added Section 1: Block diagram on page 3).
Updated Section 2.1: Absolute maximum ratings on page 4

(removed note below Table 2: Absolute maximum ratings).

19-Jun-2014 2

Updated Table 5: Pin description on page 5 (updated “Pin” and
“Type”).

Updated Section : C

BOOT

values of “E.g.: HVG”).
Numbered Equation 1 on page 8, Equation 2 on page 8 and

Equation 3 on page 9.

Updated Section 7: Package information on page 12 [updated/added
titles, reversed order of Figure 15 and Table 8, Figure 16 and Table 9
(numbered tables), removed 3D package figures, minor
modifications].

Minor modifications throughout document.

selection and charging on page 8 (updated

01-Dec-2014 3

Updated Section : Description on page 1.
Updated Table 7 on page 6 (corrected typo in units of

parameters).

“I

so

” and “Isi”

14/15 DocID13863 Rev 3

L6385E

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© 2014 STMicroelectronics – All rights reserved

DocID13863 Rev 3 15/15

15