Datasheet L6385E Datasheet (ST)

High-voltage high and low side driver

Features

■ High voltage rail up to 600V

■ dV/dt immunity ±50V/nsec in full temperature

range

■ Driver current capability:

– 400mA source,
– 650mA sink

■ Switching times 50/30 nsec rise/fall with 1nF

load

■ CMOS/TTL Schmitt trigger inputs with

hysteresis and pull down

■ Under voltage lock out on lower and upper

driving section

■ Internal bootstrap diode

■ Outputs in phase with inputs

L6385E

DIP-8 SO-8

Description

The L6385E is an high-voltage device,
manufactured with the BCD"OFF-LINE"
technology. It has an Half - Bridge Driver structure
that enables to drive independent referenced N
Channel Power MOS or IGBT. The High Side
(Floating) Section is enabled to work with voltage
Rail up to 600V. The Logic Inputs are CMOS/TTL
compatible for ease of interfacing with controlling
devices.

Figure 1. Block diagram

V

CC

HIN

LIN

3

2

1

UV

DETECTION

BOOTSTRAP DRIVER

LOGIC

UV

DETECTION

LEVEL

SHIFTER

R

R

S

LVG

DRIVER

V

CC

HVG

DRIVER

D97IN514B

Vboot

8

H.V.

HVG

7

OUT

6

LVG

5

GND

4

Cboot

TO LOAD

October 2007 Rev 1 1/16

www.st.com

16

Contents L6385E

Contents

1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1 CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2/16

L6385E Electrical data

1 Electrical data

1.1 Absolute maximum ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

V

V

V

dV

P

T

Output voltage -3 to V

out

Supply voltage - 0.3 to +18 V

cc

Floating supply voltage -1 to 618 V

boot

High sidegate output voltage -1 to V

hvg

Low side gate output voltage -0.3 to Vcc +0.3 V

lvg

V

Logic input voltage -0.3 to Vcc +0.3 V

i

Allowed output slew rate 50 V/ns

out/dt

Total power dissipation (TJ = 85 °C) 750 mW

tot

Junction temperature 150 °C

T

j

Storage temperature -50 to 150 °C

s

boot

-18 V

V

boot

Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900 V (Human Body Model)

1.2 Thermal data

Table 2. Thermal data

Symbol Parameter SO-8 DIP-8 Unit

R

Thermal Resistance Junction to ambient 150 100 °C/W

th(JA)

1.3 Recommended operating conditions

Table 3. Recommended operating conditions

Symbol Pin Parameter Test condition Min Typ Max Unit

V

out

V

BS

f

sw

V

cc

T

1. If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V

2. VBS = V

6 Output voltage

(2)

8 Floating supply voltage

Switching frequency HVG,LVG load CL = 1nF 400 kHz

3 Supply voltage 17 V

J

Junction temperature -45 125 °C

- V

boot

out

3/16

(1)

(1)

17 V

580 V

Pin connection L6385E

2 Pin connection

Figure 2. Pin connection (Top view)

Table 4. Pin description

LIN

HIN

V

GND

1

2

3

CC

4 LVG

D97IN517A

V

8

boot

HVG

7

OUT

6

5

N° Pin Type Function

1 LIN I Low side driver logic input

2 HIN I High side driver logic input

3 V

Low voltage power supply

cc

4 GND Ground

5 LVG

(1)

O Low side driver output

6 VOUT O High side driver floating reference

7 HVG

8 V

1. The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA). This allows to omit the "bleeder"
resistor connected between the gate and the source of the external MOSFET normally used to hold the pin
low.

(1)

O High side driver output

Bootstrap supply voltage

boot

4/16

L6385E Electrical characteristics

3 Electrical characteristics

3.1 AC operation

Table 5. AC operation electrical characteristcs (VCC = 15V; TJ = 25°C)

Symbol Pin Parameter Test condition Min Typ Max Unit

1 vs 5

t

on

2 vs 7

1 vs 5

t

off

2 vs 7

t

r

t

f

High/low side driver turn-on
propagation delay

High/low side driver turn-off
propagation delay

5, 7 Rise time CL = 1000pF 50 ns

5, 7 Fall time CL = 1000pF 30 ns

3.2 DC operation

Table 6. DC operation electrical characteristcs (VCC = 15V; TJ = 25°C)

Symbol Pin Parameter Test condition Min Typ Max Unit

Low supply voltage section

V

V

V

I

V

cc

ccth1

ccth2

cchys

qccu

Supply voltage 17 V

Vcc UV turn on threshold 9.1 9.6 10.1 V

Vcc UV turn off threshold 7.9 8.3 8.8 V

Vcc UV hysteresis 1.3 V

3

Undervoltage quiescent
supply current

= 0V 110 ns

V

out

= 0V 105 ns

V

out

V

≤ 9V 150 220 µA

cc

Quiescent current Vin = 15V 250 320 µA

Bootstrap driver on
resistance

(1)

V

≥12.5V 125 Ω

cc

R

I

qcc

dson

Bootstrapped supply voltage section

V

BS

V

V

BSth1

V

V

BSth2

V

V

BShys

I

QBS

I

LK

Bootstrap supply voltage 17 V

UV turn on threshold 8.5 9.5 10.5 V

BS

UV turn off threshold 7.2 8.2 9.2 V

BS

8

UV hysteresis 1.3 V

BS

VBS quiescent current HVG ON 200 µA

= V

High voltage leakage current

V
V

hvg

boot

=

out

= 600V

10 µA

High/low side driver

I

so

Sink short circuit current VIN = Vil (tp < 10µs) 450 650 mA

I

si

Source short circuit current V

5,7

= Vih (tp < 10µs) 300 400 mA

IN

5/16

Electrical characteristics L6385E

Table 6. DC operation electrical characteristcs (continued)(VCC = 15V; TJ = 25°C)

Symbol Pin Parameter Test condition Min Typ Max Unit

Logic inputs

V

il

Low level logic threshold
voltage

1, 2

V

ih

I

ih

I

il

1. R

DS(on)

is pin 8 current when V

where I

1

High level logic threshold
voltage

High level logic input current VIN = 15V 50 70 µA

1, 2

Low level logic input current VIN = 0V 1 µA

is tested in the following way:

R

DSON

CBOOT

3.3 Timing diagram

Figure 3. Input/output timing diagram

HIN

HVG

VCCV

–()VCCV

------------------------------------------------------------------------------------------------------ -=

I

()I2VCC,V

1VCC,VCBOOT1

= V

CBOOT1

CBOOT1

, I2 when V

CBOOT

()–

= V

–()–

CBOOT2

CBOOT2

CBOOT2

1.5 V

3.6 V

LIN

LVG

6/16

D99IN1053

L6385E Bootstrap driver

4 Bootstrap driver

A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6385E a patented
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low side driver (LVG), with in series a diode, as shown in

Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The

diode connected in series to the DMOS has been added to avoid undesirable turn on of it.

4.1 C

To choose the proper C
capacitor. This capacitor C

The ratio between the capacitors C
It has to be:

e.g.: if Q
300mV.

If HVG has to be supplied for a long time, the C
the leakage losses.

e.g.: HVG steady state consumption is lower than 200µA, so if HVG T
to supply 1µC to C

The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has great leakage current).

This structure can work only if V
LVG is on. The charging time (T
fulfilled and it has to be long enough to charge the capacitor.

BOOT

selection and charging

value the external MOS can be seen as an equivalent

BOOT

is related to the MOS total gate charge:

EXT

C

EXT

and C

EXT

C

is 30nC and V

gate

. This charge on a 1µF capacitor means a voltage drop of 1V.

EXT

is 10V, C

gate

EXT

is close to GND (or lower) and in the meanwhile the

OUT

) of the C

charge

Q

gate

-------------- -=

V

gate

is proportional to the cyclical voltage loss.

BOOT

>>>C

BOOT

EXT

is 3nF. With C

BOOT

is the time in which both conditions are

BOOT

= 100nF the drop would be

BOOT

selection has to take into account also

is 5ms, C

ON

BOOT

has

The bootstrap driver introduces a voltage drop due to the DMOS R

(typical value: 125

DSON

Ω). At low frequency this drop can be neglected. Anyway increasing the frequency it must be
taken in to account.

The following equation is useful to compute the drop on the bootstrap DMOS:

Q

gate

where Q

is the gate charge of the external power MOS, R

gate

bootstrap DMOS, and T

==

V

dropIch eargRdsonVdrop

is the charging time of the bootstrap capacitor.

charge

→

7/16

-------------------

T

ch earg

R

dson

is the on resistance of the

dson

Bootstrap driver L6385E

For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap
DMOS is about 1V, if the T

V

has to be taken into account when the voltage drop on C

drop

is 5µs. In fact:

charge

V

drop

30nC

-------------- -

5µ s

125Ω 0.8V∼⋅=

is calculated: if this drop

BOOT

is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.

Figure 4. Bootstrap driver

D

BOOT

V

S

HVG

LVG

ab

V

V

BOOT

OUT

H.V.

C

BOOT

TO LOAD

V

V

S

HVG

LVG

BOOT

H.V.

C

BOOT

V

OUT

TO LOAD

D99IN1056

8/16

L6385E Typical characteristic

5 Typical characteristic

Figure 5. Typical rise and fall times vs

time

(nsec)

250

200

150

100

50

0

Figure 7. Turn on time vs temperature Figure 8. Turn Off time vs temperature

Ton (ns)

load capacitance

D99IN1054

Tr

Tf

0 1 2 3 4 5 C (nF)

For both high and low side buffers @25˚C Tamb

250

200

150

100

50

Typ.

@ Vcc = 15V

Figure 6. Quiescent current vs supply

voltage

Iq

(µA)

10

10

10

10

4

3

2

2 4 6 8 10121416V

0

250

200

150

Typ.

100

Toff (ns)

50

@ Vcc = 15V

D99IN1055

(V)

S

0

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 9. VBOOT UV turn On threshold

13

12

11

10

Vbth1 (V)

vs temperature

@ Vcc = 15V

Typ.

9

8

7

6

5

-45 -25 0 25 50 75 100 125
Tj (°C)

9/16

0

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 10. Vcc UV turn Off threshold vs

temperature

11

10

9

Typ.

8

Vccth2(V)

7

6

-45 -25 0 25 50 75 100 125
Tj (°C)

Typical characteristic L6385E

Figure 11. V

14

13

12

11

10

Vbth2 (V)

9

8

Typ.

7

6

-45 -25 0 25 50 75 100 125

UV turn Off threshold

BOOT

vs temperature

@ Vcc = 15V

Figure 13. Vcc UV turn On threshold vs

Vccth1(V)

temperature

13

12

11

10

Typ.

9

8

7

-45 -25 0 25 50 75 100 125
Tj (°C)

Figure 12. Output source current vs

temperature

1000

1000

@ Vcc = 15V

Tj (°C)

Tj (°C)

@ Vcc = 15V

800

800

600

600

Typ.

Typ.

400

400

current (mA)

current (mA)

200

200

0

0

-45 -25 0 25 50 75 100 125

-45 -25 0 25 50 75 100 125

Figure 14. Output sink current vs

temperature

1000

800

600

Typ.

400

current (mA)

200

0

-45 -25 0 25 50 75 100 125

@ Vcc = 15V

Tj (°C)

10/16

L6385E Package mechanical data

6 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com

11/16

Package mechanical data L6385E

Figure 15. DIP-8 mechanical data and package dimensions

DIM.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A3.32 0.131

a1 0.51 0.020

B 1.15 1.65 0.045 0.065

b 0.356 0.55 0.014 0.022

b1 0.204 0.304 0.008 0.012

D 10.92 0.430

E 7.95 9.75 0.313 0.384

e2.54 0.100

e3 7.62 0.300

e4 7.62 0.300

F 6.6 0.260

I 5.08 0.200

L 3.18 3.81 0.125 0.150

Z 1.52 0.060

OUTLINE AND

MECHANICAL DATA

DIP-8

12/16

L6385E Package mechanical data

Figure 16. SO-8 mechanical data and package dimensions

DIM.

A 1.750 0.0689

A1 0.100 0.250 0.0039 0.0098

A2 1.250 0.0492

b 0.280 0.480 0.0110 0.0189

c 0.170 0.230 0.0067 0.0091

(1)

D

E 5.800 6.000 6.200 0.2283 0.2362 0.2441

(2)

E1

e 1.270 0.0500

h 0.250 0.500 0.0098 0.0197

L 0.400 1.270 0.0157 0.0500

L1 1.040 0.0409

k0˚8˚0˚8˚

ccc 0.100 0.0039

Notes: 1. Dimensions D does not include mold flash,

2. Dimension “E1” does not include interlead flash

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

4.800 4.900 5.000 0.1890 0.1929 0.1969

3.800 3.900 4.000 0.1496 0.1535 0.1575

protrusions or gate burrs.
Mold flash, po trusions or ga te burrs shall not
exceed 0.15m m in total (both side).

or protrusions. Interlead flash or protrusions shall
not exceed 0.25mm per side.

OUTLINE AND

MECHANICAL DATA

SO-8

0016023 D

13/16

Order codes L6385E

7 Order codes

Table 7. Order codes

Part number Package Packaging

L6385E DIP-8 Tube

L6385ED SO-8 Tube

L6385ED013TR SO-8 Tape and reel

14/16

L6385E Revision history

8 Revision history

Table 8. Document revision history

Date Revision Changes

11-Oct-2007 1 First release

15/16

L6385E

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