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however, for possible errors or omissions, or for any consequences resultin
from the use of the information contained herein.
reserves the right to make changes in its products or product
Samsun
specifications with the intent to improve function or desi
without notice and is not required to update this documentation to reflect such
es.
chan
This publication does not convey to a purchaser of semiconductor devices
described herein any license under the patent ri
makes no warranty, representation, or guarantee regarding the
Samsun
suitability of its products for any particular purpose, nor does Samsun
assume any liability arising out of the application or use of any product or
circuit and specifically disclaims any liability, includin
consequence or incidental dama
*Typical* parameters can and do vary in different applications. All operatin
parameters, inc luding *Typicals,* must be validated for each customer
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without limitation any
ical implant into the body, for other
product for any such
FUNCTIONS -------------------------------
•
FEATURES --------------------------------
•
BLOCK DIAGRAM ----------------------
•
PIN DESCRIPTION ----------------------
•
ABSOLUTE MAXIMUM RATINGS --
•
ELECTRICAL CHARACTERISTICS -
•
OPERATION DESCRIPTION ----------
•
TEST CIRCUIT ----------------------------
•
APPLICATION CIRCUIT ---------------
•
PACKAGE DIMENSIONS --------------
•
3
3
3
4
5
6
7
13
14
16
Page 3
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
ON SCREEN DISPLAY PROCESSOR
The KS5514B is a BICMOS LSI with on screen display
function, sync. separator & expander function.
FUNCTIONS
• On screen display
• Sync separator and sync detector
• General expander
FEATURES
• Character capacity : 240 ( 24 column Ø 10 row )
• Construction of character : 12 Ø 18 dots
• 128 kinds of character
• Display position : 62 horizontal position
: 64 vertical position
• Character si ze : 4 Ø 4 times of normal
• Blinking : character unit
• Background coloring : 8 colors
• Synchronous ways : automatic selection internal
or external synchronization via MICOM control
• General output : 3 ports ( by serial data )
• Built-in sync separator & sync detector
• NTSC / PAL / SECAM mode
• Clamp circuit
BLOCK DIAGRAM
IN
OUT
XT
DVDDP3P2SYD AFCRFSCAVDD CVOUT SCC RCVIN
242322212019181716151413
XT
24 - SDIP - 300
ORDERING INFORMATION
DevicePackageOperating Temprature
KS5514B-XX 24-SDIP-300- 20 ~ + 70
OPTION CODE INFORMATION
Code No.
- 02
- 03
- 06
- 07
- 09
- 10
- 12
- 13
- 14
- 15
- 16
Remark
English
English, Russian
English
Korean
Korean , English
English, German
English, Arabic
English
Korean , English
English, Chinese
English, Russian, Arabic
Î
DET
SYNC
SEP
SYNC
DETECT
AFC
VIDEO
MIXER
CLAMP
INTERNAL
BIAS CKT
SC
DISPLAY
CONTROL
CONTROL
REGISTER
4F
BLUE BACK
GENERATOR
SHIFT
REGISTER
OSD ROM
OSD RAM
DATA
REGISTER
1234567891011
DGND SCKACB OSCIN OSCOUT CSBSINP1 CLAMPINAGNDLPFAFCF IL
INPUT
CONTROL
ADDR
REGISTER
DISPLAY
OSC
VSYNC
CLAMP
12
398-05-14
Page 4
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
PIN DESCRIPTION
Pin No.SymbolI/OFunction
Digital Ground
1
DGND
-
2
3
4
5
6
7
8
9
SCK
ACB
OSCIN
OSCOUT
CSB
SIN
P1
CLAMPIN
I
Serial clock input. When CSB pin is `L` then serial
data is inp u tted by micom. Hyst er esis inpu t.
I
Auto clear pin. If `L`, then all circuit is reset.
Built-in pull up resistor. Hysteresis input.
I
LC oscillation pin. Standar d freq uency is 7MH z &
the horizontal start position is controlled by the
O
clock of oscillation block.
While pin 6 is low, serial data input is active.
I
Built - in pull up resistor
Serial data input pin. Built-in pull up resistor
I
General output port 1
O
Clamp input pin of composite video signal
I
10
11
12
13
14
15
16
17
18
19
AGND
LPF
AFCFIL
CVIN
SCCR
CVOUT
AVDD
FSC
AFCR
SYD
Analog ground
-
Low pass filter
-
AFC filt er o u tput
-
Composite video signal input
I
SECAM chroma input
I
Composite video output : 2 Vp-p
O
Analog VDD
-
FSC input (Not use)
I
VCO oscillation frequency control
I
When sync signal is inputted, then SYD is high.
O
498-05-14
Page 5
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
PIN DESCRIPTION
( Continued )
Pin No.SymbolI/OFunction
20
21
22
23
24
XT
IN
XT
OUT
P2
P3
DVDD
ABSOLUTE MAXIMUM RATINGS
I
O
O
O
-
X-TAL
X-TAL
General output port 2
General output port 3
Digit al VD D
( Ta = 25Î )
CharacteristicsSymbolValueUnit
Supp ly Vo ltage
Input Voltage
Power Dissipation
Operating Temperatur e
Storage Temperature
V
DD
V
IN
Pd
Topr
Tstg
V
- 0.3 õ V
SS
- 0.3 ~ 6.0
õ
V
IN
300
- 20 ~ + 70
- 40 ~ + 125
DD
+ 0.3
V
V
mW
Î
Î
598-05-14
Page 6
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
ELECTRICAL CHARACTERISTICS
CharacteristicsSymbolUnit
Operating Voltage
Operating Voltage
Operating Current
Pin 12 DC Voltage
Pin 13 DC Voltage
AFC Freerun Frequency
AFC Pulse Width
AFC Delay Time
AFC Lock Range H
AFC Lock Rnage L
AFC Capture Range H
AFC Capture Rrange L
DV
AV
Icc
Vpi2
Vpi3
Ffr
twd
td
Falh
Fall
Fach
Fac1
( Ta = 25Î, AV
MinTypMax
DD
DD
3.5
4.5
10
2.3
1.3
15.5
3.7
1.0
+600
+400
-
DD
= DV
DD
= 5V )
5.0
5.0
20
2.5
1.45
15.7
4.0
2.5
-
-
-
-
5.5
5.5
25
2.7
1.6
15.9
4.3
4.0
-
-900
-
-700
V
V
mA
V
V
KHz
usec
usec
Hz
Hz
Hz
Hz
SYNC DET. Lock Range H
SYNC DET. Lock Range L
SYNC DET. Capture Range H
SYNC DET. Capture Range L
V - SYNC Delay Time
Oscillation Level
Oscillation Frequency
Blueback Sync Tip Level
Blueback Pedestal Level
Blueback Color Burst Level H
Blueb ack Co lor Level H
Flh
Fll
Fch
Fc1
tvd
Vosc
Fosc
Vbst
Vbpd
Vbbh
Vbch
143
6.7
100
14.3
10
4.0
6.3
1.85
2.5
2.75
3.1
153
7.7
107
15.3
14
4.5
7.0
2.05
2.7
2.95
3.3
163
8.7
114
16.3
-
5.0
7.7
2.25
2.9
3.15
3.5
KHz
KHz
KHz
KHz
usec
Vpp
MHz
V
V
V
V
698-05-14
Page 7
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
OPERATION DESCRIPTION
MEMORY STRUCTURE
After KS5514B records, in DATA RAM and CONTROL REGIS T ER, the serial DATA that is inputt ed from MICOM ,
in recording to the V-SYNC and H-SYNC signal, mix the COMPOSITE VIDEO signal and the font ROM data that is
mapped to data RAM.
In case that there is no composite video signal that is inputted to KS5514B, the SYNC detector becomes low,
KS5514B makes the blue back signal in dividi ng the 4fsc sign al and the blue back signal is output ted .
The following table is the data structure that is inputted from MICOM.
• Memory address consists of 16 bit
• The data of address 0 ~ 239 are character data which are display on the screen.
• The address 240 ~ 244 are the control registers.
• Don`t care bit : the upper 8 bits (DA8 ~ DAF) in address 0 ~ address 239, the upper 5bits (DAB ~ DAF) in
address 240 ~ address 244
Addr
239
240
241
242
Bit
DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
0
·
·
·
* * * * * * * * BLIC6C5C4C3C2C1C0
(Font ROM Address)
·
·
·
********
*****
*****
*****
INT/
NON
BLI2VSZ21VSZ20VSZ11VSZ10VP5VP4 VP3 VP2 VP1VP0
DSP3DSP2DSP1RAM
·
·
·
C6C5C4C3C2C1C0
BLI
HSZ21HSZ20HSZ11HSZ10HP5HP4 HP3 HP2 HP1HP0
TEST TCLEV1LEV0PH2 PH1PH0
ERS
·
·
·
243
244
*****
*****
SECAM
-LEBKLE
CHA
NT/
PAL
DSPONBLK1BLK0BLI1BLI0EXYM BCO
-PD3 PD2-PD0 PC3 PC2PC1PC0
798-05-14
Page 8
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
CONTROL REGISTER
1) Register 240
DA0 ~
DAA
0
1
2
3
4
5
6
7
Register
HP0
HP1
HP2
HP3
HP4
HP5
HSZ10
HSZ11
State
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Content
Function
HS is horizontal display start position
HS = Tc * ^ 4 * ê ( HPn * 2 ) + N
5
n=o
n
Tc : osc. period ( 1 / 7MHz = 143 nsec )
HSZ11
HSZ21
0
0
1
1
1st line
HSZ11
HSZ10
HSZ20
HSZ10
0
1
N
0
1
0
1
9
10
11
12
01
1X2X
3X4X
`
Remark
Horizontal
Start
Position
1st line char acter
size control to
horizontaldirection
8
9
HSZ20
HSZ21
0
1
0
2nd ~ 10 th
line
HSZ21
HSZ20
0
1
01
1X2X
3X4X
2nd ~ 10th line
character size control to ho r izontaldirectio n
1
A
INT/
NON
0
1
Interlace Mode
Non-interlace Mode
898-05-14
Page 9
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
2) Register 241
DA0 ~
DAA
0
1
2
3
4
5
6
7
Register
VP0
VP1
VP2
VP3
VP4
VP5
VSZ10
VSZ11
State
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Content
Function
VS is vertical start position
VS = H * ^ 4 * ê ( VPn * 2 ) + 3
5
n=o
H : horizontal synchronous pulse time
H-SYNC
V-SYNC
HS
VSZ11
VSZ10
0
1
01
1X2X
3X4X
Remark
Vertical
n
`
Start
Position
VS
1st line char acter
size control to
vertical direction
8
9
VSZ20
VSZ21
0
1
VSZ21
VSZ20
0
01
1X2X
0
1
3X4X
2nd ~ 10th line
character size control to vertical
directio n
1
A
BLI2
0
1
V - SYNC 64 divide ( = 1 sec )
V - SYNC 32 divide ( = 0.5 sec )
Control the blink
period
998-05-14
Page 10
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
3) Register 242
DA0 ~
DAA
0
1
2
3
4
5
Register
PH0
PH1
PH2
LEVEL0
LEVEL1
TC
State
0
1
0
1
0
1
0
1
0
1
0
1
P2
P1 P0NTSCPAL
0
0
0
0
0
1
0
1
1
0
1
0
1
1
level 1
0
1
1H = 454Tc
1H = 455Tc
0
1
0
1
0
1
0
111
level 0
Content
Function
E
E
/4
E
/2
7E/4
0
E
3E/4
3E/2
5E/4
01
Internal bias 1Internal bias 2
-
Tc = 2 / fosc
/4
E
/2
-E/4
0
²
E
3E/4
3E/2
5 E/4
Internal bias 3
Remark
Back ground
color control
bit
Color level
control
6
7
8
9
A
TEST
RAM
ERS
DSP1
DSP2
DSP3
0
1
0
1
0
1
0
1
0
1
Active mode
Test mode
RAM no erase
RAM erase
Display method of the 1st is fixed by BLK0 & BLK1
Display method of the 1st is variable
Display method of 2nd - 9th is fixed by BLK0 & BLK1
Display method of 2nd - 9th is variable
Display method of 10th is fixed by BLK0 & BLK1
Display method of 10th is variable
1098-05-14
Page 11
SPECIFICATION
KS5514B -XX ON SCREEN DISPLAY PROCESSOR
4) Register 243
DA0 ~
DAA
0
1
2
3
4
5
6
Register
BCO
YM
EX
BLI0
BLI1
BLK0
BLK1
State
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Content
Function
Blank in g ar ea co loring
Full TV screen colorin g
The same luminance level character and back ground
Variable background luminance level available
Extern al mo de availabl e
Internal mode available
Blinking mode
control
Blanking mode
control
BLI1
BLK1
BLI0
0
1
BLK0
0
1
01
OFF
DUTY 50%
DUTY 25%
DUTY 75%
01
OFF
O
C
R
Remark
Deter mined by
BLK0 & BLK1
Determined by
BCO,
BLK0 & BLK1
Blinking duty
control
C : charact er
O : outline
R : raster
7
DSP
ON
8
LECHA
0
1
0
1
9
LEBLK
0
1
A
-
0
1
Display off
Display on
Charact er luminance le v el 1
Charact er luminance le v el 2
Blank lum inance level 1
Blank lum inance level 2