Datasheet J175, J174, SMPJ174, SMPJ175 Datasheet (Interfet)

Page 1
B-52 01/99
J174, J175
P-Channel Silicon Junction Field-Effect Transistor
¥Choppers ¥Commutators ¥Analog Switches
Absolute maximum ratings at TA= 25¡C
Reverse Gate Source & Reverse Gate Drain Voltage – 30 V Continuous Forward Gate Current 50 mA Continuous Device Power Dissipation 360 mW Power Derating 3.27 mW/°C
TOÐ226AA Package
Dimensions in Inches (mm)
Pin Configuration
1 Drain, 2 Gate, 3 Source
Surface Mount
SMPJ174, SMPJ175
At 25°C free air temperature: J174 J175 Process PJ99 Static Electrical Characteristics Min Max Min Max Unit Test Conditions
Gate Source Breakdown Voltage V
(BR)GSS
30 30 V IG= 1 µA, VDS= ØV
Gate Reverse Current I
GSS
11nAV
GS
= 20V, VDS= ØV
Gate Source Cutoff Voltage V
GS(OFF)
51036VVDS= – 15V, ID= – 10 nA
Drain Saturation Current (Pulsed) I
DSS
– 20– 125– 7 – 70 mA VDS= – 15V, VGS= ØV
Drain Cutoff Current I
D(OFF)
– 1 – 1 nA VDS= – 15V, VGS= 10V
Dynamic Electrical Characteristics Max Max
Drain Source ON Resistance r
ds(on)
85 85 Ω VGS= Ø, VDS< = 0.1V f = 1 kHz
Dynamic Electrical Characteristics Typ Typ
Drain Gate Capacitance C
gd
5.5 5.5 pF VDS= ØV, VGS= 10V f = 1 MHz
Source Gate Capacitance C
gs
5.5 5.5 pF VDS= ØV, VGS= 10V f = 1 MHz
Drain Gate + Source Gate Capacitance Cgd+ C
gs
32 32 pF VDS= VGS= ØV f = 1 MHz
Switching Characteristics
J174 J175
Turn ON Delay Time td
(on)
25ns
V
DD
– 10 – 6 V
Rise Time t
r
510ns
V
GS(OFF)
12 8 V
Turn OFF Delay Time td
(off)
510ns
R
L
560 1.2k
Fall Time t
f
10 20 ns V
GS(ON)
ØØV
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www.interfet.com
Databook.fxp 1/13/99 2:09 PM Page B-52
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