Datasheet IT1750 Datasheet (Calogic LLC)

Page 1
N-Channel Enhancement Mode MOSFET General Purpose Amplifier Switch
IT1750
CORPORATION
FEATURES
Low ON Resistance
••
Low C
••
••
••
High Gain Low Threshold Voltage
ABSOLUTE MAXIMUM RATINGS
(T
= 25oC unless otherwise specified)
A
Drain-Source an d Gate- Sour ce V olt age . . . . . . . . . . . . . . 25V
Peak Gate-Sour ce Voltage (Not e 1) . . . . . . . . . . . . . . . ±125V
Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Storage Temperatur e Ra nge. . . . . . . . . . . . . -65
PIN CONFIGU R ATION
TO-72
Operating Temperatur e Ra nge . . . . . . . . . . . -65
Lead Temperature (Soldering, 10se c). . . . . . . . . . . . . +300
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5m W
Derate above 25
NOTE: Stresses above those listed under "Absolute Maxi mum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
o
C . . . . . . . . . . . . . . . . . . . . . . . . 3mW/oC
ORDERING INFORMATION Part Package Temperature Range
D
1003
ELECTRICAL CHARACTERISTIC S (T
SYMBOL PARAMETER MIN MAX UNITS TEST CONDITIONS
V
GS(th)
I
DSS
I
GSS
BV
DSS
r
DS(on)
I
D(on)
Y
fs
C
iss
C
dg
NOTES: 1. Devices must not be tested at ±125V more than once nor longer than 300ms.
Gate to Source Threshold Voltage Drain Leakage Current Gate Leakage Current (See note 2) Drain Breakdown Voltage 25 V ID = 10µA, VGS = 0 Drain to Source on Resistance Drain Current Forward Transadmittance Total Gate Input Capacitance 6.0 pF ID = 10mA, VDS = 10V, f = 1MHz (Note 3) Gate to Drain Capacitance 1.6 pF VDG = 10V, f = 1MHz (Note 3)
2. Actual gate current is immeasurable. Package suppliers are required to guarantee a package leakage of < 10pA. External package leakage is the dominant mode which is sensitive to both transient and storage environment, which cannot be guaranteed.
3. For design reference only, not 100% tested.
C
G
S
= 25oC, Body connected to Source and VBS = 0 unless otherwise specified)
A
0.50 3.0 V
10 mA
3,000 µS
IT1750 Hermetic T O- 72 -55 XIT1750 Sorted Chips in Carriers -55
VDS = VGS, ID = 10µA
10 nA
50 ohms
VDS = 10V, VGS = 0
VGS = 20V VDS = VGS =10V VDS = 10V, ID = 10mA, f = 1kHz
o
C to +200oC
o
C to +150oC
o
C to +150oC
o
C to +150oC
o
C
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