Page 1
V
CC
V
B
V
S
HO
LOCOM
HIN
LIN
LIN
HIN
up to 600 V
TO
LOAD
V
CC
Typical Connection
HALF-BRIDGE DRIVER
Features
•
Floating channel designed for bootstrap operation
•
Fully operational to +600 V
•
Tolerant to negative transient voltage, dV/dt
immune
•
Gate drive supply range from 10 V to 20 V
•
Undervoltage lockout for both channels
•
3.3 V, 5 V, and 15 V input logic compatible
•
Cross-conduction prevention logic
•
Matched propagation delay for both channels
•
Outputs in phase with inputs
•
Logic and power ground +/- 5 V offset.
•
Internal 540 ns deadtime
•
Lower di/dt gate driver for better
noise immunity
Data Sheet No.PD60266
IRS2308
(S)PbF
www.irf.com 1
(Refer to L ead Assignments for correct pin configuration). This diagram shows electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
Description
The IRS2308/IRS23084 are high voltage, high speed power MOSFET and
IGBT drivers with dependent high-side
and low-side referenced output channels.
Proprietary HVIC and latch immune
CMOS technologies enable ruggedized
monolithic construction. The logic input
is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in the high
-side configuration which operates up to 600 V.
Packages
8-Lead SOIC
IRS2308S
8-Lead PDIP
IRS2308
Part
Input
logic
Crossconduction
prevention
logic
Deadtime
(ns)
Ground Pins
ton/t
off
(ns)
2106
COM
21064
HIN/LIN no none
V
SS/COM
220/200
2108 Internal 540 COM
21084
HIN/
LIN
yes
Programmable 540 - 5000
VSS/COM
220/200
2109 Internal 540 COM
21094
IN/SD yes
Programmable 540 - 5000
VSS/COM
750/200
Feature Comparison
2304
HIN/LIN
yes
Internal 100
COM
160/140
2308
HIN/LIN yes
Internal 540 COM 220/200
•
RoHS compliant
Page 2
IRS2308(S)PbF
www.irf.com 2
Symbol Definition Min. Max. Units
V
B
High-side floating absolute voltage -0.3 625
V
S
High-side floating supply offset voltage VB - 25 VB + 0.3
V
HO
High-side floating output voltage VS - 0.3 VB + 0.3
V
CC
Low-side and logic fixed supply voltage -0.3 25
V
LO
Low-side output voltage -0.3 VCC + 0.3
V
IN
Logic input voltage (HIN & LIN ) VSS - 0.3 V
CC
+ 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
P
D
Package power dissipation @ TA ≤ +25 °C
(8 lead PDIP) — 1.0
(8 lead SOIC) — 0.625
Rth
JA
Thermal resistance, junction to ambient
(8 lead PDIP) — 125
(8 lead SOIC) — 200
T
J
Junction temperature — 150
T
S
Storage temperature -50 150
T
L
Lead temperature (soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
V
°C
°C/W
W
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential.
VB High-side floating supply absolute voltage VS + 10 VS + 20
V
S
High-side floating supply offset voltage Note 1 600
V
HO
High-side floating output voltage V
S VB
V
CC
Low-side and logic fixed supply voltage 10 20
V
LO
Low-side output voltage 0 V
CC
V
IN
Logic input voltage COM V
CC
T
A
Ambient temperature -40 125
V
Symbol Definition Min. Max. Units
°C
Page 3
www.irf.com 3
IRS2308(S)PbF
Static Electrical Characteristics
V
BIAS
(VCC, VBS) = 15 V, VSS = COM, DT= VSS and TA = 25 °C unless otherwise specified. The VIL, V
IH,
and IIN param-
eters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO, and R
on
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. T yp. Max. Units T est Conditions
V
IH
Logic “1” input voltage for HIN & LIN 2.5 — —
V
IL
Logic “0” input voltage for HIN & LIN — — 0.8
V
OH
High level output voltage, V
BIAS
- V
O
— 0.05 0.2
V
OL
Low level output voltage, V
O
— 0.02 0.1
I
LK
Offset supply leakage current — — 50 VB = VS = 600 V
I
QBS
Quiescent VBS supply current 20 60 150
I
QCC
Quiescent VCC supply current 0.4 1.0 1.6 mA
I
IN+
Logic “1” input bias current — 5 20 HIN = 5 V, LIN = 5 V
I
IN-
Logic “0” input bias current — 1 5 HIN = 0 V, LIN = 0 V
V
CCUV+
VCC and VBS supply undervoltage positive going
8.0 8.9 9.8
V
BSUV+
threshold
V
CCUV-
VCC and V
BS
supply undervoltage negative going
7.4 8.2 9.0
V
BSUV-
threshold
V
CCUVH
Hysteresis 0.3 0.7 —
V
BSUVH
I
O+
Output high short circuit pulsed current 97 290 —
VO = 0 V,
PW ≤ 10 µs
I
O-
Output low short circuit pulsed current 250 600 —
VO = 15 V,
PW ≤ 10 µs
V
µA
µA
V
mA
Dynamic Electrical Characteristics
V
BIAS
(VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25 °C, DT = VSS unless otherwise specified.
Symbol Definition Min. T yp. Max. Units Test Conditions
t
on
Turn-on propagation delay — 220 300 VS = 0 V
t
off
Turn-off propagation delay — 200 280 VS = 0 V or 600 V
MT Delay matching | ton - t
off
|
—046
t
r
Turn-on rise time — 100 220
t
f
Turn-off fall time — 35 80
DT
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
400 540 680
HO turn-off to LO turn-on (DT
HO-LO)
MDT Deadtime matching = | DT
LO-HO
- DT
HO-LO
|
—060
ns
VS = 0 V
VCC = 10 V to 20 V
IO = 2 mA
V
IN
= 0 V or 5 V
Page 4
IRS2308(S)PbF
www.irf.com 4
Functional Block Diagram
IR2308
LIN
UV
DETECT
DELAY
COM
LO
VCC
HIN
DT
VSS
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
DEADTIME &
SHOOT-THROUGH
PREVENTION
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
Page 5
www.irf.com 5
IRS2308(S)PbF
Lead Definitions
Symbol Description
HIN Logic input for high-side gate driver output (HO), in phase
LIN Logic input for low-side gate driver output (LO), in phase
V
B
High-side floating supply
HO High-side gate driver output
V
S
High-side floating supply return
V
CC
Low-side and logic fixed supply
LO Low-side gate driver output
COM Low-side return
Lead Assignments
8 Lead PDIP 8 Lead SOIC
IRS2308PbF IRS2308SPbF
1
2
3
4
8
7
6
5
V
CC
HIN
LIN
COM
V
B
HO
V
S
LO
1
2
3
4
8
7
6
5
V
CC
HIN
LIN
COM
V
B
HO
V
S
LO
Page 6
IRS2308(S)PbF
www.irf.com 6
Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions
Figure 3. Deadtime Waveform Definitions
HO
LO
HIN
LIN
LIN
HIN
50%
50%
t
r
t
on
t
f
t
off
HO
LO
90% 90%
10% 10%
HIN
LIN
HO
90%
10%
LO
90%
10%
DT
LO-HO
DT
LO-HO
MDT=
- DT
HO-LO
DT
HO-LO
50
%
50
%
Page 7
www.irf.com 7
IRS2308(S)PbF
0
100
200
300
400
500
-50-250 255075100125
Temperature(
o
C)
Turn-on Delay Time (ns
Figure 4A. Turn-On Time
vs. Temperature
0
100
200
300
400
500
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Turn-on Delay Time (ns
Figure 4B. Turn-On Time
vs. Supply Voltage
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature(
o
C)
Turn-O ff Time (ns
)
Figure 5A. Turn-Off Propagation D elay
vs. Temperature
0
100
200
300
400
500
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
T u rn-Off Time ( ns
)
Figure 5B. Turn-Off Propagation Delay vs.
Supply Voltage
Max.
Typ.
Max.
Typ.
Max.
Typ.
Max.
Typ.
Figure 4A. Turn-On T ime
vs. Temperature
Figure 4B. Turn-On T ime
vs. Supply Volt age
Temperature (oC)
V
BIAS
Supply Voltage (V)
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
Figure 5A. Turn-Off Prop agation Delay
vs. Temperature
Figure 5B. Turn-Off Prop agation Delay
vs. Supply Volt age
Turn-Off Time (ns)
Turn-Off Time (ns)
Temperature (oC)
V
BIAS
Supply Voltage (V)
Page 8
IRS2308(S)PbF
www.irf.com 8
Turn-On Rise Time (ns)
Temperature (oC)
Turn-Off Fall Time (ns)
V
BIAS
Supply Voltage (V)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 6A . Turn-O n Rise Time
vs .Tem perature
0
100
200
300
400
500
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
T u rn -O n R i se Tim e ( ns)
Figure 6B . Turn-On Rise Time
vs . Supply Volta g e
0
50
100
150
200
-50 -25 0 25 50 75 100 125
Temperature(oC)
Figure 7A . Turn-O ff Fall Time
vs . Tem perature
0
50
100
150
200
10 12 14 16 18 20
Input Voltage (V)
T u rn -O ff F a l l Time
Figure 7B . Turn-Off Fall Time
vs . Input volta g e
Figure 6B. Turn-On Rise T ime
vs. Supply V oltage
Figure 6A. Turn-On Rise T ime
vs. Temperature
Figure 7B. T urn-Off Fall Time
vs. Supply V oltage
Figure 7A. T urn-Off Fall Time
vs. Temperature
Max.
Typ.
Typ.
Max.
Turn-On Rise Time (ns)
Turn-Off Fall Time (ns)
Max.
Typ.
Max.
Typ.
Page 9
www.irf.com 9
IRS2308(S)PbF
200
400
600
800
1000
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Deadtime (ns
)
Figure 8A. Deadtime vs. Temperature
200
400
600
800
1000
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Deaduime
(
ns
)
Figure 8B. Deadtime vs Supply Voltage
1
2
3
4
5
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Input Voltage (V)
Figure 9A. Logic "1" Input Voltage
vs. Temperature
1
2
3
4
5
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Inpu t Vo ltage ( V )
Figure 9B. Logic "1" Input Voltage
vs. Supply Voltage
Max.
Min.Min.
Typ.
Max.
Typ.
Min.
Min.
Deadtime (ns)
Deadtime (ns)
Temperature (oC)
V
BIAS
Supply Voltage (V)
Figure 8A. Deadtime vs. T emperature
Figure 8A. Deadtime vs. Supply V oltage
Input Voltage (V)
Input Voltage (V)
V
BIAS
Supply Voltage (V)
Figure 9A. Logic “1” Input Volt age
vs. Temperature
Figure 9B. Logic “1” Input Volt age
vs. Supply Volt age
Temperature (oC)
Page 10
IRS2308(S)PbF
www.irf.com 10
0
1
2
3
4
-50-250 255075100125
Temperatre (
o
C)
Inpu t Vo ltage ( V)
Figure 10A. Logic "0" In put Voltage
vs. Temperature
0
1
2
3
4
10 12 14 16 18 20
V
BIAS
Suppl y Voltage (V)
Inpu t Voltag e ( V)
F igure 10B. Logic " 0 " Input Voltage
vs. Supply Voltage
0.0
0.1
0.2
0.3
0.4
0.5
10 12 14 16 18 20
V
BAIS
Supply Voltag e (V)
High Leve l O utput Voltage (V)
F igure 11B. High Lovel Output Voltage
vs. Supply Voltage
0.0
0.1
0.2
0.3
0.4
0.5
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
High Leve l O utput Voltage (V)
F igure 11A. High Level Output Voltage
vs. Temperature
Max.
Max.
Typ.
Max.
Typ.
Max.
Figure 10A. Logic “0” Input Volt age
vs. Temperature
Input Voltage (V)
High Level Output Voltage (V)
Figure 11A. High Level Output V oltage
vs. Temperature
Input Voltage (V)
High Level Output Voltage (V)
Temperature (oC)
V
BIAS
Supply Voltage (V)
V
BIAS
Supply Voltage (V)
Temperature (oC)
Figure 10A. Logic “0” Input Volt age
vs. Supply V oltage
Figure 11A. High Level Output V oltage
vs. Supply Volt age
Page 11
www.irf.com 11
IRS2308(S)PbF
0.0
0.1
0.2
0.3
0.4
0.5
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Low Le vel Output Voltage (V)
Figure 12A. Low Level Output Voltage
vs.Temperature
0
0.1
0.2
0.3
0.4
0.5
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Low Le vel Output Voltage (V)
Figure 12B. Low Level Output Voltage
vs. Supply Voltage
0
60
120
180
240
300
-50-25 0 25 50 75100125
Temperature (
o
C)
O ffs e t Supply Leakage Cur rent (
µ
A)
Figure 13A. Offset Supply Leakage
Current vs. Temperature
0
60
120
180
240
300
0 100 200 300 400 500 600
V
B
Boost Voltage (V)
Offset Supply Leakage currentt( (
(µ
F igure 13B. Offset Supply Leakage
Current vs. Supply Voltage
Max. Max.
Max.
Typ.
Max.
Typ.
Low Level Output Voltage (V)
Offset Supply Leakage Current (µA)
Offset Supply Leakage Current(µA)
Temperature (oC)
V
BIAS
Supply Voltage (V)
VB Boost Voltage (V)
Temperature (oC)
Low Level Output Voltage (V)
Figure 12A. Low Level Output Volt age
vs. Temperature
Figure 12B. Low Level Output Volt age
vs. Supply V oltage
Offset Supply Leakage Current (µA)
Figure 13A. Offset Supply Leakage Current
vs. Temperature
Figure 13A. Offset Supply Leakage Current
vs. Supply V oltage
Page 12
IRS2308(S)PbF
www.irf.com 12
0
60
120
180
240
300
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
BS
Supply Current (
µΑ
)
F igure 14A. VBS Supply Current
vs. Temperature
0
60
120
180
240
300
10 12 14 16 18 20
V
BS
Supply Voltage (V)
V
BS
Supply Current (
µΑ
)
Figure 14B. V
BS
Supp l y Current
vs. Supply Voltage
0.0
0.6
1.2
1.8
2.4
3.0
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
CC
Sup p ly Current (m
Α
)
Figure 15A. VCC Supply Current
vs. Temperature
0
0.6
1.2
1.8
2.4
3
10 12 14 16 18 20
V
CC
Supply Voltage (V)
V
CC
Supply Cur r e nt ( m
Α
)
Figure 15B. VCC Supply Current
vs. Supply Voltage
Max.
Typ.
Max.
Typ.
Max.
Typ.
Max.
Typ.
Min.
Min.
Min.
Min.
Figure 14A. VBS Supply Current
vs. Temperature
VBS Supply Current (µA)
Temperature (oC)
Temperature (oC)
VBS Supply Voltage (V)
VCC Supply Voltage (V)
VBS Supply Current (µA)
Figure 14B. VBS Supply Current
vs. Supply Volt age
VCC Supply Current (mA)
VCC Supply Current (mA)
Figure 15A. VCC Supply Current
vs. Temperature
Figure 14B. VCC Supply Current
vs. Supply Volt age
Page 13
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IRS2308(S)PbF
0
10
20
30
40
50
-50 -25 0 25 50 75 100 125
Logic "1" Input Current (
µ
A)
Figure 16A. Logic "1" Input Current
vs. Temperature
Temperature (oC)
0
10
20
30
40
50
10 12 14 16 18 20
VCC Supply Voltage (V)
Logic "1" Input Curre nt (
µΑ
)
Figure 16B. Logic "1" Input Current
vs. Supply Voltage
Max.
Typ.
Max.
Typ.
Max.
Typ.
Max.
Typ.
Figure 16A. Logic “1” Input Current
vs. Temperature
Logic “1” Input Current (µA)
Temperature (oC) VCC Supply Voltage (V)
Logic “1” Input Current (µA)
Logic “0” Input Current (µA)
Logic “0” Input Current (µA)
Temperature (oC)
Supply Voltage (V)
Figure 16B. Logic “1” Input Current
vs. Supply Voltage
Figure 17A. Logic “0” Input Bias Current
vs. Temperature
Figure 17B. Logic “0” Input Bias Current
vs. Supply Voltage
Max
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Logic "0" Input Bia s Current (µA)
Max
0
1
2
3
4
5
6
10 12 14 16 18 20
Logic "0" Input Bias Current (µA)
Page 14
IRS2308(S)PbF
www.irf.com 14
7
8
9
10
11
12
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
CC
UVLO Threshold (+) (V
)
Figure 18. VCC Undervol ta ge Threshold (+)
vs. Temperature
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
CC
UVLO T hres hold (-) (v
)
Figure 19. VCC Undervol ta ge Threshold (-)
vs. Temperature
7
8
9
10
11
12
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
BS
UVLO Thr es hold (+) (v
)
Figure 20. VBS Underv olta ge Threshold (+)
vs. Temperature
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
BS
UVLO Thres hold (-) (V
)
Figure 21. VBS Underv oltage Threshold (-)
vs. Temperature
Max.
Typ.
Min.
Typ.
Max.
Min.
Max.
Typ.
Max.
Typ.
Min.
Min.
Vcc UVLO Threshold (+) (V)
Temperature (oC)
Temperature (oC)
Vcc UVLO Threshold (-) (V)
Temperature (oC)
Temperature (oC)
VBS UVLO Threshold (+) (V)
VBS UVLO Threshold (-) (V)
Figure 18. Vcc Undervoltage Threshold (+)
vs. Temperature
Figure 19. Vcc Undervoltage Threshold (-)
vs. Temperature
Figure 20. VBS Undervoltage Threshold (+)
vs. Temperature
Figure 21. VBS Undervoltage Threshold (-)
vs. Temperature
Page 15
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IRS2308(S)PbF
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
O utput Source Current (m
Α
)
Figure 22A. Output Source Current
vs. Temperature
0
100
200
300
400
500
10 12 14 16 18 20
V
BIAS
Suppl y Voltage (V)
O utput Source Current (m
Α
)
Figure 22B. Output Source Current
vs. Supply Voltage
0
200
400
600
800
1000
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
O utpu t Sink Cu r rent (m
Α
)
Figure 23A. Output Sink Current
vs.Temperature
0
200
400
600
800
1000
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
O utpu t Sink Cu r rent (m
Α
)
Figure 23B. Output Sink Current
vs. Suppl y Voltage
Max.
Typ.
Max.
Typ.
Max.
Typ.
Max.
Typ.
Output Source Current (mA)
Temperature (oC) V
BIAS
Supply Voltage (V)
Temperature (oC)
Figure 22B. Output Source Current
vs. Supply V oltage
Figure 22A. Output Source Current
vs. Temperature
Output Source Current (mA)
Output Sink Current (mA)
Output Sink Current (mA)
V
BIAS
Supply Voltage (V)
Figure 23B. Output Sink Current
vs. Supply V oltage
Figure 23A. Output Sink Current
vs. Temperature
Page 16
IRS2308(S)PbF
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-10
-8
-6
-4
-2
0
10 12 14 16 18 20
V
BS
Flouting Supply Voltage (V)
V
S
Offset Supply Voltage (V)
F igure 24. Maximum VS Neg ative Offset
vs. Supply Voltage
Typ.
V
S
Offset Supply Voltage (V)
VBS Floating Supply Voltage (V)
Figure 24. Maximum VS Negative Offset
vs. Supply V oltage
Page 17
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IRS2308(S)PbF
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
140 V
70 V
0 V
Figure 25. IRS2308 v s. Frequency (IRFBC20),
R
gate
=33Ω, VCC=15 V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
Figure 26. IRS2308 v s. Frequency (IRFBC30),
R
gate
=22Ω, VCC=15 V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
Figure 27. IRS2308 vs. Frequency (IRFBC40),
R
gate
=15Ω , VCC=15 V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
Figure 28. IRS2308 v s. Frequency (IRFPE50),
R
gate
=10Ω, VCC=15 V
140 V
70 V
0 V
140 V
70 V
0 V
140 V
70 V
0 V
Page 18
IRS2308(S)PbF
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20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
Figure 29. IRS2308S vs. Frequency (IRFBC20),
R
gate
=33Ω, VCC=15 V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
Figure 30. IRS2308S vs. Frequency (IRFBC30),
R
gate
=22Ω, VCC=15 V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Tempreture (
o
C)
Figure 32. IRS 2308S v s. Frequency (IRFPE50),
R
gate
=10Ω, VCC=15 V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
Figure 31. IRS2308S vs. Frequency (IRFBC40),
R
gate
=15Ω, VCC=15 V
140 V
70 V
0 V
140 V
70 V
0 V
140 V 70 V 0 V140 V 70 V
0 V
Page 19
www.irf.com 19
IRS2308(S)PbF
01-6014
01-3003 01
(MS-001AB)
8-Lead PDIP
01-6027
01-0021 11
(MS-012AA)
8-Lead SOIC
87
5
65
D B
E
A
e
6X
H
0.25 [.010] A
6
4312
4. OUTLINE CONF O RMS TO JEDEC OUT LINE MS-012A A .
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7
K x 45°
8X L
8X c
y
FOOTPRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
8X 1.78 [.070]
5 DIMENSION DOES NOT INCL UDE MOLD PROTRUSIONS.
6 DIMENSION DOES NOT INCL UDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
0.25 [.010]
CAB
e1
A
A1
8X b
C
0.10 [.004]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BAS IC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX
MILLIMET ERSINCHES
MIN MAX
DIM
8°
e
c .0075 .0098 0.1 9 0.25
.025 BASI C 0.635 BASIC
Case outlines
Page 20
IRS2308(S)PbF
www.irf.com 20
CARRIER TAPE DIMENSION FOR 8SOICN
Cod e M in M ax M in M ax
A 7 .9 0 8.1 0 0. 31 1 0 .3 1 8
B 3.90 4.10 0.153 0.161
C 11.70 12.30 0.46 0.484
D 5.4 5 5.5 5 0. 2 1 4 0 .2 1 8
E 6 .3 0 6.5 0 0. 24 8 0 .2 5 5
F 5.10 5 .3 0 0. 20 0 0 .2 0 8
G1.50n/a0.059n/a
H 1.5 0 1.6 0 0. 0 5 9 0 .0 6 2
Metric Imperial
REEL DIMENSIONS FOR 8SOICN
Cod e M in M ax M in M ax
A 329.60 330.25 12.976 13.001
B 20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D 1.9 5 2.4 5 0. 7 6 7 0 .0 9 6
E 98.00 102.0 0 3.858 4.015
F n/a 18.40 n/a 0.724
G 14.50 17.10 0.570 0.673
H 12.40 14.40 0.488 0.566
Metric Imperial
E
F
A
C
D
G
A
B
H
OT E : CONTR OLLING
IMENSION IN MM
LOADED TA PE FEED DIRECTION
A
H
F
E
G
D
B
C
T ape & Reel
8-Lead SOIC
Page 21
www.irf.com 21
IRS2308(S)PbF
8-Lead PDIP IRS2308PbF
8-Lead SOIC IRS2308SPbF
8-Lead SOIC Tape & Reel IRS2308STRPbF
ORDER INFORMATION
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
LEADFREE PART MARKING INFORMATION
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRxxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?
MARKING CODE
S
The SOIC-8 is MSL2 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
Data and specifications subject to change without notice. 11/27/2006
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