Datasheet IRF9510 Datasheet (Intersil)

IRF9510

/
j

/

/

/

/

[ /Title
(IRF95

10)
Sub­ect (-

3.0A, -

100V,

1.200

Ohm,
P-Chan­nel
Power
MOS­FET)

Autho

r ()

Key-

words
(Inter­sil
Corpo­ration,
P-Chan­nel
Power
MOS­FET,
TO­220AB
)

Cre-

ator ()

DOCI

NFO
pdf­mark

Data Sheet July 1999

3.0A, 100V, 1.200 Ohm, P-Channel Power
MOSFET

This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested and guaranteed to withstand a specified level of
energy in the breakdown avalanchemodeofoperation.Allof
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17541.

Ordering Information

PART NUMBER PACKAGE BRAND

IRF9510 TO-220AB IRF9510

NOTE: When ordering, include the entire part number.

Packaging

JEDEC TO-220AB

DRAIN

(FLANGE)

File Number

Features

• 3.0A, 100V

•r

DS(ON)

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

= 1.200Ω

Symbol

D

G

S

SOURCE

DRAIN

GATE

2214.4

[

5-3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRF9510

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRF9510 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

T

C

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.16 W/

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

DS

DGR

D
D

DM

GS

D

AS

, T

J

STG

L

pkg

-100 V

-100 V

-3.0 A

-2.0 A

-12 A

±20 V

20 W

190 mJ

-55 to 150

300
260

o

C

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V
Gate to Source Leakage Current I
Zero-Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

DSSVGS

GS(TH)VGS

GSS
DSS

D(ON)

= 0V, ID = -250µA, (Figure 10) -100 - - V

= VDS, ID = -250µA -2.0 - -4.0 V
VGS = ±20V - - ±100 nA
VDS = Rated BV
VDS= 0.8x Rated BV
VDS> I

D(ON) xrDS(ON)MAX,VGS

, VGS = 0V - - -25 µA

DSS

DSS,VGS

= 0V,TC= 125oC - - -250 µA

= -10V,

-3.0 - - A

(Figure 7)

Drain to Source On Resistance (Note 2) r

DS(ON)VGS

Forward Transconductance (Note 2) g

fs

= -10V, ID = -1.5A, (Figures 8, 9) - 1.000 1.200 Ω
VDS>I

D(ON)

x r

DS(ON)

Max, ID = -1.5A,

0.8 1.1 - S

(Figure 12)

Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t

VDD= 0.5 x Rated BV
RG = 50Ω, VGS = 10V, (Figures 17, 18)

r

RL = 15.7Ω for V
RL = 12.3Ω for V
MOSFET Switching Times are

f

DSS =

DSS

= 40V

, ID≈ -3.0A,

DSS

50V

-1530ns

-3060ns

-2040ns

-2040ns

Essentially Independent of Operating
Temperature

Total Gate Charge
(Gate to Source + Gate to Drain)

Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Junction to Case R
Junction to Ambient R

Q

g(TOT)VGS

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= -10V, ID= -3A, VDS= 0.8 x Rated BV

DSS,

- 8.5 11 nC
(Figures 14, 19, 20) Gate Charge is
Essentially Independent of Operating
Temperature

VGS = 0V, VDS = -25V, f = 1.0MHz,
(Figure 11)

- 3.8 - nC

- 4.7 - nC

- 180 - pF

-85-pF

-30-pF
Measured From the

Contact Screw on Tab
to Center of Die

Measured From the
Drain Lead, 6mm
(0.25in) From Package
to Center of Die

Measured From The
Source Lead, 6mm
(0.25in)FromHeader to
Source Bonding Pad

Modified MOSFET
Symbol Showing the In­ternal Devices
Inductances

D

L

D

G

L

S

S

- 3.5 - nH

- 4.5 - nH

- 7.5 - nH

- - 6.4

o

C/W

Typical Socket Mount - - 62.5oC/W

5-4

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

(Note 3)

I

SD

SDM

IRF9510

Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode

D

- - -3.0 A

- - -12 A

G

S

Source to Drain Diode Voltage(Note 2) V
Reverse Recovery Time t
Reverse Recovered Charge Q

TC = 25oC, ISD= -3.0A, VGS = 0V, (Figure 13) - - -1.5 V

SD

TJ = 150oC, ISD = -3.0A, dISD/dt = 100A/µs - 120 - ns

rr

TJ = 150oC, ISD = -3.0A, dISD/dt = 100A/µs - 6.0 - µC

RR

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 25V, starting TJ = 25oC, L = 31.7mH, RG = 25Ω, peak IAS = 3.0A. See Figures 15, 16.

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TC,CASE TEMPERATURE (oC)

Unless Otherwise Specified

125

-5

-4

-3

-2

DRAIN CURRENT (A)

D,

I

-1

0

50 75 10025 150

TC,CASE TEMPERATURE (oC)

125

FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE

TEMPERATURE

1

0.5

0.2

0.1

0.1

0.05

, NORMALIZED TRANSIENT

THERMAL IMPEDANCE

0.02

θJC

0.01

0.01
SINGLE PULSE

-5

10

-4

10

-3

10

t1, RECTANGULAR PULSE DURATION (s)

Z

FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE

5-5

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENTvs

CASE TEMPERATURE

P

DM

t

1

NOTES:
DUTY FACTOR: D = t1/t

= PDM x Z

T

J

-2

10

0.1 1 10

θJC

x R

t

2

2

+ T

θJC

C

IRF9510

Typical Performance Curves

10

1

, DRAIN CURRENT (A)

D

I

T

= 25oC

C

TJ = MAX RATED

0.1
11010

OPERATION IN THIS
REGION IS LIMITED
BY r

DS(ON)

VDS, DRAIN TO SOURCE VOLTAGE (V)

Unless Otherwise Specified (Continued)

10µs

100µs

1ms

10ms
100ms

DC

2

-5

-4

-3

-2

, DRAIN CURRENT (A)

D

I

-1

0

0 -10 -20 -30 -40

VGS = -10V

VGS = -9V

VGS = -8V

VGS = -7V

VGS = -6V

VGS = -5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-5

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

-4

VGS = -10V

VGS = -9V

-12.0
V

>I

DS

D(ON)

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

-9.6

x R

DS(ON)MAX.

-50

-3

-2

, DRAIN CURRENT (A)

D

I

-1

0

0

-2
VDS, DRAIN TO SOURCE VOLTAGE (V)

-4 -6 -10

VGS = -8V

VGS = -7V

VGS = -6V
VGS = -5V

-7.2

-4.8

-2.4

, ON-STATE DRAIN CURRENT (A)

D(ON)

I

-8

0

VGS, GATE TO SOURCE VOLTAGE (V)

TJ = 125oC

TJ = 25oC

TJ = -55oC

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

5

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

4

3

VGS = -10V

2

1

, DRAIN TO SOURCE ON RESISTANCE

0

DS(ON)

r

0 -20

-4 -8

VGS = -20V

-12

ID,DRAIN CURRENT (A)

-16

2.5

2.0

1.5

1.0

0.5

ON RESISTANCE VOLTAGE

NORMALIZED DRAIN TO SOURCE

V

= -10V, ID = -1.5A

GS

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0

0 40 120 160

TJ, JUNCTION TEMPERATURE (oC)

-8-6-4-20 -10

80-40

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

5-6

FIGURE 9. NORMALIZED DRAIN TOSOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

IRF9510

Typical Performance Curves

1.25

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75
0 40 120 160

TJ, JUNCTION TEMPERATURE (oC)

Unless Otherwise Specified (Continued)

80-40

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

2.5

2.0

1.5

1.0

, TRANSCONDUCTANCE (S)

0.5

fs

g

0

-1.2 -2.4 -3.6 -4.80 -6.0
ID,DRAIN CURRENT (A)

TJ = -55oC

TJ = 25oC

V

> I

D(ON)

x R

DS

80µs PULSE TEST

TJ = 125oC

DS(ON) MAX.

500

VGS = 0V, f = 1MHz
C

= CGS + C

ISS

C

= C

RSS

400

C

OSS

300

200

C, CAPACITANCE (pF)

100

0

0 -10 -20 -30 -40 -50

GD

GD

≈ CDS + C

GD

C

ISS

C

OSS

C

RSS

V

DRAIN TO SOURCE VOLTAGE (V)

DS,

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

2

-10

-10
TJ = 150oC

TJ = 25oC

-1

, SOURCE TO DRAIN CURRENT (A)

SD

I

-0.1

-0.4 -0.6 -0.8 -1.0 -1.2 -1.8-1.4 -1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0

-5

-10

GATE TO SOURCE VOLTAGE (V)

GS,

-15

V

V

= -20V

DS

VDS = -50V

VDS = -80V

2468010

Q

TOTAL GATE CHARGE (nC)

g(TOT),

ID = -4A

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5-7

IRF9510

Test Circuits and Waveforms

V

DS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

0V
V

GS

t

P

AS

L

R

G

­V

DD

+

DUT

I

AS

0.01Ω

0

V

DD

I

AS

t

P

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

BV

t

AV

DSS

V

DS

V

GS

12V

BATTERY

t

ON

t

d(ON)

t

R

L

DUT

R

G

­V

DD

+

0

V

DS

V

GS

0

10%

r

10%

90%

50%

t

d(OFF)

t

OFF

90%

50%

t

f

10%

PULSE WIDTH

90%

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-V

DS

D

(ISOLATED
SUPPLY)

DUT

0

V

DS

Q

gs

Q

gd

V

GS

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

Q

G

0

I

G(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

DUT

S

CURRENT

I

D

SAMPLING

+V

DS

V

DD

0

I

G(REF)

g(TOT)

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

5-8

IRF9510

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Intersil semiconductor products are sold bydescription only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly , the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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5-9

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