This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy inthe breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
They can be operated directly from integrated circuits.
Formerly developmental type TA17424.
Ordering Information
PART NUMBERPACKAGEBRAND
IRF740TO-220ABIRF740
NOTE: When ordering, include the entire part number.
File Number
Features
• 10A, 400V
•r
DS(ON)
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.550Ω
Components to PC Boards”
Symbol
D
G
2311.3
Packaging
DRAIN
(FLANGE)
JEDEC TO-220AB
TOP VIEW
SOURCE
DRAIN
GATE
S
4-239
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
520mJ
-55 to 150
300
260
o
C
o
C
o
C
NOTE:
1. TJ = 25oC to 125oC.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Drain to Source Breakdown VoltageBV
Gate to Threshold VoltageV
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
4
3
2
, DRAIN TO SOURCE
ON RESISTANCE
DS(ON)
1
r
0
1020302550
TC, CASE TEMPERATURE (oC)
VGS = 10V
VGS = 20V
40
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
3.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
= 10A, VGS = 10V
D
2.4
1.8
1.2
0.6
ON RESISTANCE VOLTAGE
NORMALIZED DRAIN TO SOURCE
0
-406016012080400-60-20
20
T
, JUNCTION TEMPERATURE (oC)
J
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
4-242
100
140
Page 5
IRF740
Typical Performance Curves
1.25
ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
-406016012080400-60-20
20
T
, JUNCTION TEMPERATURE (oC)
J
Unless Otherwise Specified (Continued)
100
140
FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
15
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
≥ 50V
DS
12
TJ = 25oC
9
TJ = 150oC
6
, TRANSCONDUCTANCE (S)
3
fs
g
0
481216020
ID, DRAIN CURRENT (A)
2500
2000
1500
1000
C, CAPACITANCE (pF)
500
0
1
C
OSS
C
RSS
25
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 0V, f = 1MHz
C
= CGS + C
ISS
C
= C
RSS
C
≈ C
OSS
C
ISS
2
5225
10
GD
DS
+ C
GD
GD
10
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
TJ = 150oC
TJ = 25oC
1.0
, SOURCE TO DRAIN CURRENT (A)
SD
I
0.1
00.30.60.91.5
VSD, SOURCE TO DRAIN VOLTAGE (V)
1.2
3
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 10A
16
VDS = 80V
12
8
4
GATE TO SOURCE VOLTAGE (V)
GS,
V
0
12243648060
VDS = 200V
VDS = 320V
Qg,GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-243
Page 6
IRF740
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0.01Ω
0
t
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
R
G
V
GS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
CURRENT
REGULATOR
12V
BATTERY
0
0.2µF
50kΩ
I
G(REF)
0.3µF
G
IG CURRENT
SAMPLING
RESISTORRESISTOR
R
L
DUT
D
S
I
D
SAMPLING
+
V
DD
-
V
DS
(ISOLATED
SUPPLY)
SAME TYPE
AS DUT
DUT
V
DS
CURRENT
t
ON
t
d(ON)
t
V
DS
90%
0
V
GS
10%
0
r
10%
50%
PULSE WIDTH
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
I
G(REF)
0
t
d(OFF)
90%
V
GS
t
OFF
50%
t
f
90%
10%
FIGURE 19. GATE CHARGE TEST CIRCUITFIGURE 20. GATE CHARGE WAVEFORMS
4-244
Page 7
IRF740
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly , the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
4-245
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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