Datasheet IRF640NPBF Specification

PD - 95046

IRF640NPbF

IRF640NSPbF

l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Ease of Paralleling
l Simple Drive Requirements
l Lead-Free

G

HEXFET® Power MOSFET

D

Description

Fifth Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.

The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation levels
to approximately 50 watts. The low thermal resistance and
low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on­resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of its
low internal connection resistance and can dissipate up to

2.0W in a typical surface mount application.
The through-hole version (IRF640NL) is available for low­profile application.

TO-220AB

IRF640NPbF

S

IRF640NSPbF

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 18
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 13 A
I

DM

PD @TC = 25°C Power Dissipation 150 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  8.1 V/ns
T

J

T

STG

Pulsed Drain Current  72

Linear Derating Factor 1.0 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 247 mJ
Avalanche Current 18 A
Repetitive Avalanche Energy 15 mJ

Operating Junction and -55 to +175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

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IRF640NLPbF

V

= 200V

DSS

R

DS(on)

ID = 18A

D2Pak

= 0.15Ω

TO-262

IRF640NLPbF

°C

2/25/04

IRF640NPbF/SPbF/LPbF

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

Drain-to-Source Breakdown Voltage 200 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.25 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– ––– 0.15 Ω VGS = 10V, ID = 11A 
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 6.8 ––– ––– S VDS = 50V, ID = 11A 

Drain-to-Source Leakage Current

––– ––– 25

––– ––– 250 VDS = 160V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100

VDS = 200V, VGS = 0V

µA

nA

VGS = -20V
Total Gate Charge ––– ––– 67 ID = 11A
Gate-to-Source Charge ––– ––– 11 nC VDS = 160V
Gate-to-Drain ("Miller") Charge ––– ––– 33 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 10 ––– VDD = 100V
Rise Time ––– 19 ––– ID = 11A
Turn-Off Delay Time ––– 23 ––– RG = 2.5Ω

ns

Fall Time ––– 5.5 ––– RD = 9.0Ω, See Fig. 10 

Internal Drain Inductance

Internal Source Inductance ––– –––

––– –––

4.5

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact
Input Capacitance ––– 1160 ––– VGS = 0V
Output Capacitance ––– 185 ––– VDS = 25V
Reverse Transfer Capacitance ––– 53 ––– pF ƒ = 1.0MHz, See Fig. 5

D

G

S

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)

––– –––

––– –––

18

72

showing the

A

p-n junction diode.

G

Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V 
Reverse Recovery Time ––– 167 251 ns TJ = 25°C, IF = 11A
Reverse Recovery Charge ––– 929 1394 nC di/dt = 100A/µs



Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

R

θJA

Junction-to-Case ––– 1.0
Case-to-Sink, Flat, Greased Surface  0.50 ––– °C/W
Junction-to-Ambient ––– 62
Junction-to-Ambient (PCB mount) ––– 40

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D

S

IRF640NPbF/SPbF/LPbF

100

10

1

0.1

D

I , Drain-to-Source Current (A)

0.01

0.1 1 10 100

100

10

VGS

TOP

15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

20µs PULSE WIDTH
T = 25 C

J

V , Drain-to-Source Voltage (V)

DS

°

T = 175 C

J

4.5V

°

100

10

TOP

BOTTOM

VGS
15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

4.5V

1

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH

°

T = 175 C

0.1

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

J

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.5

3.0

2.5

2.0

I =

D

18A

°

T = 25 C

J

1

D

I , Drain-to-Source Current (A)

V = 50V

DS

0.1

4.0 5.0 6.0 7.0 8.0 9.0 10.0

V , Gate-to-Source Voltage (V)

GS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

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IRF640NPbF/SPbF/LPbF

2500

2000

)
F
p

(
e

1500

c
n
a

t

i
c
a
p
a

1000

C
,

C

500

Ciss

Coss

V

= 0V, f = 1 MHZ

GS

C

= C

iss

gs

C

= C

rss

oss

= C

gd

ds

C

+ Cgd, C

+ C

gd

ds

Crss

0

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

100

SHORTED

1000

20

I =

11A

D

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

0

0 20 40 60 80

Q , Total Gate Charge (nC)

G

Fig 6. Typical Gate Charge Vs.

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Gate-to-Source Voltage

OPERATION IN THIS AREA LIMITED

V = 160V
V = 100V
V = 40V

BY R

DS
DS
DS

DS(on)

T = 175 C

10

1

SD

I , Reverse Drain Current (A)

0.1

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

Fig 7. Typical Source-Drain Diode

Fig 7. Typical Source-Drain Diode

°

J

°

T = 25 C

J

V = 0 V

V ,Source-to-Drain Voltage (V)

SD

Forward Voltage

Forward Voltage

GS

100

10

D

I , Drain Current (A)I , Drain Current (A)

1

°

= 25 C

C

T T= 175 C
Single Pulse

0.1

0.1 1 10 100 1000

°

J

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

10us

100us

1ms

10ms

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20

16

12

20

16

12

IRF640NPbF/SPbF/LPbF

R

D.U.T.

D.U.T.

D

+

V

DD

-

V

V

DS

DS

V

V

GS

GS

R

R

G

G

10V

10V

Pulse Width ≤ 1 µs

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Duty Factor ≤ 0.1 %

8

8

D

I , Drain Current (A)

D

I , Drain Current (A)

4

4

0

25 50 75 100 125 150 175

0

25 50 75 100 125 150 175

Fig 9. Maximum Drain Current Vs.

Fig 9. Maximum Drain Current Vs.

10

T , Case Temperature ( C)

C

T , Case Temperature ( C)

C

Case Temperature

Case Temperature

°

°

Fig 10a. Switching Time Test Circuit

Fig 10a. Switching Time Test Circuit

V

V

DS

DS

90%

90%

10%

10%
V

V

GS

GS

t

t

t

d(on)tr

d(on)tr

Fig 10b. Switching Time Waveforms

Fig 10b. Switching Time Waveforms

t

d(off)tf

d(off)tf

thJC

1

D = 0.50

0.20

P

1 2

DM

t

1

0.10

0.1

0.05

Thermal Response(Z )

0.01

0.02

0.01

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)

Note s:

1. Duty factor D = t / t

2. Peak T =P x Z + T

t , Rectangular Pulse Duration (sec)

1

J DM thJ C C

t

2

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF640NPbF/SPbF/LPbF

A

15V

DRIVER

R

G

20V

V

DS

t

L

D.U.T

I

AS

Ω

0.01

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

600

TOP

500

400

+

V

DD

-

300

200

100

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150 175

Starting T , Junction Temperature ( C)

J

BOTTOM

I

D

4.4A

7.6A
11A

°

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Current Regulator

Same Type as D.U.T.

50KΩ

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

12V

Fig 13b. Gate Charge Test Circuit

.2µF

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

I

D

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+

V

DS

-

IRF640NPbF/SPbF/LPbF

Peak Diode Recovery dv/dt Test Circuit



D.U.T

+



-

R

G

Driver Gate Drive

P.W.

+

Circuit Layout Considerations

• Low Stray Inductance



• Ground Plane

• Low Leakage Inductance
Current Transformer

-

-

• dv/dt controlled by R

• Driver same type as D.U.T.

G

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

Period

D =

Period



P. W .

+

+

V

DD

-

VGS=10V

*

D.U.T. ISDWaveform

Reverse
Recovery
Current

Re-Applied
Voltage

D.U.T. VDSWaveform

Inductor Curent

* V

= 5V for Logic Level Devices

GS

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

V

DD

I

SD

Fig 14. For N-Channel HEXFET® Power MOSFETs

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IRF640NPbF/SPbF/LPbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

10.54 (.415)

2.87 (.113)

2.62 (.103)

15.24 (.600)

14.84 (.584)

14.09 (.555)

13.47 (.530)

1.40 (.055)

3X

1.15 (.045)

2.54 (.100)

NOTES:

1 DIMENSIO NING & TOLE RANC ING PER AN SI Y14 .5M, 1982 . 3 OUTLINE C ONFORMS TO JEDEC OUTL INE TO-220 AB.

2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

2X

10.29 (.405)

4

1 2 3

3.78 (.1 49)

3.54 (.1 39)

- A -

6.47 (.255)

6.10 (.240)

1.15 (.045)
MIN

4.06 (.160)

3.55 (.140)

0.93 (.037)

3X

0.69 (.027)

0.36 (.014) M B A M

4.69 (.185)

4.20 (.165)

- B -

1.32 (.052)

1.22 (.048)

2.92 ( .115)

2.64 ( .104)

HEXFET

1- GATE
2- DRAIN
3- SOURCE
4- DRAIN

3X

LEAD ASSI GNMENTS

LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN

0.55 (. 022)

0.46 (. 018)

TO-220AB Part Marking Information

IGBTs, CoPACK

1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR

EXAMPLE:

T HIS IS AN IRF 1010

LOT CODE 1789
ASS EMB LE D ON WW 19, 1997
IN THE ASSEMBLY LINE "C"

Note: "P" in assembly line
position in dicates "Lead-Free"

INT E R NAT IONAL

RE CTIFIER

LOGO

ASSEMBLY
LOT CODE

PART NUMBER

DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C

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2

D

Pak Package Outline

Dimensions are shown in millimeters (inches)

IRF640NPbF/SPbF/LPbF

D2Pak Part Marking Information (Lead-Free)

T H IS IS AN IR F 530 S WIT H

LOT CODE 8024
ASS EMB L ED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"

N ote: "P" in as s embly line
po s i tion in dica tes "Lead -F ree"

INT E R NAT IONAL

RECTIFIER

LOGO

AS SE MB LY
LOT CODE

F530S

PART NUMBER

DATE CODE
YEAR 0 = 2000
WEEK 02
LINE L

OR

IN T ER NA T IO NA L

RECTIFIER

LOGO

AS S EM B LY
LOT CODE

F 530S

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PART NUMB ER

DATE CODE

P = DESIGNAT ES LEAD-FR EE

PRODUCT (OPTIONAL)

YEAR 0 = 2000
WEEK 02

A = ASSEMBLY SITE CODE

IRF640NPbF/SPbF/LPbF

TO-262 Package Outline

IGBT

1- GATE

2- COLLECTOR

3- EMITTER

TO-262 Part Marking Information

TH IS IS AN IRL3103L

E X AMPL E :

LOT CODE 1789
ASS EMBLE D ON WW 19, 1997
IN THE ASSEMBLY LINE "C"

Note: "P" in ass embly line
pos iti on indi cates " Lead-F ree"

INTE RNATIONAL

RECTIFIER

LOGO

AS S E MB L Y
LOT CODE

PART NUMBE R

DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C

OR

INTE RNATI ONAL

RECT IFIE R

LOGO

ASSEMBLY
LOT CODE

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PART NUMBER

DAT E CODE
P = DES IGNATES LE AD-FRE E

PRODUCT (OPT IONAL)

YEAR 7 = 1997
WE EK 19

A = ASSEMBLY SITE CODE

D2Pak Tape & Reel Infomation

Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

FEED DI RECTION

TRL

FEED D IRECTION

1.85 (.073)

1.65 (.065)

10.90 (.429)

10.70 (.421)

11.60 (.457)

11.40 (.449)

16.10 (.634)

15.90 (.626)

1.60 (.063)

1.50 (.059)

1.75 (.069)

1.25 (.049)

IRF640NPbF/SPbF/LPbF

0.368 (.0145)

0.342 (.0135)

15.42 (.609)

15.22 (.601)

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

13.50 (.532)

12.80 (.504)

330.00
(14.173)
MAX.

NOTES :

1. COMFORM S TO EIA-418.

2. CONT ROLLING DIMEN SION: MILLIME TER.

3. DIMENSION MEASURE D @ HUB.

4. INCLUDES FLANG E DISTORTION @ OUTER EDG E.

27.40 (1 .079)

23.90 (. 941)

4

26.40 (1.039)

24.40 (.961)

3

60.00 (2. 362)
MIN.

30.40 (1.197)
MAX.

4

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature.

 Starting T

RG = 25Ω, I

 This is applied to D

= 25°C, L = 4.2mH

J

= 11A.

AS

2

Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

 This is only applied to TO-220AB package

For recommended footprint and soldering techniques refer to application note #AN-994.

 I

≤ 11A, di/dt ≤ 344A/µs, V

SD

DD

≤ V

(BR)DSS

,

TJ ≤ 175°C

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: [phone]

TAC Fax: [phone]

Visit us at www.irf.com for sales contact information.02/04

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Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/