This N-Channel enhancementmode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdownavalanchemodeof operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17421.
Ordering Information
PART NUMBERPACKAGEBRAND
IRF140TO-204AEIRF140
NOTE: When ordering, use the entire part number .
File Number
Features
• 28A, 100V
DS(ON)
= 0.077Ω
•r
• Single Pulse Avalanche Energy Rated
• SOA is Power-Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
Symbol
D
G
S
2306.3
Packaging
DRAIN
(FLANGE)
GATE (PIN 1)
JEDEC TO-204AE
SOURCE (PIN 2)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
100mJ
-55 to 175
300
260
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 150oC.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAX UNITS
Drain to Source Breakdown VoltageBV
Gate Threshold VoltageV
GS(TH)VDS
Zero Gate Voltage Drain CurrentI
On-State Drain Current (Note 2)I
D(ON)VDS
Gate to Source Leakage CurrentI
Drain to Source On Resistance (Note 2)r
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
1.0
80µs PULSE TEST
0.8
0.6
VGS = 10V
0.4
, DRAIN TO SOURCE
ON RESISTANCE
DS(ON)
0.2
r
0
0255075100125
, DRAIN CURRENT (A)
I
D
VGS = 20V
3.0
2.4
1.8
1.2
ON RESISTANCE
0.6
NORMALIZED DRAIN TO SOURCE
0
ID = 17A
= 10V
V
GS
04080120160-40
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TOSOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Page 5
IRF140
Typical Performance Curves
1.25
ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
04080120160-40
, JUNCTION TEMPERATURE (oC)
T
J
(Continued)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
20
VDS≥ 50V
80µs PULSE TEST
16
12
8
, TRANSCONDUCTANCE (S)
4
fs
g
0
01020304050
I
, DRAIN CURRENT (A)
D
TJ = 175oC
TJ = 25oC
3000
2400
1800
1200
C, CAPACITANCE (pF)
600
0
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
10
C
ISS
C
OSS
C
RSS
VGS = 0V, f = 1MHz
C
= CGS + C
C
C
ISS
RSS
OSS
= C
≈ CDS + C
GD
GD
GD
10
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
3
10
2
10
TJ = 175oC
10
TJ = 25oC
, SOURCE TO DRAIN CURRENT (A)
SD
I
1
00.61.21.82.43.0
V
, SOURCE TO DRAIN VOLTAGE (V)
SD
2
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 28A
16
12
8
4
, GATE TO SOURCE VOLTAGE (V)
GS
V
0
0 1224364860
Q
, TOTAL GATE CHARGE (nC)
g(TOT)
VDS = 80V
V
= 50V
DS
V
= 20V
DS
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
5
Page 6
IRF140
Test Circuits and Waveforms
V
DS
t
I
AS
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
L
R
G
+
V
DD
-
DUT
0V
P
I
AS
0
t
0.01Ω
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
BV
DSS
P
t
AV
V
DS
V
DD
R
G
V
GS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
CURRENT
REGULATOR
12V
BATTERY
0.2µF
50kΩ
0.3µF
t
ON
t
d(ON)
t
V
R
L
+
V
DD
-
DUT
DS
0
V
GS
0
90%
10%
r
10%
50%
PULSE WIDTH
t
d(OFF)
90%
t
OFF
50%
t
f
90%
10%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
(ISOLATED
SUPPLY)
SAME TYPE
AS DUT
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
GS
G
I
0
g(REF)
IG CURRENT
SAMPLING
RESISTORRESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
6
D
DUT
S
CURRENT
I
D
SAMPLING
V
DS
0
I
V
DS
g(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
Page 7
IRF140
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
7
EUROPE
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Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
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Republic of China
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