Datasheet IRF1404ZPBF Specification

Page 1
PD - 94634A
Pulsed Drain C
c
Single Pul
d
Single Pul
h
Aval
c
R
g
AUTOMOTIVE MOSFET
IRF1404Z
IRF1404ZS
IRF1404ZL
Features
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
G
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on­resistance per silicon area. Additional features of this design are a 175°C junction operating tempera­ture, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
TO-220AB
IRF1404Z
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C ID @ TC = 100°C I
@ TC = 25°C
D
I
DM
PD @TC = 25°C
V
GS
E
AS (Thermally limited)
(Tested )
E
AS
I
AR
E
AR
T
J
T
STG
Continuous Drain Current, V Continuous Drain Current, V Continuous Drain Current, V
urrent Power Dissipation W Linear Derating Factor W/°C
Gate-to-Source Voltage V
se Avalanche Energy se Avalanche Energy Tested Value
anche Current
epetitive Avalanche Energy
Operating Junction and Storage Temperature Range °C
Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
@ 10V (Silicon Limited)
GS
@ 10V
GS
@ 10V (Package Limited)
GS
i
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case Case-to-Sink, Flat Greased S urface Junction-to-Ambient Junction-to-Ambient (PCB Mount)
i
i
j
www.irf.com 1
HEXFET® Power MOSFET
D
V
= 40V
DS(on)
I
D
= 3.7m
= 75A
TO-262
IRF1404ZL
A
mJ
A
mJ
R
S
D2Pak
IRF1404ZS
Max.
190
130
75 750 220
1.5
± 20
320 480
See Fig.12a, 12b, 15, 16
-55 to + 175
300 (1.6mm from case )
y
in (1.1Nym)
10 lbf
––– 0.65 °C/W
0.50 ––– ––– 62 ––– 40
8/28/03
Page 2
IRF1404ZS_L
/
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
V
(BR)DSS
R
DS(on)
V
GS(th)
gfs Forward Transconductance 170 ––– ––– V I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff.
oss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage 40 ––– ––– V
T
Breakdown Voltage Temp. Coefficient ––– 0.033 ––– V/°C
J
Static Drain-to-Source On-Resistance ––– 2.7 3.7
m
Gate Threshold Voltage 2.0 ––– 4.0 V
Drain-to-Source Leakage Current ––– ––– 20 µA
––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 200 nA Gate-to-Source Reverse Leakage ––– ––– -200 Total Gate Charge ––– 100 150 Gate-to-Source Charge ––– 31 ––– nC Gate-to-Drain ("Miller") Charge ––– 42 ––– Turn-On Delay Time ––– 18 ––– Rise Time ––– 110 ––– Turn-Off Delay Time ––– 36 ––– ns Fall Time ––– 58 ––– Internal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
Internal Source Inductanc e ––– 7.5 ––– from package
Input Capacitance ––– 4340 ––– Output Capacitance ––– 1030 ––– Reverse Transfer Capacitance ––– 550 ––– pF Output Capacitance ––– 3300 ––– Output Capacitance ––– 920 ––– Effective Output Capacitance ––– 1350 –––
Parameter Min. Typ. Max. Units
Continuous Source Current ––– ––– 75 (Body Diode) A
Pulsed Source Current ––– ––– 750 (Body Diode)
Diode Forward Voltage ––– ––– 1.3 V Reverse Recovery Time ––– 28 42 ns Reverse Recovery Charge ––– 34 51 nC Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
c
Conditions
VGS = 0V, ID = 250µA Reference to 25°C, I V
= 10V, ID = 75A
GS
= 1mA
D
e
VDS = VGS, ID = 250µA VDS = 25V, ID = 75A
= 40V, VGS = 0V
V
DS
V
= 40V, VGS = 0V, TJ = 125°C
DS
V
= 20V
GS
V
= -20V
GS
I
= 75A
D
V
= 32V
DS
VGS = 10V
e
VDD = 20V I
= 75A
D
R
= 3.0
G
VGS = 10V
e
and center of die contact VGS = 0V
V
= 25V
DS
ƒ = 1.0MHz
= 0V, VDS = 1.0V, ƒ = 1.0MHz
V
GS
V
= 0V, VDS = 32V, ƒ = 1.0MHz
GS
V
= 0V, VDS = 0V to 32V
GS
f
Conditions
MOSFET symbol showing the
integral reverse p-n junction diode.
T
= 25°C, IS = 75A, VGS = 0V
J
TJ = 25°C, IF = 75A, VDD = 20V di/dt = 100A/µs
e
e
2 www.irf.com
Page 3
IRF1404ZS_L
1000
) A
(
t
100
n
e
r
r
u C e
c
r
10
u
o S
-
o
t
-
n
i
a
r
1
D
,
D
I
4.5V
20µs PULSE WIDTH
0.1
0.1 1 10 100
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000
) A
(
t
n
e
r
100
r
u C e
c
r
u
o S
-
o
t
-
10
n
i
a
r D
,
D
I
1
4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0
TJ = 25°C
TJ = 175°C
V
= 15V
DS
20µs PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
V
TOP 15V 10V
7.0V
6.0V
5.5V
5.0V BOTTOM 4.5V
GS
8.0V
1000
V
TOP 15V
) A
(
t
n
e
r
r
u C e
c
r
u
o S
-
o
t
-
n
i
a
r D
, I
10V
7.0V
6.0V
5.5V
5.0V BOTTOM 4.5V
100
D
10
0.1 1 10 100
GS
8.0V
4.5V 20µs PULSE WIDTH
Tj = 175°C
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
200
) S
(
160
e
c
n
a
t
c
u
d
120
n
o
c
s
n
a
r T
80
d
r
a w
r
o F
40
,
s
f G
0
0 40 80 120 160
ID, Drain-to-Source Current (A)
TJ = 175°C
TJ = 25°C
V
= 15V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
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Page 4
IRF1404ZS_L
8000
6000
) F
p
( e
c
n
a
t
4000
i
c
a
p
a C
, C
2000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
gs
gd
ds
Ciss
Coss Crss
+ Cgd, C
+ C
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
) A
(
t
n
e
r
r
u C n
i
a
r D e
s
r
e
v
e R
,
D S
I
100.0
10.0
TJ = 175°C
TJ = 25°C
1.0
0.1
0.2 0.6 1.0 1.4 1.8 VSD, Source-toDrain Voltage (V)
20
SHORTED
ds
gd
ID= 75A
) V
(
16
e
g
a
t
l
o V
12
e
c
r
u
o S
-
o
8
t
-
e
t
a G
,
S
4
G
V
0
0 40 80 120 160
VDS= 32V VDS= 20V
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
V
GS
= 0V
10000
) A
(
t
1000
n
e
r
r
u C e
c
r
u
o S
-
o
t
-
n
i
a
r D
,
D
I
100
10
Tc = 25°C Tj = 175°C Single Pulse
1
0 1 10 100 1000
OPERATION IN T HIS AREA LIMITED BY RDS(on)
V
, Drain-toSource Voltage (V)
DS
100µsec
1msec
10msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRF1404ZS_L
200
LIMITED BY PACKAGE
160
) A
(
t
n
120
e
r
r
u C n
i
a
80
r D
,
D
I
40
0
25 50 75 100 125 150 175
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
2.0
e
c
n
a
t
s
i
s
e R n O
)
e
d
c
r
e
z
u
i
l
o
a
S
-
m
o
r
t
o
-
n
N
i
(
a
r D
,
)
n
o
( S D
R
ID = 75A V
= 10V
GS
1.5
1.0
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
)
C
J
h
t
Z (
e
s
n
o
p
s
e R
l
a m
r
e
h T
0.001
D = 0.50
0.1
0.01
1E-006 1E-005 0.0001 0.001 0.01 0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE ( THERMAL RESPONSE )
t1 , Rectangular Pulse Duration (sec)
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF1404ZS_L
A
15V
DRIVER
+
-
V
DD
R
V
20V
V
DS
G
GS
L
D.U.T
I
AS
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
600
)
J m
(
500
y
g
r
e
n E
400
e
h
c
n
a
l
a
300
v A
e
s
l
u
200
P e
l
g
n
i S
100
, S A
E
0
25 50 75 100 125 150 175
I
TOP 31A 53A BOTTOM 75A
Starting TJ, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4.0
D
) V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50K
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
( e
g
a
t
l
o
3.0
V d
l
o
h
s
e
r
h
t e
t
a
2.0
G
)
h
t
( S G
V
1.0
-75 -50 -25 0 25 50 75 100 125 150 175
ID = 250µA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
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Page 7
10000
IRF1404ZS_L
Duty Cycle = Single Pulse
1000
) A
(
t
n
e
r
r
u C
100
e
h
c
n
a
l
a
v A
10
1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
400
TOP Single Pulse BOTTOM 10% Duty Cycle
)
J m
300
( y
g
r
e
n E
e
200
h
c
n
a
l
a
v A
,
100
R A
E
0
25 50 75 100 125 150 175
ID = 75A
Starting TJ , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
. This is validated for
jmax
every part type.
2. Safe operation in Avalanche is allowed as long asT not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
= Average power dissipation per single
D (ave)
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
·f
av
jmax
is
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
Fig 16. Maximum Avalanche Energy
Vs. Temperature
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
D (ave)·tav
thJC
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Page 8
IRF1404ZS_L
Reverse Recovery Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
Inductor Curent
* V
GS
D.U.T
+
-
R
G
+
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
-
Low Leakage Inductance Current Transformer
-
dv/dt controlled by R
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
G
+
V
DD
Re-Applied Voltage
+
-
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple 5%
= 5V for Logic Level Devices
D =
P.W.
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
+
V
DD
-
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
8 www.irf.com
Page 9
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
10.54 (.41 5)
10.29 (.40 5)
1 2 3
4
6.47 (.255)
6.10 (.240)
1.15 (.045) MIN
4.06 (.160)
3.55 (.140)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.185 )
4.20 (.165 )
IRF1404ZS_L
- B -
1.32 (.052)
1.22 (.048)
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
0.93 (.037 )
3X
1.40 (.05 5)
3X
1.15 (.04 5)
2.54 (.100 )
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DIM ENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
0.69 (.027 )
0.36 (.014) M B A M
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
TO-220AB Part Marking Information
EXAMPLE:
For GB Production
EXAMPLE: THIS IS AN IRF1010
THIS IS AN IRF1010
LOT CODE 1789 ASS EMBL ED ON WW 19, 1997 IN THE AS SEMBLY LINE "C"
LOT CODE 1789 ASS EMBL ED ON WW 19, 1997 IN THE AS SEMBLY LINE "C"
INTERNATIONAL
RECTIFIE R
LOGO
ASSEMBLY LOT CODE
INTERNATIONAL
RECTIFIER
LOGO
LOT CODE
PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
PART NUMBER
DATE CODE
www.irf.com 9
Page 10
IRF1404ZS_L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS I S AN IRF 530S WI T H
LOT CODE 8024 AS S E MBLE D ON WW 02, 2000 IN THE AS SEMBLY LINE "L"
For GB Production
T HIS I S AN IRF 530S WI T H
LOT CODE 8024 AS S E MBLE D ON WW 02, 2000 IN THE AS SEMBLY LINE "L"
INTE RNATIONAL
RECTIF IE R
LOGO
ASSEMBLY LOT CODE
INTE RNATIONAL
RECTIF IE R
LOGO
LOT CODE
F 530S
F 530S
10 www.irf.com
PART NUMB ER
DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
PART NUMB ER
DATE CODE
Page 11
TO-262 Package Outline
E
X
A
M
P
L
E
:
T
H
I
S
I
S
A
N
I
R
L
3
1
0
3
L
L
O
T
C
O
D
E
1
7
8
9
A
S
S
E
M
B
L
Y
P
A
R
T
N
U
M
B
E
R
D
A
T
E
C
O
D
E
W
E
E
K
1
9
L
I
N
E
C
L
O
T
C
O
D
E
Y
E
A
R
7
=
1
9
9
7
A
S
S
E
M
B
L
E
D
O
N
W
W
1
9
,
1
9
9
7
I
N
T
H
E
A
S
S
E
M
B
L
Y
L
I
N
E
"
C
"
L
O
G
O
R
E
C
T
I
F
I
E
R
I
N
T
E
R
N
A
T
I
O
N
A
L
Dimensions are shown in millimeters (inches)
IRF1404ZS_L
IGBT
1- GATE 2- COLLEC-
TOR
TO-262 Part Marking Information
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Page 12
IRF1404ZS_L
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTIO N
TRL
FEED DIRECTIO N
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIME NS ION: MILLIM E TER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
RG = 25, I
, starting TJ = 25°C, L = 0.11mH
Jmax
= 75A, VGS =10V. Part not
AS
recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.C
eff. is a fixed capacitance that gives the
oss
same charging time as C from 0 to 80% V
DSS
.
oss
1.85 (.073)
1.65 (.065)
330.00 (14.173) MAX.
while V
10.90 (.429)
10.70 (.421)
13.50 (.532)
12.80 (.504)
is rising
DS
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.75 (.069)
1.25 (.049)
16.10 (.634)
15.90 (.626)
Limited by T
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.40 (1.039)
24.40 (.961)
3
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362) MIN.
30.40 (1.197) MAX.
4
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
 This is only applied to TO-220AB pakcage.  This is applied to D
4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
2
Pak, when mounted on 1" square PCB (FR-
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/03
12 www.irf.com
Page 13
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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