Specifically designed for Automotive applications, this HEXFET® Power
MOSFET utilizes the latest processing techniques to achieve extremely
low on-resistance per silicon area. Additional features of this design are
a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this
design an extremely efficient and reliable device for use in Automotive
applications and a wide variety of other applications.
Absolute Maximum Ratings
ParameterUnits
ID @ TC = 25°C
ID @ TC = 100°C
I
@ TC = 25°C
D
I
DM
PD @TC = 25°C
V
GS
E
AS (Thermally limited)
(Tested )
E
AS
I
AR
E
AR
T
J
T
STG
Continuous Drain Current, V
Continuous Drain Current, V
Continuous Drain Current, V
urrent
Power Dissipation W
Linear Derating Factor W/°C
Gate-to-Source VoltageV
se Avalanche Energy
se Avalanche Energy Tested Value
anche Current
epetitive Avalanche Energy
Operating Junction and
Storage Temperature Range°C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
400
TOP Single Pulse
BOTTOM 10% Duty Cycle
)
J
m
300
(
y
g
r
e
n
E
e
200
h
c
n
a
l
a
v
A
,
100
R
A
E
0
255075100125150175
ID = 75A
Starting TJ , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
. This is validated for
jmax
every part type.
2. Safe operation in Avalanche is allowed as long asT
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
= Average power dissipation per single
D (ave)
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t
Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
av
·f
jmax
is
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
Fig 16. Maximum Avalanche Energy
Vs. Temperature
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
D (ave)·tav
thJC
www.irf.com7
Page 8
IRF1404Z
Reverse
Recovery
Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
Inductor Curent
* V
GS
D.U.T
+
-
R
G
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
V
DD
Re-Applied
Voltage
+
-
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P.W.
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
0.69 (.027)
0.36 (.014) M B A M
0.55 (.022 )
3X
0.46 (.018 )
2.92 (.115)
2.64 (.104)
TO-220AB Part Marking Information
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 3/03
www.irf.com9
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