Datasheet IRF1404SPBF Datasheet

PD -95104

IRF1404SPbF

l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free

Description

Seventh Generation HEXFET® Power MOSFETs from

G

International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.

The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on­resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRF1404L) is available for low­profile applications.

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 162
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 115 A
I

DM

PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 200 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
T

J

T

STG

Pulsed Drain Current  650

Linear Derating Factor 1.3 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 519 mJ
Avalanche Current 95 A
Repetitive Avalanche Energy 20 mJ

Operating Junction and -55 to +175
Storage Temperature Range -55 to +175
Soldering Temperature, for 10 seconds 300 (1.6mm from case )

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θJA

Junction-to-Case ––– 0.75 °C/W
Junction-to-Ambient (PCB mounted, steady-state)* ––– 40

HEXFET® Power MOSFET

D

V

= 40V

DSS

R

DS(on)

= 0.004Ω

ID = 162A

S

D2Pak

IRF1404SPbF

TO-262

IRF1404LPbF

IRF1404LPbF

°C

www.irf.com 1

03/11/04

IRF1404S/LPbF

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

C

eff. Effective Output Capacitance  ––– 1540 ––– VGS = 0V, VDS = 0V to 32V

oss

Source-Drain Ratings and Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11)

 Starting T

RG = 25Ω, I

 I

SD

TJ ≤ 175°C

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.036 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– 0.00350.004 Ω VGS = 10V, ID = 95A 
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
Forward Transconductance 106 ––– ––– S VDS = 25V, ID = 60A

Drain-to-Source Leakage Current

––– ––– 20

––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 V
Gate-to-Source Reverse Leakage ––– ––– -200

VDS = 40V, VGS = 0V

µA

= 20V

GS

nA

VGS = -20V
Total Gate Charge ––– 160 200 ID = 95A
Gate-to-Source Charge ––– 35 ––– nC VDS = 32V
Gate-to-Drain ("Miller") Charge ––– 42 60 VGS = 10V 
Turn-On Delay Time ––– 17 ––– VDD = 20V
Rise Time ––– 140 ––– ID = 95A
Turn-Off Delay Time ––– 72 ––– RG = 2.5Ω

ns

Fall Time ––– 26 ––– RD = 0.21Ω 

Internal Source Inductance

–––

7.5

–––

Between lead,

nH

and center of die contact
Input Capacitance ––– 7360 ––– VGS = 0V
Output Capacitance ––– 1680 ––– VDS = 25V
Reverse Transfer Capacitance ––– 240 ––– pF ƒ = 1.0MHz, See Fig. 5 
Output Capacitance ––– 6630 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 1490 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz

Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode) 

––– –––

––– –––

162

650

showing the

A

p-n junction diode.
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 95A, VGS = 0V 
Reverse Recovery Time ––– 71 110 ns TJ = 25°C, IF = 95A
Reverse RecoveryCharge ––– 180 270 nC di/dt = 100A/µs 
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 C

eff. is a fixed capacitance that gives the same charging time

oss

= 25°C, L = 0.12mH

J

= 95A. (See Figure 12)

AS

≤ 95A, di/dt ≤ 150A/µs, V

DD

≤ V

(BR)DSS

as C

 Calculated continuous current based on maximum allowable

junction temperature. Package limitation current is 75A

,

 Use IRF1404 data and test conditions.

oss

while V

is rising from 0 to 80% V

DS

DSS

D

G

S

* When mounted on 1" square PCB ( FR-4 or G-10 Material ).

For recommended footprint and soldering techniques refer to application note #AN-994.

2 www.irf.com

IRF1404S/LPbF

1000

100

TOP

BOTTOM

VGS
15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

4.5V

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH

°

T = 25 C

10

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

1000

T = 25 C

J

J

°

T = 175 C

J

1000

100

D

I , Drain-to-Source Current (A)

10

0.1 1 10 100

VGS

TOP

15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

4.5V

20µs PULSE WIDTH
T = 175 C

J

V , Drain-to-Source Voltage (V)

DS

°

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

2.5

°

2.0

I =

D

159A

1.5

100

1.0

(Normalized)

D

I , Drain-to-Source Current (A)

V = 25V

DS

10

4.0 5.0 6.0 7.0 8.0 9.0

V , Gate-to-Source Voltage (V)

GS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

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IRF1404S/LPbF

12000

10000

8000

6000

4000

C, Capacitance (pF)

2000

0

1 10 100

V

=

0V,

GS

C

=

iss gs gd , ds

C

=

rss gd

C

=

oss ds gd

C

C

V , Drain- to-Source Voltage (V)

DS

f = 1MHz

C

+ C
C
C

C

iss

oss

rss

C SHORTED

+ C

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

°

T = 175 C

J

100

20

I =

95A

D

V = 32V

DS

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

V = 20V

DS

FOR TEST CIRCUIT

0

0 40 80 120 160 200 240

Q , Total Gate Charge (nC)

G

SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

10000

OPERATION IN THIS AREA LIMITED

1000

BY R

DS(on)

13

10us

100us

1ms

10ms

°

T = 25 C

J

10

SD

I , Reverse Drain Current (A)

V = 0 V

1

0.4 0.8 1.2 1.6 2.0 2.4

V ,Source-to-Drain Voltage (V)

SD

GS

Fig 7. Typical Source-Drain Diode

100

D

I , Drain Current (A)I , Drain Current (A)

10

°

= 25 C

C

T T= 175 C
Single Pulse

1

1 10 100

°

J

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

200

LIMITED BY PACKAGE

160

120

80

D

I , Drain Current (A)

40

0

25 50 75 100 125 150 175

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

IRF1404S/LPbF

R

D.U.T.

t

d(off)tf

D

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10%
V

GS

t

d(on)tr

Fig 10b. Switching Time Waveforms

+

V

DD

-

1

D = 0.50

thJC

0.20

0.1

0.10

P

1 2

DM

t

1

t

2

0.05

Thermal Response(Z )

0.01

0.02

0.01

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)

Note s:

1. Duty factor D = t / t

2. Peak T = P x Z + T

t , Rectangular Pulse Duration (sec)

1

J DM thJC C

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRF1404S/LPbF

A

15V

DRIVER

+

-

V

R

20V

V

DS

G

t

L

D.U.T

I

AS

0.01

p

Ω

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

Q

GD

DD

1200

TOP

1000

800

600

400

200

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150 175

Starting T , Junction Temperature( C)

J

BOTTOM

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

50

I

D
39A
67A
95A

°

)
V

V

G

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

12V

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

+

V

DS

-

I

D

Fig 13b. Gate Charge Test Circuit

48

(
e

g
a

t

l
o
V

46

e
h
c
n
a

l
a

44

v
A
,

v
a
S

42

D

V

40

0 20 40 60 80 100

I

, Avalanche Current ( A)

AV

Fig 12d. Typical Drain-to-Source Voltage

Vs. Avalanche Current

6 www.irf.com

IRF1404S/LPbF

Peak Diode Recovery dv/dt Test Circuit





D.U.T

+

-

R

G

Driver Gate Drive

P.W.

+

Circuit Layout Considerations

• Low Stray Inductance



• Ground Plane

• Low Leakage Inductance
Current Transformer

-

-

• dv/dt controlled by R

• Driver same type as D.U.T.

G

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

Period

D =



P. W .

Period

+

+

V

DD

-

VGS=10V

*

D.U.T. ISDWaveform

Reverse
Recovery
Current

Re-Applied
Voltage

D.U.T. VDSWaveform

Inductor Curent

* V

= 5V for Logic Level Devices

GS

Fig 14. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

V

DD

I

SD

®

Power MOSFETs

www.irf.com 7

IRF1404S/LPbF

2

D

Pak Package Outline

Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information (Lead-Free)

T H IS IS AN IR F 5 30S WIT H
LOT CODE 8024

AS S E M B LE D ON WW 0 2, 2000
IN THE ASS EMBLY LINE "L"

N ote: "P" in as sem bly line

po s i tio n i nd icates "L ead -F ree"

INT ER NAT ION AL

R E CT IF IER

LOGO

ASSEMBLY
LOT CODE

F530S

PART NUMBER

DATE CODE
YE AR 0 = 2000
WEE K 02
LINE L

OR

IN T E R N AT ION AL

RECTIFIER

LOGO

AS S EM B LY
LOT CODE

F 530S

8 www.irf.com

PART NUMB ER

DATE CODE

P = DESIGNATE S LEAD-F RE E

PRODUCT (OPTIONAL)

YEAR 0 = 2000
WEEK 02

A = ASSEMBLY SITE CODE

TO-262 Package Outline

IRF1404S/LPbF

IGBT

1- GATE

2- COLLECTOR

3- EMITTER

TO-262 Part Marking Information

TH IS IS AN I RL3103L

E X AMPL E :

LOT CODE 1789
ASS EMBLE D ON WW 19, 1997
IN T HE ASSEMBLY LINE "C"

Note: "P" in ass embl y line
pos iti on indicates "L ead-F ree"

INTE RNAT IONAL

RECT IFIER

LOGO

AS S E MB L Y
LOT CODE

PART NUMBE R

DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C

OR

INTE RNATIONAL

RECT IFIE R

LOGO

ASSEMBLY
LOT CODE

www.irf.com 9

PART NUMB ER

DAT E CODE
P = DES IGNATES LE AD-F REE

PRODUCT (OPT IONAL)

YEAR 7 = 1997
WE EK 19

A = ASSEMBLY SITE CODE

IRF1404S/LPbF

D2Pak Tape & Reel Infomation

Dimensions are shown in millimeters (inches)

TRR

FEED DI RECTION

TRL

FEED DI RECTION

1.85 (.073)

1.65 (.065)

10.90 (.429)

10.70 (.421)

4.10 (.161)

3.90 (.153)

1.60 (.063)

1.50 (.059)

11.60 (.457)

11.40 (.449)

16.10 (.634)

15.90 (.626)

1.60 (.063)

1.50 (.059)

1.75 (.069)

1.25 (.049)

15.42 (.609)

15.22 (.601)

0.368 (.0145)

0.342 (.0135)

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

13.50 ( .532)

12.80 ( .504)

330.00
(14.173)
MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

27.40 ( 1.079)

23.90 ( .941)

4

26.40 ( 1.03 9)

24.40 ( .961 )

3

60.00 (2.362)
MIN.

30.40 ( 1.197)
MAX.

4

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: [phone]

TAC Fax: [phone]

Visit us at www.irf.com for sales contact information.03/04

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Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/