Datasheet IRF1404PBF Specification

PD-94968B

IRF1404PbF

l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free

Description

G

HEXFET® Power MOSFET

D

V

= 40V

DSS

R

S

= 0.004Ω

DS(on)

= 202A

I

D

Seventh Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.

The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation

TO-220AB

levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the industry.

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 202
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 143 A
I

DM

PD @TC = 25°C Power Dissipation 333 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  1.5 V/ns
T

J

T

STG

Pulsed Drain Current  808

Linear Derating Factor 2.2 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 620 mJ
Avalanche Current See Fig.12a, 12b, 15, 16 A
Repetitive Avalanche Energy mJ

Operating Junction and -55 to + 175
Storage Temperature Range -55 to + 175
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

°C

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

Junction-to-Case ––– 0.45
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62

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04/11/12

IRF1404PbF

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

ΔV

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

C

eff. Effective Output Capacitance  ––– 2249 ––– VGS = 0V, VDS = 0V to 32V

oss

Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250μA

/ΔT

Breakdown Voltage Temp. Coefficient ––– 0.039 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– 0.0035 0.004 Ω VGS = 10V, ID = 121A 
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250μA
Forward Transconductance 76 ––– ––– S VDS = 25V, ID = 121A

Drain-to-Source Leakage Current

––– ––– 20

––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200

μA

nA

V

= 40V, VGS = 0V

DS

VGS = -20V
Total Gate Charge ––– 131 196 ID = 121A
Gate-to-Source Charge ––– 36 ––– nC VDS = 32V
Gate-to-Drain ("Miller") Charge ––– 37 56 VGS = 10V
Turn-On Delay Time ––– 17 ––– VDD = 20V
Rise Time ––– 190 ––– ID = 121A
Turn-Off Delay Time ––– 46 ––– RG = 2.5Ω

ns

Fall Time ––– 33 ––– RD = 0.2Ω 

4.5

Internal Drain Inductance

Internal Source Inductance ––– –––

––– –––

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact
Input Capacitance ––– 5669 ––– VGS = 0V
Output Capacitance ––– 1659 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 223 ––– ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 6205 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 1467 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz

D

G

S

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode) 

––– –––

––– –––

202

808

showing the

A

p-n junction diode.

G

Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 121A, VGS = 0V 
Reverse Recovery Time ––– 78 117 ns TJ = 25°C, IF = 121A
Reverse RecoveryCharge ––– 163 245 nC di/dt = 100A/μs 
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11)

 Starting T

RG = 25Ω, I

 I

SD

= 25°C, L = 85μH

J

= 121A. (See Figure 12)

AS

≤ 121A, di/dt ≤ 130A/μs, V

DD

≤ V

(BR)DSS

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

 C

eff. is a fixed capacitance that gives the same charging time

oss

as C

 Calculated continuous current based on maximum allowable

,

junction temperature. Package limitation current is 75A.

oss

while V

is rising from 0 to 80% V

DS

DSS

TJ ≤ 175°C

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D

S

IRF1404PbF

1000

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

1000

VGS

TOP

15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

4.5V

20μs PULSE WIDTH
T = 25 C

J

V , Drain-to-Source Voltage (V)

DS

°

T = 25 C

J

T = 175 C

J

°

°

1000

100

TOP

BOTTOM

VGS
15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

4.5V

10

D

I , Drain-to-Source Current (A)

20μs PULSE WIDTH

°

T = 175 C

1

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

J

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

2.5

2.0

I =

D

202A

1.5

100

1.0

(Normalized)

D

I , Drain-to-Source Current (A)

V = 25V

DS

10

4 5 6 7 8 9 10 11 12

V , Gate-to-Source Voltage (V)

GS

20μs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

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IRF1404PbF

)
F
p

(
e
c
n
a

t

i
c
a
p
a

C
,

C

10000

8000

6000

4000

2000

V

= 0V, f = 1 MHZ

GS

C

= C

iss

gs

C

= C

rss

gd

C

= C

oss

ds

Ciss

Coss

+ Cgd, C

Crss

0

1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

°

T = 175 C

J

100

+ C

gd

SHORTED

ds

20

I =

121A

V , Gate-to-Source Voltage (V)

GS

D

16

12

8

4

V = 32V

DS

V = 20V

DS

FOR TEST CIRCUIT

0

0 50 100 150 200

Q , Total Gate Charge (nC)

G

SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

10000

OPERATION IN THIS AREA LIMITED

1000

BY R

DS(on)

13

10us

10

°

T = 25 C

J

1

SD

I , Reverse Drain Current (A)

V = 0 V

0.1

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

V ,Source-to-Drain Voltage (V)

SD

GS

Fig 7. Typical Source-Drain Diode

100

D

I , Drain Current (A)I , Drain Current (A)

10

°

= 25 C

C

T T= 175 C
Single Pulse

1

1 10 100

°

J

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

100us

1ms

10ms

Forward Voltage

4 www.irf.com

220

200

180

160

140

120

100

80

D

I , Drain Current (A)

60

40

20

0

25 50 75 100 125 150 175

LIMITED BY PACKAGE

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

IRF1404PbF

R

D.U.T.

t

d(off)tf

D

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10%
V

GS

t

d(on)tr

Fig 10b. Switching Time Waveforms

+

V

DD

-

1

D = 0.50

thJC

0.20

0.1

0.10

0.05

0.02

0.01

0.01

Thermal Response (Z )

0.001

0.00001 0.0001 0.001 0.01 0.1

SINGLE PULSE

(THERMAL RESPONSE)

t , Rectangular Pulse Duration (sec)

1

P

DM

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

J DM thJC C

t

1

t

2

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF1404PbF

A

15V

DRIVE R

+

-

V

R

G

20V

V

DS

t

L

D.U.T

I

AS

0.01

p

Ω

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

.2μF

12V

V

GS

3mA

.3μF

D.U.T.

+

V

DS

-

DD

1500

TOP

1200

900

600

300

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150 175

Starting T , Junction Temperature( C)

J

BOTTOM

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

4.0

)
V

(
e

g
a

t

l
o
V

3.0

d

l
o
h
s
e

r
h

t
e

t
a

2.0

G

)
h

t

(
S
G

V

-

1.0

-75 -50 -25 0 25 50 75 100 125 150

TJ , Temperature ( °C )

ID = -250μA

I

D

49A
101A
121A

°

I

Current Sampling Resistors

I

G

D

Fig 14. Threshold Voltage Vs. Temperature

Fig 13b. Gate Charge Test Circuit

6 www.irf.com

1000

IRF1404PbF

Duty Cycle = Single Pulse

)
A

(

100

t
n
e

r

r
u

C
e

h
c
n
a

l
a

10

v
A

1

1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

0.01

0.05

0.10

Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

400

TOP Single Pulse

350

)
J

m

300

(
y

g

r
e

250

n
E

e
h

200

c
n
a

l
a

150

v
A
,

R

100

A

E

50

0

25 50 75 100 125 150 175

BOTTOM 10% Duty Cycle
ID = 121A

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T
every part type.

. This is validated for

jmax

2. Safe operation in Avalanche is allowed as long asT

is not exceeded.

3. Equation below based on circuit and waveforms shown

in Figures 12a, 12b.

4. P

avalanche pulse.

= Average power dissipation per single

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ΔT = Allowable rise in junction temperature, not to exceed

T

(assumed as 25°C in Figure 15, 16).

jmax

t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t
Z

(D, tav) = Transient thermal resistance, see figure 11)

thJC

av

·f

jmax

P

= 1/2 ( 1.3·BV·Iav) = DT/ Z

Fig 16. Maximum Avalanche Energy

D (ave)

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

Vs. Temperature

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IRF1404PbF

Peak Diode Recovery dv/dt Test Circuit





D.U.T

+

-

R

G

Driver Gate Drive

P.W.

+

Circuit Layout Considerations

• Low Stray Inductance



• Ground Plane

• Low Leakage Inductance
Current Transformer

-

-

• dv/dt controlled by R

• Driver same type as D.U.T.

G

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

Period

D =



P. W .

Period

+

+

V

DD

-

VGS=10V

*

D.U.T. ISDWaveform

Reverse
Recovery
Current

Re-Applied
Voltage

D.U.T. VDSWaveform

Inductor Curent

* V

= 5V for Logic Level Devices

GS

Fig 17. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

V

DD

I

SD

®

Power MOSFETs

8 www.irf.com

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

IRF1404PbF

EXAMPLE : T HIS I S AN IRF1010

LOT CODE 1789
ASS EMBLED ON WW 19, 2000
IN THE ASSE MBLY LINE "C"

Note: "P" in as sembly line posi tion

indi cates "Lead - F ree"

INTERNATIONAL

RECTIFIE R

LOGO

AS S E MB L Y
LOT CODE

PART NUMBER

DATE CODE
YEAR 0 = 2000
WEEK 19
LINE C

TO-220 package is not recommended for Surface Mount Application.

Notes:

1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 101N.Sepulveda blvd, El Segundo, California 90245, USA Tel: [phone]

TAC Fax: [phone]

Visit us at www.irf.com for sales contact information.04/2012

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