Datasheet IR2153, IR2153S Datasheet (International Rectifier)

Data Sheet No. PD-6.062A

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IR2153

SELF-OSCILLATING HALF-BRIDGE DRIVER

Features

n Floating channel designed for bootstrap operation

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune

n Undervoltage lockout
n Programmable oscillator frequency

f =

1.4 (R 75 ) C

nMatched propagation delay for both channels
n Micropower supply startup current of 90 µA.
n Shutdown function turns off both channels
n Low side output in phase with R

1

×+ ×

Ω

TT

T

Description

The IR2153 is a high voltage, high speed, self-os­cillating power MOSFET and IGBT driver with both high
and low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. The front end fea­tures a programmable oscillator which is similar to the
555 timer. The output drivers feature a high pulse cur­rent buff er stage and an internal deadtime designed f or
minimum driver cross-conduction. Propagation dela ys
for the two channels are matched to simplify use in
50% duty cycle applications. The floating channel can

Typical Connection

Product Summary

V

OFFSET

Duty Cycle 50%

IO+/- 200 mA / 400 mA

V

clamp

Deadtime (typ.) 1.2 µs

600V max.

15.6V

Packages

be used to drive an N-channel power MOSFET or
IGBT in the high side configuration that operates off
a high voltage rail up to 600 volts.

up to 600V

V

CC

R

T

T

M

V

B

H

V

S

L

TO

LOAD

1

1/6/97

IR2153

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Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.

Parameter Value

Symbol Definition Min. Max. Units

V

B

V

S

V

HO

V

LO

V

RT

V

CT

I

CC

I

RT

dVs/dt Allowable Offset Supply Voltage Transient — 50 V/ns

P

D

R

θJA

T

J

T

S

T

L

High Side Floating Supply Voltage -0.3 625
High Side Floating Supply Offset Voltage VB - 25 VB + 0.3
High Side Floating Output Voltage VS - 0.3 V
Low Side Output Voltage -0.3 VCC + 0.3
RT V oltage -0.3 VCC + 0.3
CT Voltage -0.3 V
Supply Current (Note 1) — 25
RT Output Current -5 5

Package Power Dissipation @ TA ≤ +25°C (8 Lead DIP) — 1.0

(8 Lead SOIC) — 0.625

Thermal Resistance, Junction to Ambient (8 Lead DIP) — 125

(8 Lead SOIC) — 200
Junction Temperature — 150
Storage Temperature -55 150 °C
Lead Temperature (Soldering, 10 seconds) — 300

CC

B

+ 0.3

+ 0.3

mA

°C/W

V

W

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V

Symbol Definition Min. Max. Units

V

B

V

S

V

HO

V

LO

I

CC

T

A

Note 1: Because of the IR2153’s application specificity toward off-line supply systems, this IC contains a zener clamp

2

High Side Floating Supply Absolute Voltage VS + 10 VS + 20
High Side Floating Supply Offset Voltage — 600
High Side Floating Output Voltage V
Low Side Output Voltage 0 V
Supply Current (Note 1) — 5 mA
Ambient Temperature -40 125 °C

structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Theref or e, the IC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip V

to COM) and allowing the internal zener clamp circuit to deter mine the nominal supply voltage. There-

V

CC

fore, this circuit should not be driven by a DC, low impedance power source of greater than V

offset rating is tested with all supplies biased at 15V differential.

S

Parameter Value

S

and the rectified line voltage and a local decoupling capacitor from

CC

V

B

CC

CLAMP

V

.

IR2153

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Dynamic Electrical Characteristics

V

(VCC, VBS) = 12V, CL = 1000 pF and TA = 25°C unless otherwise specified.

BIAS

Parameter Value

Symbol Definition Min. Typ. Max. Units Test Conditions

t
t

t

sd

DT Deadtime

DR

Turn-On Rise Time — 80

r

Turn-Off Fall Time — 35

f

Shutdown Propagation Delay

—
—

Duty Cycle

T

—

Static Electrical Characteristics

V

(VCC, VBS) = 12V, CL = 1000 pF, CT = 1 nF and TA = 25°C unless otherwise specified. The VIN, VTH and I

BIAS

parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the
respective output leads: HO or LO.

Parameter Value

Symbol Definition Min. Typ. Max. Units Test Conditions

f

OSC

V

CLAMP

V
V

V

CTSD

V

V

V
V

I

I

QBS

I

QCCUV

I

QCC

I

V

CCUV+

V

CCUV-

V

CCUVH

I

I

CT+

CT-

RT+

RT-

OH
OL

LK

CT

O+
O-

Oscillator Frequency — 20.0 — RT = 35.7 kΩ

— 100 — RT = 7.04 kΩ
VCC Zener Shunt Clamp Voltage — 15.6 — ICC = 5 mA
2/3 VCC Threshold — 8.0 —
1/3 VCC Threshold — 4.0 —
CT shutdown Input Threshold — 2.2 —
RT High Level Output Voltage, VCC - R

T

— 0 100 IRT = -100 µA

— 200 300 IRT = -1 mA
RT Low Level Output Voltage — 20 50 IRT = 100 µ A

— 200 300 IRT = 1 mA
High Level Output Voltage, V
Low Level Output V oltage, V

BIAS

O

- V

O

— — 100 IO = 0A

— — 100 IO = 0A
Offset Supply Leakage Current — — 50 VB = VS = 600V
Quiescent VBS Supply Current — 10 —
Micropower VCC Supply Startup Current — 90 — µA V
Quiescent VCC Supply Current — 400 — V
CT Input Current — 0.001 1.0
VCC Supply Undervoltage Positive Going — 9.0 —
Threshold
VCC Supply Undervoltage Negative Going — 8.0 —
Threshold
VCC Supply Undervoltage Lockout Hysteresis — 1.0 — V
Output High Short Circuit Pulsed Current — 200 — VO = 0V
Output Low Short Circuit Pulsed Current — 400 — VO = 15V

—
—
—

660

—

1.2
50 — %

ns

µs

kHz

V

mV

V

mA

CC
CC

< V
> V

IN

CCUV
CCUV

3

IR2153

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Functional Block Diagram

R

T

R

+

-

R

RQ

+

S

R/2

C

T

R/2

-

+

-

Q

LOGIC

DEAD

TIME

PULSE

DEAD
TIME

GEN

HV

LEVEL

SHIFT

PULSE
FILTER

DELAY

R
S

15.6V

V

B

Q

HO

V

S

V

CC

LO

UV

DETECT

Lead Definitions

Lead

Symbol Description

R

T

C

T

V

B

HO High side gate dri ve output
V

S

V

CC

LO Low side gate drive output
COM Low side return

Oscillator timing resistor input,in phase with HO for normal IC operation
Oscillator timing capacitor input, the oscillator frequency according to the following equation:

f =

where 75Ω is the effective impedance of the RT output stage
High side floating supply

High side floating supply return
Low side and logic fixed supply

Lead Assignments

1

×+ ×

1.4 (R 75 ) C

Ω

TT

COM

4

8 Lead DIP SO-8

IR2153 IR2153S

Device Information

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Process & Design Rule HVDCMOS 4.0 µm
Transistor Count 231
Die Size 68 X 101 X 26 (mil)
Die Outline

Thickness of Gate Oxide 800Å
Connections Material Poly Silicon

First Width 5 µm
Layer Spacing 6 µm

Second Width 6 µm
Layer Spacing 9 µm

Contact Hole Dimension 5 µm X 5 µm
Insulation Layer Material PSG (SiO2)

Passivation Material PSG (SiO2)

Method of Saw Full Cut
Method of Die Bond Ablebond 84 - 1
Wire Bond Method Thermo Sonic

Leadframe Material Cu

Pa ckage Types 8 Lead PDIP / SO-8

Remarks:

IR2153

Thickness 5000Å
Material Al - Si - Cu (Si: 1.0%, Cu: 0.5%)

Thickness 20,000Å

Thickness 1.7 µm

Thickness 1.7 µm

Material Au (1.0 mil / 1.3 mil)

Die Area Ag
Lead Plating Pb : Sn (37 : 63)

Materials EME6300 / MP150 / MP190

5

IR2153

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V

CLAMP

R

(LO)

T

50%

R

(HO)

T

T

t

r

50%

90% 90%

V

R

HO

CC

T

V

CCUV

+

C

LO

LO

Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions

R

T

50% 50%

LO

HO

10%

90%

HO

90%

DT

10% 10%

t

f

6

10%

Figure 3. Deadtime Wavefor m Definitions

8 Lead DIP

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IR2153

INCHES MILLIMETERS

DIM MIN MAX MIN MAX

A .0532 .06 8 8 1.35 1.75

A1 .0040 .0098 0.10 0.25

B .014 .018 0.36 0.46
C .0075 .0098 0.19 0.25
D .189 .196 4.80 4.98
E .150 .157 3.81 3.99
e .050 BASIC 1.27 BASIC

e1 .025 BASIC 0.635 BASIC

H .2284 .2440 5.80 6.20
K .011 .019 0.28 0.48
L .016 .050 0.41 1.27
θ 0° 8° 0° 8°

SO-8

7

IR2153

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8

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