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Data Sheet No. PD-6.041C
IR2118
SINGLE CHANNEL DRIVER
Features
n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout
n CMOS Schmitt-triggered inputs with pull-down
n Output out of phase with input
Description
The IR2118 is a high voltage, high speed power
MOSFET and IGBT driver. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is
compatible with standard CMOS outputs. The output driver features a high pulse current buffer stage
designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high or low side configuration which operates up to 600 volts.
Product Summary
V
OFFSET
IO+/- 200 mA / 420 mA
V
OUT
t
(typ.) 125 & 105 ns
on/off
Packages
600V max.
10 - 20V
Typical Connection
V
CC
IN
V
CC
COM
up to 600V
V
B
HOIN
V
S
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-83
TO
LOAD
Page 2
IR2118
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Ther mal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 5 through 8.
Parameter Value
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
IN
dVs/dt Allowable Offset Supply Voltage Transient (Figure 2) — 50 V/ns
P
D
R
θJA
T
J
T
S
T
L
High Side Floating Supply Voltage -0.3 625
High Side Floating Supply Offset Voltage VB - 25 VB + 0.3
High Side Floating Output Voltage VS - 0.3 V
Logic Supply Voltage -0.3 25
Logic Input Voltage -0.3 V
Package Power Dissipation @ TA ≤ +25°C (8 Lead DIP) — 1.0
(8 Lead SOIC) — 0.625
Thermal Resistance, Junction to Ambient (8 Lead DIP) — 125
(8 Lead SOIC) — 200
Junction Temperature — 150
Storage Temperature -55 150 °C
Lead Temperature (Soldering, 10 seconds) — 300
+ 0.3 V
B
+ 0.3
CC
W
°C/W
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
IN
T
A
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS.
B-84 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
High Side Floating Supply Absolute Voltage VS + 10 VS + 20
High Side Floating Supply Offset Voltage Note 1 600
High Side Floating Output Voltage V
Logic Supply Voltage 10 2 0
Logic Input Voltage 0 V
Ambient Temperature -40 125 °C
offset rating is tested with all supplies biased at 15V differential.
S
Parameter Value
S
V
B
CC
V
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IR2118
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics
BIAS
are measured using the test circuit shown in Figure 3.
Parameter Value
Symbol Definition Min. Typ. Max. Units Test Conditions
t
on
t
off
t
t
Static Electrical Characteristics
V
(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
BIAS
COM. The V
Symbol Definition Min. Typ. Max. Units Test Conditions
V
V
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
I
O+
I
O-
Turn-On Propagation Delay — 125 200 VS = 0V
Tur n-Off Propagation Delay — 105 180 VS = 600V
Turn-On Rise Time — 80 130
r
Tur n-Off Fall Time — 40 65
f
and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
O
ns
Parameter Value
Logic “0” Input Voltage 6.4 — — VCC = 10V
IH
9.5 — — VCC = 15V
12.6 — — VCC = 20V
Logic “1” Input Voltage — — 3.8 VCC = 10V
IL
——6.0 VCC = 15V
——8.3 VCC = 20V
High Level Output V oltage, V
Low Level Output Voltage , V
BIAS
O
- V
O
— — 100 IO = 0A
— — 100 IO = 0A
Offset Supply Leakage Current — — 50 VB = VS = 600V
Quiescent VBS Supply Current — 50 24 0 V
Quiescent VCC Supply Current — 70 340 µA VIN = 0V or V
Logic “1” Input Bias Current — — 1.0 VIN = 0V
Logic “0” Input Bias Current — 20 40 VIN = 15V
VBS Supply Undervoltage Positive Going Threshold 7.6 8.6 9.6
VBS Supply Undervoltage Negative Going Threshold 7.2 8.2 9.2
VCC Supply Undervoltage Positive Going Threshold 7.6 8.6 9.6
VCC Supply Undervoltage Negative Going Threshold 7.2 8.2 9.2
Output High Short Circuit Pulsed Current 200 250 — VO = 0V, V
Output Low Short Circuit Pulsed Current 420 500 — VO = 15V, V
V
mV
V
mA
= 0V or V
IN
IN
PW ≤ 10 µs
IN
PW ≤ 10 µs
CC
CC
= 0V
= V
CC
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-85
Page 4
IR2118
Functional Block Diagram
V
CC
IN
UV
DETECT
COM
Lead Definitions
Lead
Symbol Description
V
CC
IN
COM Low side return
V
B
HO High side gate drive output
V
S
Logic and gate drive supply
Logic input for gate driver output (HO), out of phase with HO
High side floating supply
High side floating supply return
PULSE
GEN
HV
LEVEL
SHIFT
UV
DETECT
PULSE
FILTER
V
B
R
Q
R
S
V
HO
S
Lead Assignments
8 Lead DIP SO-8
IR2118 IR2118S
Part Number
B-86 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Page 5
Device Information
Process & Design Rule HVDCMOS 4.0 µm
Transistor Count 114
Die Size 70 X 77 X 26 (mil)
Die Outline
Thickness of Gate Oxide 80 0Å
Connections Material Poly Silicon
First Width 4 µm
Layer Spacing 6 µm
Thickness 5000Å
Material Al - Si (Si: 1.0% ±0.1%)
Second Width 6 µm
Layer Spacing 9 µm
Thickness 20,000Å
Contact Hole Dimension 8 µm X 8 µm
Insulation Layer Material PSG (SiO2)
Thickness 1.5 µm
Passivation Material PSG (SiO2)
Thickness 1.5 µm
Method of Saw Full Cut
Method of Die Bond Ablebond 84 - 1
Wire Bond Method Thermo Sonic
Material Au (1.0 mil / 1.3 mil)
Leadframe Material Cu
Die Area Ag
Lead Plating Pb : Sn (37 : 63)
Pa ckage Types 8 Lead PDIP / SO-8
Materials EME6300 / MP150 / MP190
Remarks:
IR2118
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-87
Page 6
IR2118
IN
2
HO
Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage T ransient Test Circuit
IN
50%50%
IN
HO
t
t
r
on
90% 90%
10% 10%
t
off
t
f
Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition
B-88 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Page 7
IR2118
J
)
J
)
)
)
150
125
100
75
50
unction Temperature (°C
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
Figure 5. IR2118 T
R
150
125
100
75
50
Junction Temperature (°C
25
Frequency (Hz)
vs. Frequency (IRFBC20)
J
ΩΩ
= 33
Ω, VCC = 15V
GATE
ΩΩ
320V 140V 10V
320V
140V
10V
150
125
100
75
50
unction Temperature (°C
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
Figure 6. IR2118 T
R
150
125
100
75
50
Junction Temperature (°C
25
Frequency (Hz)
vs. Frequency (IRFBC30)
J
ΩΩ
= 22
Ω, VCC = 15V
GATE
ΩΩ
320V
140V
320V 14 0V
10V
10V
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 7. IR2118 TJ vs. Frequency (IRFBC40)
R
GATE
ΩΩ
= 15
Ω, VCC = 15V
ΩΩ
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 8. IR2118 TJ vs. Frequency (IRFPE50)
R
GATE
ΩΩ
= 10
Ω, VCC = 15V
ΩΩ
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-89
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