Datasheet IN74AC00N, IN74AC00D Datasheet (INTEGRAL)

Page 1
TECHNICAL DATA
3
Quad 2-Input NAND Gate
High-Speed Silicon-Gate CMOS
The IN74AC00 is identical in pinout to the LS/ALS00, HC/HCT00. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA; 0.1 µA @ 25°C
High Noise Immunity Characteristic of CMOS Devices
Outputs Source/Sink 24 mA
IN74AC00
ORDERING INFORMATION
IN74AC00N Plastic
IN74AC00D SOIC
TA = -40° to 85° C for all
packages
LOGIC DIAGRAM
PIN 14 =V
CC
PIN 7 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output ABY LLH LHH HLH HHL
Page 2
IN74AC00
4
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
V
IN
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
V
OUT
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
I
IN
DC Input Current, per Pin
±
20
mA
I
OUT
DC Output Sink/Source Current, per Pin
±
50
mA
I
CC
DC Supply Current, VCC and GND Pins
±
50
mA
P
D
Power Dissipation in Still Air, Plastic DIP+ SOIC Package+
750 500
mW
Tstg Storage Temperature -65 to +150
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
260
°
C
*
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
VIN, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
J
Junction Temperature (PDIP) 140
°
C
T
A
Operating Temperature, All Package Types -40 +85
°
C
I
OH
Output Current - High -24 mA
I
OL
Output Current - Low 24 mA
tr, t
f
Input Rise and Fall Time
*
(except Schmitt Inputs)
V
CC
=3.0 V
V
CC
=4.5 V
V
CC
=5.5 V
0 0 0
150
40 25
ns/V
*
VIN from 30% to 70% V
CC
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
Page 3
IN74AC00
5
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limits
Symbol Parameter Test Conditions V
25 °C-40
°
C to
85°C
Unit
V
IH
Minimum High-Level Input Voltage
V
OUT
=0.1 V or VCC-0.1 V 3 .0
4.5
5.5
2.1
3.15
3.85
2.1
3.15
3.85
V
V
IL
Maximum Low ­Level Input Voltage
V
OUT
= VCC-0.1 V 3.0
4.5
5.5
0.9
1.35
1.65
0.9
1.35
1.65
V
V
OH
Minimum High-Level Output Voltage
I
OUT
≤ -50 µA
3.0
4.5
5.5
2.9
4.4
5.4
2.9
4.4
5.4
V
*
VIN=VIH or V
IL
IOH=-12 mA I
OH
=-24 mA
I
OH
=-24 mA
3.0
4.5
5.5
2.56
3.86
4.86
2.46
3.76
4.76
V
OL
Maximum Low-Level Output Voltage
I
OUT
≤ 50 µA
3.0
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
*
VIN=V
IH
IOL=12 mA I
OL
=24 mA
I
OL
=24 mA
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
I
IN
Maximum Input Leakage Current
VIN=VCC or GND 5.5
±
0.1
±
1.0
µ
A
I
OLD
+Minimum Dynamic Output Current
V
OLD
=1.65 V Max 5.5 75 mA
I
OHD
+Minimum Dynamic Output Current
V
OHD
=3.85 V Min 5.5 -75 mA
I
CC
Maximum Quiescent Supply Current (per Package)
VIN=VCC or GND 5.5 4.0 40
µ
A
*
All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Note: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
Page 4
IN74AC00
6
AC ELECTRICAL CHARACTERISTICS
(CL=50pF,Input tr=tf=3.0 ns)
V
CC
*
Guaranteed Limits
Symbol Parameter V
25 °C-40
°
C to
85°C
Unit
Min Max Min Max
t
PLH
Propagation Delay, Input A or B to Output Y (Figure 1)
3.3
5.0
2.0
1.5
9.5
8.0
2.0
1.5
10.0
8.5
ns
t
PHL
Propagation Delay, Input A or B to Output Y (Figure 1)
3.3
5.0
1.5
1.5
8.0
6.5
1.0
1.0
8.5
7.0
ns
C
IN
Maximum Input Capacitance 5.0 4.5 4.5 pF
Typical @25°C,VCC=5.0 V
C
PD
Power Dissipation Capacitance 30 pF
*
Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V
Figure 1. Switching Waveforms
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