Page 1
Liquid Crystal Display Controller
TECHNICAL DATA
IN472-3
The IN472-3-3 Liquid Crystal Display (LDC) Controller is a
perpheral member of the COPS
TM
family, fabricated using CMOS
technology. The IN472-3 drives a multiplexed liquid crystal directly.
Data is loaded serially and is held in internal latches. The In472-3
contains an on-chip oscillator and generates all the multi-level
waveforms for back-planes and segment outputs on a triplex display.
One IN472-3 can drive 36 segments multiplexed as 3 x 12 (4
display). Two IN472-3 devices can be used together to drive
72 segments (3 x 24) which could be an 8
•
Direct interface to TRIPLEX LCD
•
Low power dissipation (100 µW typ.)
•
Low cost
•
Compatible with all COP400 processors
•
Needs no refresh from processor
•
On-chip oscillator and latches
•
Expandable to longer displays
•
Software compatible with COP470 V.F.Display Driver Chip
•
Operates from display voltage
•
MICROWIRE
•
20-pin Dual-In-Line package
TM
compatible serial I/O
1
/2 digit display.
1
/2 digit
ORDERING INFORMATION
IN472-3N Plastic
IN472-3DW SOIC
TA = 0° to 70° C
for all packages
PIN ASSIGNMENT
Pin Description
Pin Description
CS Chip select
V
DD
GND Ground
DI Serial data input
SK Serial clock input
BP
A
BP
B
BP
C
SA1∼SA4
Power supply (display voltage)
Display backplane A (or oscillator in)
Display backplane B
Display backplane C (or oscillator out)
12 multiplexed outputs
1
Page 2
IN472-3
DC ELECTRICAL CHARACTERISTICS
(GND=0 V, VDD=3.0 V to 5.5 V, TA= 0°C to 70°C
(depends on display characteristics)
Symbol Parameter Test
V
DD
I
DD
V
IL
V
IH
V
IL
V
IH
V
OL
V
OH
V
BPA,BPB,BPC
Power Supply Voltage 3.0 5.5 V
Power Supply Current (Note 1) VDD =5.5 V 250
Input Levels DI, SK, CS 0.8 V
BPA (as Osc. in) 0.6 V
Output Levels, BPC (as Osc. Out) 0.4 V
Backplane Outputs (BPA,BPB,BPC)
ON
V
BPA,BPB,BPC
OFF
V
BPA,BPB,BPC
Backplane Outputs (BPA,BPB,BPC)
ON
V
BPA,BPB,BPC
OFF
V
ON
SEG
V
OFF BP + Time
SEG
V
ON
SEG
V
OFF BP - Time
SEG
Segment Outputs (SA
Segment Outputs (SA
∼ SA4)
1
∼ SA4)
1
Internal Oscillator Frequency 15 80 kHz
Frame Time (Int. Osc. ÷ 192)
1/T
SCAN
Scan Frequency 39 208 Hz
SK Clock Frequency 4 250 kHz
SK Width 1.7
t
SETUP
t
HOLD
t
SETUP
t
HOLD
DI Data Stup 1.0
DI Data Hold 100 ns
CS 1.0
Output Loadi ng Capacitance 100 pF
Min Max Unit
Conditions
0.7 V
VDD-0.6 V
VDD-0.4 V
During
BP + Time
V
1/3V
DD
During 0
BP - Time
2/3V
During 0
2/3V
During
VDD -∆V
1/3V
2.4 12.8 ms
1.0
Guaranteed Limit
DD
-∆V
-∆V1/3VDD +∆V
DD
V
V
∆
-∆V2/3VDD +∆V
DD
∆
-∆V2/3VDD +∆V
DD
V
-∆V1/3VDD +∆V
DD
DD
DD
DD
DD
V
V
DD
µ
A
V
V
V
V
µ
s
µ
s
µ
s
Note 1: Power supply current as measured in stand-alone mode with all outputs open and all inputs at VDD.
Note 2: ∆V - 0.05V
DD
.
2
Page 3
Figure 1. Serial Load Timing Diagram
IN472-3
Figure 2. Backplane and Segment Waveforms
3
Loading...