Datasheet ikcs08f60f2a-c Datasheet

For Power Management

Data Sheet, Jun. 2010

Control Integrated POwer System (CIPOS™)

IKCS08F60F2A IKCS08F60F2C

http://www.lspst.com

Application

CIPOS™ IKCS08F60F2A

Revision History

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IKCS08F60F2C

: 2010-06 Rev.1.0

Infineon Technologies Data Sheet Ver. 2.1

Subjects (major changes since last revision)

No editorial change Change in document format

Authors: Junho Song*, Junbae Lee* and Daewoong Chung*, W. Frank**, W. Brunnbauer** LS Power Semitech*, Infineon Technologies** Editi on 2010-01

Published by LS Power Semitech Co., Ltd. Seoul, Korea

Attention please! The information g iven in th is data s heet sh all in no event be regard ed as a guara ntee of cond itions or

characteristics. W ith respect to any examples or hints given herein, any typical values s tated herein and/or an y information regarding the appl ication of the device, LS Power Semitech Co., Ltd. hereby disclaims any and all warr anties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.

Information For further inform ation on technology, deliver y terms and conditions and pric es please contact your

nearest LS Power Semitech Co., Ltd. office or representatives ( Warnings Due to technical requirements components may contain dangerous substances. For information on the

types in question please contact your nearest LS Power Semitech Co., Ltd. office or representatives. LS Power Semitech Co., Ltd. components may only be used in l ife-support devices or systems with

the express written approval LS Power Semitech Co., Ltd., if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to su pport and/or maintain and s us tain and/ or pr otec t h uman life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

TRENCHSTOP® is a registered trademark of Infineon Technologies AG.

http://www.lspst.com).

Data Sheet 2/18 Jun. 2010

CIPOS™ IKCS08F60F2A

IKCS08F60F2C

Table of contents:

CIPOS™ Control integrated Power System .................................................................................................. 4

Features ........................................................................................................................................................ 4

Target Applications ..................................................................................................................................... 4

Description ................................................................................................................................................... 4

System Configuration ................................................................................................................................. 4

Certification .................................................................................................................................................. 4

Internal Electrical Schemat ic ........................................................................................................................... 5

Pin Assignment ................................................................................................................................................. 6

Pin Description ............................................................................................................................................ 6

HIN1,2,3 and /LIN1,2,3 (Low side and high side control pins, Pin 15 - 20) ................................................ 6

FLT-TEMP (temperature NTC, Pin 24) ....................................................................................................... 7

ITRIP (Over-current detection function, Pin 21) .......................................................................................... 7

VDD, VSS (control side supply and reference, Pin 22, 23) ......................................................................... 7

VB1,2,3 and VS1,2,3 (High side supplies, Pin 1, 2, 4, 5, 7, 8) .................................................................... 7

VRU, VRV, VRW (low side emitter, Pin 12, 13, 14) .................................................................................... 7

V+ (positive bus input voltage, Pin 10) ........................................................................................................ 7

Absolute Maximum Ratings ............................................................................................................................ 8

Module Section ............................................................................................................................................ 8

IGBT and Diode Section .............................................................................................................................. 8

Control Section ............................................................................................................................................ 9

Recommended Operation Conditions ............................................................................................................ 9

Static Characteristics ..................................................................................................................................... 10

Dynamic Characteristics ................................................................................................................................ 11

Integrated Components ................................................................................................................................. 12

Typical Application ......................................................................................................................................... 12

Characteristics ................................................................................................................................................

Package Outline IKCS08F60F2A ................................................................................................................... 17

Package Outline IKCS08F60F2C ................................................................................................................... 18

Package data ................................................................................................................................................... 18

13

Data Sheet 3/18 Jun. 2010

CIPOS™ IKCS08F60F2A IKCS08F60F2C

CIPOS™ Control integrated Power System

Single In-Line Intelligent Power Module 3Φ-bridge 600V / 8A @ 25°C

Features

• DCB isolated Single In-Line molded module

• FAULT signal

• TrenchStop

• Optimal adapted antiparallel diode for low EMI

• Integrated bootstrap diode and capacitor

• Rugged SOI gate driver technology with

stability against transient and negative voltage

• Fully compliant to 3.3V and 5V microcontrollers

• Temperature sense

• Under voltage lockout at all channels

• Matched propagation delay for all channels

• Low side emitter pins ac cessible for all phase

current monitoring (open emitter)

• Cross-conduction prevention

• Lead-free terminal plating; RoHS compliant

• Qualified according to JEDEC

temperature stress tests for 1000h) for target applications

®

IGBTs with lowest V

CE(sat)

1

(high

Target Applications

• Washing machines

• Consumer Fans and Consumer Compressors

Description

The CIPOS™ module family off ers the chanc e for integrating various power and contr ol com ponents to increase reliability, optimize PCB size and system costs.

This SIL-IPM is designed to c ontrol AC motors in variable speed drives for applications like air conditioning, compressors and washing machines. The package concept is specially adapted to power applications, which need extremely good thermal conduction and electrical isolation, but also EMI-save control and overload protection. The features of TrenchStop antiparallel diodes are combined with a new optimized Infineon SOI gate driver for excellent electrical performance. The product provides a FAULT signal, wh ic h is s ignificantl y simplifying t he system.

®

IGBTs and

System Configuration

• 3 half-bridges with TrenchStop® IGBT & FW- diodes

• 3Φ SOI gate driver

• Bootstrap diodes for high side supply

• Integrated 100nF bootstrap capacitance

• Temperature sensor, passive components for

adaptions

• Isolated heatsink

• Creepage distance typ 3.2mm

Certification

UL 1577 (UL file E314539)

1

J-STD-020 and JESD-022

Data Sheet 4/18 Jun. 2010

Internal Electrical Sc h emat ic

/HIN1 /HIN2 /HIN3

/LIN1 /LIN2 /LIN3

VCC

RCIN

EN

/FAULT

VSS

Com

RTS

VB1

VB2

VB3

HO1

HO2

HO3

LO1

LO2

LO3

VS1

VS2

VS3

VSS (23)

/LIN3 (20)

/LIN2 (19)

/LIN1 (18)

/HIN3 (17)

/HIN2 (16)

/HIN1 (15)

VDD (22)

VB1 (7)

VB2 (4)

VB3 (1)

VRW (14)

VRV (13)

VRU (12)

W, VS3 (2)

V, VS2 (5)

U, VS1 (8)

V+ (10)

/FLTTEMP (24)

Driver-IC

ITRIP (21)

ITRIP

Rbs

R1

C2

C1

CbsH1 CbsH2 CbsH3

RH1 RL1 RL2RH2 RL3RH3

Dbs1-

Dbs3

Tr1, U-HS D1

Tr2, U-LS D2

Tr3, V-HS D3

Tr4, V-LS D4

Tr5, W-HS D5

Tr6, W-LS D6

Cge1

Cge2

Cge3

Cge4

Cge5

Cge6

Cge = 390 pF

Dz

R2-R8

CIPOS™ IKCS08F60F2A

IKCS08F60F2C

Figure 1: Internal Schematic

Data Sheet 5/18 Jun. 2010

CIPOS™ IKCS08F60F2A

Pin Number

Pin Name

Pin Description

1

VB3

high side floating IC supply voltage

2

W,VS3

motor output W, high side floating IC supply offset voltage

3

n.a.

None

4

VB2

high side floating IC supply voltage

5

V,VS2

motor output V, high side floating IC supply offset voltage

6

n.a.

None

7

VB1

high side floating IC supply voltage

8

U,VS1

motor output U, high side floating IC supply offset voltage

9

n.a.

None

10

V+

positive bus input voltage

11

n.a.

None

12

VRU

low side emitter

13

VRV

low side emitter

14

VRW

low side emitter

15

/HIN1

input gate driver high side 1/U

16

/HIN2

input gate driver high side 2/V

17

/HIN3

input gate driver high side 3/W

18

/LIN1

input gate driver low side 1/U

19

/LIN2

input gate driver low side 2/V

20

/LIN3

input gate driver low side 3/W

21

ITRIP

input overcurrent shutdown

22

VDD

module control supply

23

VSS

module negative supply

24

/FLT-TEMP

Fault indication and temperature monitoring

Figure 2: Input pin structure

INPUT NOISE

FILTER

VIH; V

IL

LINx

HINx

V

DD

VZ=3.3V

IKCS08F60F2C

Pin Assignment

Pin Description

/HIN1,2,3 and /LIN1,2,3 (Low side and high side control pins, Pin 15 - 20)

These pins are active low and they are responsible for the control of the integrat ed IGBT

The Schmitt-trigger input threshold of them are

Data Sheet 6/18 Jun. 2010

such to guarantee LSTTL and CMOS compatibilit y down to 3.3V controller outputs. The maximum voltage at these pins is 5.5V and therefore fully compliant to 3.3V-microcontrollers. Pull-up resistor of about 75kΩ is internally provided to pre-bias inputs during supp ly start-up an d a zener clamp is provided for pin protection purposes. Input schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses.

It is recommended for proper work of CIPOS™ not to provide an input pulse-width and PWM deadtimes lower than 1us.

The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of

CIPOS™ IKCS08F60F2A

Figure 3: Internal circuit at pin TEMP

UVLO

Stand

by

v

DD

V

DDUV+

, V

BSUV+

Normal

Operation

V

DDUV-

, V

BSUV-

t

V

DDmax

, V

BSmax

/FLT-

TEMP

CIPOS™

VSS

>1

from uv-detection

V

CC

R

ON,FLT

from ITRIP-Latch

R

NTC

IKCS08F60F2C

the same leg (i.e. HO 1 and LO1, HO2 and LO2, HO3 and LO3).

A minimum deadtime insertion of typ 380ns is also provided, in order to reduce cross-conduction of the external power switches.

/FLT-TEMP (t emperat ure NTC, Pin 24) The TEMP terminal pr ovides direct access to the NTC, which is referenced to VSS. An external pull-up resistor connected to +5V ensures, that the resulting voltage can be directly connected to the microcontroller.

The same pin indicates a m odu le f ailur e i n cas e of under voltage at pin V DD or in case of triggered over current detection at I TRIP. A pull-up resistor is externally required to bias the NTC. No temperature information is available during fault.

VB1, 2,3 and VS1,2,3 (High s ide s uppl ies, Pin 1, 2, 4, 5, 7, 8)

VB to VS is the high side s uppl y voltage. T he high side circuit can float wit h respect to V SS following the external high side power device emitter/source voltage.

Due to the low power consumption, the floating driver stage is supplied b y an int egrated bootstrap circuit connected to VDD. This includes also integrated bootstra p capacitors of 100nF at each floating supply, which are located very close to the gate drive circuit.

The under-voltage det ectio n operates with a risi ng

V

supply threshold of typical falling threshold of

V

DDUV-

= 10.4V according to

= 12.1V and a

BSUV+

Figure 4. VS1,2,3 provide a high robustness against

negative voltage i n respect of VSS of -50V. This ensures very stable designs even under rough conditions.

ITRIP (Over-current detection function, Pin 21) CIPOS™ provides an over-current detection function by connecting the ITRIP input with the motor current feedback. The ITRIP comparator threshold (typ 0.46 V) is ref erenced to V SS gr oun d. A input noise filter (typ:

t

the driver to detect false over-current events. Over-current detection generates a hard shut

down of all outputs of the gate driver after the shutdown propagation delay of typically 900ns.

The fault-clear time is set to typically to 4.7ms. VDD, VSS (control side supply an d ref eren ce,

Pin 22, 23) VDD is the low side supply and it pro vides power both to input logic and to low side output power stage. Input logic is r eferenced to VS S ground as well as the under-voltage detection circuit.

The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltag e of present.

The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below

= 10.4 V. This prevents the external power

V

DDUV-

switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation.

Data Sheet 7/18 Jun. 2010

= 225ns ) prevents

ITRIPMIN

V

= 12.1V is at lea st

DDUV+

Figure 4: Operation modes

VRU, VRV, V RW (lo w s id e emi tt er, Pin 12, 13,

14)

The low side emitters are available for current measurements of each phase leg. It is recommended to k eep the connection to pin VSS as short as possible in or de r to av oi d un nec es sary inductive voltage drops.

V+ (positive bus input voltage, Pin 10) The high side IGBT are connected to the bus voltage. It is recommended, that the bus voltage does not exceed 500V.

CIPOS™ IKCS08F60F2A

Value

1

Wave soldering,

RMS, f=50Hz, t

tp = 100µs

Description

Condition

Symbol

Value

Unit

Max. Blocking Voltage

V

600

-

V

Tc = 25°C,T

<150°C

-8

8

Repetitive peak collector current

t

limited by T

Iu, Iv, Iw

-12

12

A

IGBT

T

-40

150

IKCS08F60F2C

Absolute Maximum Ratings

(

T

= 25°C, V

J

Module Section

= 15V Unless Otherwise Specified):

DD

Description Condition Symbol

Storage temperature range Operating temperature control PCB

Solder temperature

Insulation test voltage

Mounting torque

Mounting pressure on surface

Creepage distance Max. peak power of bootstrap

resistor

IGBT and Diode Section

1.6mm (0.063in.) from case for 10s

=1min M3 screw and washer Package flat on

mounting surface

Tc= 100°C

T

V

MS

N

P

BRpeak

stg

PCB

sol

ISOL

MC

dS

Unit

Min max

-40 125 °C

- 125 °C

- 260 °C

2500 - V

- 0.6 Nm

- 150 N/mm²

3.1 - mm

90 W

CES

DC output current

Short circuit withstand time

2

t

IGBT reverse bias safe operating area (RBSOA)

Tc = 80°C,T

p

VDD = 15V,VDC = 400V,

vJ = 150°C

T VDD = 15V,VDC ≤ 500V,

vJ = 150°C, I

T V

CEmax

Power dissipation per IGBT Tc = 25°C P

Operating junction temperature range

Diode

vJ vJ

= 600V

<150°C

vJmax

= 4A

C

Iu, Iv, Iw

- 5 µs

sc

Full Square

- 30 W

tot

vjI

T

vjD

1

Monitored by pin 24

2

Allowed number of short circuits: <1000; time between short circuits: >1s.

min max

-4

-40

4

150

A

°C

Data Sheet 8/18 Jun. 2010

CIPOS™ IKCS08F60F2A

Description

Condition

Symbol

Value

Unit

Single IGBT thermal resistance,

Single diode thermal resistance,

Description

Condition

Symbol

Value

Unit

min

max

Module supply voltage

VDD

-1

20

High side floating IC supply offset

VDD-VBS-6

ITRIP input voltage

V

-1

10

/FLT-TEMP Input voltage

V

-1

20

/HIN, /LIN Input voltage

V

= float

VIN - 5.5

Operating junction temperature

1

T

-

125

°C

Max. switching frequency

f

-

20

kHz

Description

min

max

IKCS08F60F2C

min max

junction-case

R

Control Section

High side floating supply voltage (VB vs. VS)

voltage

V

t

< 500ns

p

IN

/FLT-TEMP Input current I

- 3.6

thJC

- 6.0

thJCD

-1 20

BS

V

S1,2,3

IN,ITRIP

IN,FLT

VDD-VBS-50

- 5 mA

600

K/W

V

J,IC

PWM

Recommended Operation Conditions

All voltages are absolute voltages referenced to VSS -Potential unless otherwise specified.

Symbol Value Unit

High side floating supply offset voltage VS -3 500 High side floating supply voltage (VB vs. VS) VBS 12.5 17.5 Low side power supply VDD 12.5 17.5 Logic input voltages LIN, HIN, ITRIP VIN 0 5

V

1

Monitored by pin 24

Data Sheet 9/18 Jun. 2010

CIPOS™ IKCS08F60F2A

Description

Condition

Symbol

Value

Unit

Collector-Emitter breakdown voltage

V

= 5V, IC = 0.25mA

V

600

V

= 15V, I

= +/- 4A

V

= 15V, t

≤ 5µs

Logic "0" input voltage (LIN,HIN)

VIH

1.7

2.1

2.4

V

Logic "1" input voltage (LIN,HIN)

VIL

0.7

0.9

1.1

V

ITRIP positive going threshold

V

360

460

540

mV

V

and V

supply under voltage

V

and V

supply under voltage

V

and V

supply under voltage

V

Input clamp voltage (ITRIP)

IIN = 4mA

V

9.0

10.6

13.0

V

Quiescent VB

supply current (VBx

V

= low

Quiescent VDD supply current

V

= float

Input bias current

V

= 5V

I

-

55

100

µA

ITRIP Input bias current

V

= 5V

I

-

75

120

µA

Leakage current of high side

I

2

-

30 - µA

FAULT low on resistance

R

-

56

-

IKCS08F60F2C

Static Characteristics

(Tc = 25°C, VDD = 15V, if not stated otherwise)

min typ max

IN

Collector-Emitter saturation voltage

Diode forward voltage

Zero gate voltage collector current of IGBT

Short circuit collector current

1

I

DD

T

= 25°C

vJ

= 150°C

T

vJ

V

= 5V,

IN

= 25°C

T

vJ

= 150°C

T

vJ

= 600V, VIN = 5V

V

CE

= 25°C

T

vJ

= 150°C

T

vJ DD

V

=400V, T

CC

out

I

= +/- 4A

out

SC

vJ

=150°C

ITRIP input hysteresis V

DD

positive going threshold

DD

BS

V

BS

negative going threshold

(BR)CES

V

CE(sat)

V

F

I

CES

2

C(SC)

IT,TH+

45 75 - mV

IT,HYS

DDUV+

2

BSUV+

DDUV-

2

V

BSUV-

-

1.6

-

1.8

-

1.75

1.7

-

- 21 - A

11.0 12.1 12.8 V

9.5 10.4 11.0 V

2.1

2.05

40

1000

V

µA

CC

lockout hysteresis Input clamp voltage (/HIN, /LIN) IIN = 4mA V

only)

(VDD only)

Input bias current

BS

DDUVH

V

BSUVH

INCLAMP

INCLAMP2

x

V

T V

HIN

IN

ITRIP

j,IC

FLT

= 0V

= 125°C

= 0.5V, V

ITRIP

= 1V

IQB - 300 550 µA

I

QDD

IN+

I

IN-

ITRIP+

LVS

on,FLT

1

Allowed number of short circuits: <1000; time between short circuits: >1s.

2

Test is not subject of product test, verified by characterisation

1.2 1.7 - V

2

9.0 10.4 13.0 V

- 2.4 3.4 mA

- 220 400 µA

Ω

Data Sheet 10/18 Jun. 2010

Dynamic Characteristics

Description

Condition

Symbol

Value

Unit

Turn-on propagation delay

V

= 0V; I

= 4A,

Turn-on rise time

V

= 5V I

= 4A,

Turn-off propagation delay

V

= 5V; I

= 4A,

Turn-off fall time

V

= 0V I

= 4A,

Shutdown propagation dela y ITR IP

V

= 1V, Iu, Iv, Iw = 6A

t

-

900

-

Input filter time ITRIP

V

= 1V

t

155

210

380

Propagation delay ITRIP to FAULT

V

= 1V

t

369

Input filter time at LIN for turn on Input filter time at HIN for turn off

V

= 5V

t

-

220

-

Input filter time at HIN for turn off

V

= 5 V

t

-

400

-

V

= 0 V & 5V

Min. deadtime between low side Deadtime of gate drive circuit

DTIC

-

380 - ns

I

= 4A, V

= 300V

I

= 4A, V

= 300V

I

= 4A, V

= 300V

(Tc = 25°C, VDD = 15V, if not stated otherwise)

CIPOS™ IKCS08F60F2A

IKCS08F60F2C

min typ max

High side or low side

and off and input filter time at HIN for turn on only

Fault clear time after ITRIP-fault

and high side

LIN,HIN

V

DC

LIN,HIN

V

DC

LIN,HIN

V

DC

LIN,HIN

V

DC

ITRIP

V

LIN,HIN

HIN

LIN,HIN

V

ITRIP

= 300V

= 0 V

out

= 0 V & 5V t

t

ITRIPmin

t

FLTCLR

DT

- 654 -

d(on)

tr - 21 -

- 808 -

d(off)

tf - 79 -

ITRIP

FLT

120 270 -

FILIN

FILIN1

FILIN2

- 4.7 - ms

- 1 - µs

PWM

ns

IGBT Turn-on Energy (includes reverse recovery of diode)

Diode recovery Energy

out

TvJ = 25°C

= 150°C

T

vJ

out

T

= 25°C

vJ

= 150°C

T

vJ

out

DC

TvJ = 25°C

= 150°C

T

vJ

DC

Eon

E

off

E

rec

-

94

136

80

101

23 57

-

µJ IGBT Turn-off Energy

-

Data Sheet 11/18 Jun. 2010

CIPOS™ IKCS08F60F2A

Description

Condition

Symbol

1

Value

Unit

B-Constant of NTC (Negative Bootstrap diode forward voltage

V

-

1.9

2.05

V

/HIN1 /HIN2 /HIN3

/LIN1 /LIN2 /LIN3

VCC

RCIN

EN

VSS

Com

RTS

VB1

VB2

VB3

HO1

HO2

HO3

LO1

LO2

LO3

VS1

VS2

VS3

V+

Driver-IC

ITRIP

Rbs

R

C2C1

CbsH1 CbsH2 CbsH3

PFC

Control

PFC Stage

3-ph AC

Motor

VB1

VB2

VB3

W, VS3

V, VS2

U, VS1

VRW

VRV

VRU

VSS

/LIN3

/LIN2

/LIN1

/HIN3

/HIN2

/HIN1

VDD

TEMP

ITRIP

DC/DC

Converter

Micro

Controller

RH1

RL1 RL2 RL3

RH2 RH3

Dbs

5V /

3.3V

/FAULT

Clamping

IKCS08F60F2C

Integrated Components

min typ max

Resistor Resistor

Temperature Coefficient)

Capacitor Capacitor Bootstrap Capacitor

Typical Application

= 25°C

T

NTC

T

= 25°C B25 - 4250 - K

NTC

I

= 100mA

FDbs

Rbs

RTS

FDbs

C1

Cgex

CbsHx

- 10 -

- 100 -

0.39

- 100 -

Ω

kΩ

nF

1

Symbols according to Figure 1

Data Sheet 12/18 Jun. 2010

Characteristics

I

,

0V 1V 2V 3V

0A

3A

6A

9A

125℃ 150℃

25℃

0V 1V 2V

0A

3A

6A

9A

125℃ 150℃

25℃

Figure 4. Typical IGBT output characteristic

Figure 5. Typical diode forward current as a

t,

0A 2A 4A 6A 8A 10A

10ns

100ns

1000ns

t

f

t

d(on)

t

r

t

d(off)

25℃ 50℃ 75 ℃ 100 ℃ 125 ℃

10ns

100ns

1000ns

t

f

t

d(on)

t

r

t

d(off)

Figure 6. Typical switching times as a

Dynamic test circuit in Figure A)

Figure 7. Typical switching times as a

CIPOS™ IKCS08F60F2A

IKCS08F60F2C

(Tc = 25°C, V

COLLECTOR CURRENT

C

V

= 15V, if not stated otherwise)

DD

, COLLECTOR EMITTER VOLTAGE

CE

, forward CURRENT

F

I

V

FORWARD VOLT AGE

F

function of forward voltage

SWITCHING TIMES

t,

I

, COLLECTOR CURRENT

C

function of collector current

(inductive load, T

= 300V

V

CE

=150°C,

J

T

, JUNCTION TEMPERATURE

vJ

function of junction temperature

(inductive load, V Dynamic test circuit in Figure A)

= 300V, IC = 4A

CE

Data Sheet 13/18 Jun. 2010

CIPOS™ IKCS08F60F2A

E

,

0A 2A 4A 6A 8A 10A

0.00mJ

0.10mJ

0.20mJ

0.30mJ

0.40mJ

0.50mJ

0.60mJ

0.70mJ

0.80mJ

E

on

E

rec

E

off

25℃ 50℃ 75℃ 100 ℃ 125 ℃

E

rec

E

on

E

off

Figure 8. Typical switching energ y losses

Figure 9. Typical switching energy losses as

R

TS

, NTC resistance

-25 ℃ 0℃ 25℃ 50℃ 75℃ 100 ℃

1kOhm

10kOhm

100kOhm

1000kOhm

min typ max

10-7s 10-6s 10-5s 10-4s 10-3s 10-2s 10-1s

10

-2

K/W

10

-1

K/W

10

0

K/W

Single Pulse

IGBT Diode

Figure 10. Characteristic of NTC as a

Figure 11. Transient thermal impedance as a

IKCS08F60F2C

SWITCHING ENERGY

I

, COLLECTOR CURRENT

C

, SWITCHING ENERGY

E

as a function of collector current

(inductive load, T

= 300V

V

CE

= 150°C,

vJ

Dynamic test circuit in Figure A)

T

, JUNCTION TEMPERATURE

vJ

a function of junction temperature

(inductive load, V

= 300V, IC = 4A

CE

Dynamic test circuit in Figure A)

T

, NTC TEMPERATURE

NTC

function of NTC temperature

Data Sheet 14/18 Jun. 2010

, TRANSIENT THERMAL RESISTANCE

thJC

Z

t

, PULSE WIDTH

P

function of pulse width

/T)

(D=t

P

Test Circuits and Parameter Definition

Figure A: Dynamic test circuit

Figure B: Defi nition of diodes switching chara cteristics

Figure C: Definition of Enable propagation delay

Figure D: Switching times definition and switching energy definition

25%

I

RRM

t

Erec

∫

⋅=

Erec

t

FD

dtivErec

0

V

R

I

F

90%

I

IGBT

t

EN

90%

1V

V

EN

V

LIN1

,2,3

HIN1,2,3

0.9V

2.1V

iCU, i

CV

, i

CW

90%

10%

v

CEU

, v

CEV

, v

CEW

2%

90%

t

d(off)

t

f

t

d(on)

t

r

t

Eon

10%

t

Eoff

2%

∫

⋅=

Eoff

t

CxCEx

dtivEoff

0

∫

⋅=

Eon

t

CxCEx

dtivEon

0

10%

CIPOS™ IKCS08F60F2A

IKCS08F60F2C

Leakage inductance Stray capacitance

L

=180nH

σ

C

=39pF

σ

Data Sheet 15/18 Jun. 2010

CIPOS™ IKCS08F60F2A

HIN

HO

high

t

FILIN1

t

FILIN2

t

off,HINx

< t

FILIN1

t

off,HINx

t

off,HINx

t

FILIN1

< t

off,HINx

< t

FILIN2

t

off,HINx

> t

FILIN2

t

off,HINx

LIN

HIN LIN

HO LO

high

low

on

t

FILIN

t

FILIN

off on off

LO

IKCS08F60F2C

Figure E: Short Pulse suppression

Data Sheet 16/18 Jun. 2010

Package Outline IKCS08F60F2A

CIPOS™ IKCS08F60F2A

IKCS08F60F2C

Note: There may occur discolorations on the copper surface without any effect of the thermal properties.

Data Sheet 17/18 Jun. 2010

CIPOS™ IKCS08F60F2A

Description

Condition

Symbol

Value

Unit

Weight

-

17 - g

IKCS08F60F2C

Package Outline IKCS08F60F2C

Package data

min typ max

mP

Note: There may occur discolorations on the copper surface without any effect of the thermal properties.

Data Sheet 18/18 Jun. 2010