Page 1
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
GENERAL DESCRIPTION
,&6
HiPerClockS™
selectable clock inputs. The CLK, nCLK pair can accept most
standard differential input levels. The device can operate
using a 3.3V LVPECL (V
3.3V ECL (V
ferential architecture and low propagation delay make it
ideal for use in clock distribution circuits. The select pins have
internal pulldown resistors. Leaving one input unconnected
(pulled to logic low by the internal resistor) will transform
the device into a 2:1 multiplexer. The SEL1 pin is the most
significant bit and the binary number applied to the select pins
will select the same numbered data input (i.e., 00
selects CLK0, nCLK0).
The ICS85357-01 is a 4:1 or 2:1 Differential-to-
3.3V LVPECL / ECL clock multiplexer which can
operate up to 750MHz and is a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS85357-01 has 4
= 0V, VCC = 3.135V to 3.465V) or
= 0V , VEE = -3.135V to -3.465V). The fully dif-
CC
EE
FEATURES
• High speed differential multiplexer. The device can be
configured as either a 4:1 or 2:1 multiplexer
• 1 differential 3.3V LVPECL output
• 4 selectable CLK, nCLK inputs
• CLK, nCLK pair can accept the following differential input
levels: L VDS, L VPECL, L VHSTL, SSTL, HCSL
• Maximum output frequency up to 750MHz
• Translates any single ended input signal to 3.3V L VPECL
levels with resistor bias on nCLKx input
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 1.5ns (maximum)
• LVPECL mode operating voltage supply range:
= 3.135V to 3.465V , VEE = 0V
V
CC
• ECL mode operating voltage supply range:
= 0V , VEE = -3.135V to -3.465V
V
CC
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM PIN ASSIGNMENT
V
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
00
01
10
11
Q0
nQ0
VCC
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
V
EE
ICS85357-01
SEL0
SEL1
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
1
4.40mm x 6.50mm x 0.90mm body package
20-Lead TSSOP
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
G Package
Top View
CC
SEL1
SEL0
V
CC
Q0
nQ0
V
CC
nc
nc
V
EE
Page 2
Integrated
Circuit
Systems, Inc.
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
TABLE 1. PIN DESCRIPTIONS
rebmuNemaNepyTnoitpircseD
,41,1
02,71
20KLCtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
30KLCntupnIpulluP.tupnikcolclaitnereffidgnitrevnI
41KLCtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
51KLCntupnIpulluP.tupnikcolclaitnereffidgnitrevnI
62KLCtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
72KLCntupnIpulluP.tupnikcolclaitnereffidgnitrevnI
83KLCtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
93KLCntupnIpulluP.tupnikcolclaitnereffidgnitrevnI
11,01V
31,21cndesunU.tcennocoN
61,510Q,0QntuptuO.slevelecafretniLCEPVL.sriaptuptuolaitnereffiD
810LEStupnInwodlluP.slevelecafretniLTTVL/SOMCVL.tupnitceleskcolC
911LEStupnInwodlluP.slevelecafretniLTTVL/SOMCVL.tupnitceleskcolC
:ETON
V
CC
EE
pulluP
dna
nwodlluP
rewoP.V3.3ottcennoC.snipylppusevitisoP
rewoP.dnuorgottcennoC.snipylppusevitageN
ICS85357-01
4:1 OR 2:1
.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotsrefer
TABLE 2. PIN CHARACTERISTICS
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
R
PULLUP
R
NWODLLUP
ecnaticapaCtupnI
rotsiseRpulluPtupnI 15KΩ
rotsiseRnwodlluPtupnI 15KΩ
TABLE 3. CONTROL INPUT FUNCTION TABLE
stupnItuOkcolC
1LES0LESKLC
00 0KLCn,0KLC
01 1KLCn,1KLC
10 2KLCn,2KLC
11 3KLCn,3KLC
,KLCn,KLC
,1KLCn,1KLC
,2KLCn,2KLC
3KLCn,3KLC
1LES,0LES 4Fp
4Fp
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
2
Page 3
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
Inputs, V
I
Outputs, V
Package Thermal Impedance, θ
Storage T emperature, T
CC
O
JA
STG
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only . Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics
or
AC Characteristics
ods may affect product reliability.
4.6V
-0.5V to VCC + 0.5V
-0.5V to VCC + 0.5V
73.2°C/W (0lfpm)
-65°C to 150°C
is not implied. Exposure to absolute maximum rating conditions for extended peri-
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V
= 3.3V±5%, TA=0°C TO 70°C
CC
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
CC
I
EE
egatloVylppuSevitisoP531.33.3564.3V
tnerruCylppuSrewoP 53Am
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, V
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
V
LI
I
HI
I
LI
TABLE 4C. DIFFERENTIAL DC CHARACTERISTICS, V
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
I
HI
I
LI
V
PP
V
RMC
2,1ETON
egatloVhgiHtupnI1LES,0LES2567.3V
egatloVwoLtupnI1LES,0LES3.0-8.0V
tnerruChgiHtupnI1LES,0LESV
tnerruCwoLtupnI1LES,0LESVCCV,V564.3=
= 3.3V±5%, TA=0°C TO 70°C
CC
,1KLC,0KLC
tnerruChgiHtupnI
3KLC,2KLC
,1KLCn,0KLCn
3KLCn,2KLCn
,1KLC,0KLC
tnerruCwoLtupnI
3KLC,2KLC
,1KLCn,0KLCn
3KLCn,2KLCn
egatloVkaeP-ot-kaeP51.03.1V
;egatloVtupnIedoMnommoC
VsadenifedsiegatlovtupniedomnommoC:1ETON
= 3.3V±5%, TA=0°C TO 70°C
CC
V=
CC
NI
V=
V
CC
NI
V=
V
CC
NI
V
CC
V
CC
.
HI
V564.3=051Aµ
V0=5-Aµ
NI
V564.3=051Aµ
V564.3=5Aµ
V,V564.3=
V0=5-Aµ
NI
V,V564.3=
V0=051-Aµ
NI
V
5.0+V
EE
VsixKLCn,xKLCrofegatlovtupnimumixameht,snoitacilppadedneelgnisroF:2ETON
.V3.0+
CC
58.0-V
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
3
Page 4
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
TABLE 4D. LVPECL DC CHARACTERISTICS, V
= 3.3V±5%, TA=0°C TO 70°C
CC
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HO
V
LO
V
GNIWS
TABLE 5. AC CHARACTERISTICS, V
1ETON;egatloVhgiHtuptuOV
1ETON;egatloVwoLtuptuOV
gniwSegatloVtuptuOkaeP-ot-kaeP6.058.0V
05htiwdetanimretstuptuO:1ETON Ω Vot
= 3.3V±5%, TA=0°C TO 70°C
CC
.V2-
CC
4.1-V
CC
0.2-V
CC
0.1-V
CC
7.1-V
CC
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
t
DP
t
)pp(ks3,2ETON;wekStraP-ot-traP 051sp
t
R
t
F
emiTesiRtuptuOzHM05@%08ot%02003004007sp
emiTllaFtuptuOzHM05@%08ot%02003004007sp
ycneuqerFtuptuOmumixaM 057zHM
1ETON;yaleDnoitagaporP IJ zHM05712.15.1sn
cdoelcyCytuDtuptuO7435%
.esiwrehtodetonsselnuzHM005taderusaemsretemarapllA
.tniopgnissorctuptuolaitnereffidehtottniopgnissorctupnilaitnereffidehtmorfderusaeM:1ETON
dnasegatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:2ETON
derusaemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqehtiw
.stniopssorclaitnereffidehtta
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:3ETON
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
4
Page 5
Integrated
Circuit
Systems, Inc.
PARAMETER MEASUREMENT INFORMATION
V
CC
LVPECL
VCC = 2.0V
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
SCOPE
Qx
Q0
nQ0
nQx
VEE = -1.3V ± 0.135V
FIGURE 1 - OUTPUT LOAD TEST CIRCUIT
V
CC
CLKx
VPP
nCLKx
V
EE
FIGURE 2 - DIFFERENTIAL INPUT LEVEL
Cross Points
V
CMR
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
5
Page 6
Integrated
Circuit
Systems, Inc.
P ART 1
nQ0
P ART 2
nQ0
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
Q0
Q0
tsk(pp)
FIGURE 3- PART-TO-PART SKEW
Clock Inputs
and Outputs
CLKx
nCLKx
Q0
nQ0
80%
20%
t
R
t
F
FIGURE 4 - INPUT AND OUTPUT RISE AND FALL TIME
t
PD
FIGURE 5 - PROPAGATION DELAY
80%
20%
V
SWING
CLKx, Q0
nCLKx, nQ0
Pulse Width
t
PERIOD
t
odc =
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
PW
t
PERIOD
FIGURE 6 - odc & t
6
PERIOD
Page 7
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
APPLICA TION INFORMATION
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
Figure 7
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ VCC/2 is
= 3.3V , V_REF should be 1.25V and R2/R1 = 0.609.
CC
CLK_IN
C1
0.1uF
FIGURE 7 - SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
R1
1K
V_REF
R2
1K
VCC
+
-
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
7
Page 8
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85357-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85357-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
= 3.3V + 5% = 3.465V , which gives worst case results.
CC
• Power (core)
• Power (outputs)
If all outputs are loaded, the total power is 1 * 30.2mW = 30.2mW
T otal Power
MAX
= V
MAX
_MAX
* I
CC_MAX
= 30.2mW/Loaded Output pair
= 3.465V * 35mA = 121.3mW
EE_MAX
(3.465V , with all outputs switching) = 173.25mW + 120.8mW = 151.5mW
2. Junction T emperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
The equation for Tj is as follows: Tj = θ
Tj = Junction T emperature
θ
= junction-to-ambient thermal resistance
JA
Pd_total = T otal device power dissipation (example calculation is in section 1 above)
T
= Ambient T emperature
A
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per T able 6 below .
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.151W * 66.6°C/W = 80.06°C. This is well below the limit of 125°C
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
* Pd_total + T
JA
A
TM
devices is 125°C.
must be used . Assuming a
JA
T able 6. Thermal Resistance qJA for 20-pin TSSOP, Forced Convection
q
by V elocity (Linear Feet per Minute)
JA
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
8
Page 9
Integrated
Circuit
Systems, Inc.
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
ICS85357-01
4:1 OR 2:1
L VPECL output driver circuit and termination are shown in
VCC
Q1
Figure 8 - LVPECL Driver Circuit and Termination
Figure 8.
RL
50
V
V
OUT
- 2V
CC
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low .
Pd_H = [(V
Pd_L = [(V
• For logic high, V
• For logic low, V
Pd_H = [(2.465V - (3.465V - 2V))/50Ω] * (3.465V - 2.465V) = 20mW
Pd_L = [(1.765V - (3.465V - 2V))/50Ω] * (3.465V - 1.765V) = 10.2mW
T otal Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
- 2V .
CC
OH_MAX
OL_MAX
Using V
Using V
– (V
– (V
CC_MAX
CC_MAX
- 2V))/RL] * (V
CC_MAX
- 2V))/RL] * (V
CC_MAX
= V
OUT
OH_MAX
= 3.465, this results in V
= V
OUT
OL_MAX
= 3.465, this results in V
= V
= V
CC_MAX
CC_MAX
CC_MAX
CC_MAX
- V
OH_MAX
- V
OL_MAX
– 1.0V
OH_MAX
– 1.7V
OL_MAX
)
)
= 2.465V
= 1.765V
9
Page 10
Integrated
Circuit
Systems, Inc.
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
RELIABILITY INFORMATION
TABLE 7. θ
TRANSISTOR COUNT
The transistor count for ICS85357-01 is: 400
VS
. AIR FLOW TABLE
JA
q
JA
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
by V elocity (Linear Feet per Minute)
0 200 500
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
10
Page 11
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
TABLE 8. PACKAGE DIMENSIONS
LOBMYS
N02
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D04.606.6
ECISAB04.6
1E03.405.4
eCISAB56.0
L54.057.0
α
aaa--01.0
Reference Document: JEDEC Publication 95, MO-153
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
NIMXAM
°0 °8
11
sretemilliM
Page 12
Integrated
Circuit
Systems, Inc.
TABLE 9. ORDERING INFORMATION
rebmuNredrO/traPgnikraMegakcaPtnuoCerutarepmeT
10-GA75358SCI10-GA75358SCIPOSSTdael02ebutrep47C°07otC°0
T10-GA75358SCI10-GA75358SCIleeRdnaepaTnoPOSSTdael020052C°07otC°0
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MUL TIPLEXER
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
85357AG-01 www.icst.com/products/hiperclocks.html REV. A JULY 16, 2001
12
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