Datasheet ICS85311AM, ICS85311AMT Datasheet (ICST)

Integrated
Circuit
Systems, Inc.

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

GENERAL DESCRIPTION

,&6

HiPerClockS™

can accept most standard differential input levels.The
ICS85311 is characterized to operate from either a 2.5V
or a 3.3V power supply. Guaranteed output and part­to-part skew characteristics make the ICS85311 ideal
for those clock distribution applications demanding well
defined performance and repeatability.

The ICS85311 is a low skew, high perfor­mance 1-to-2 Differential-to-2.5V/3.3V ECL/
LVPECL Fanout Buffer and a member of the
HiPerClockS™ family of High Performance
Clock Solutions from ICS. The CLK, nCLK pair

FEATURES

• 2 differential 2.5V/3.3V LVPECL / ECL outputs

• 1 CLK, nCLK input pair

• CLK, nCLK pair can accept the following differential input

levels: LVDS, L VPECL, L VHSTL, SSTL, HCSL

• Maximum output frequency up to 1GHz

• Translates any single ended input signal to 3.3V L VPECL

levels with resistor bias on nCLK input

• Output skew: 15ps (maximum)

• Part-to-part skew: 100ps (maximum)

• Propagation delay: 1.4ns (maximum)

• LVPECL mode operating voltage supply range:

= 2.375V to 3.465V , VEE = 0V

V

CC

• ECL mode operating voltage supply range:
VCC = 0V , VEE = -2.375V to -3.465V

• 0°C to 70°C ambient operating temperature

• Industrial temperature information available upon request

BLOCK DIAGRAM PIN ASSIGNMENT

CLK

nCLK

Q0
nQ0

Q1
nQ1

3.90mm x 4.90mm x 1.37mm package body

Q0

nQ0

Q1

nQ1

1

8

2

7

3

6

4

5

ICS85311

8-Lead SOIC

M Package

T op View

Vcc
CLK
nCLK
VEE

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
Systems, Inc.

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

TABLE 1. PIN DESCRIPTIONS

rebmuNemaNepyTnoitpircseD

2,10Qn,0QtuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD

4,31Qn,1QtuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
5V
6KLCntupnIpulluP.tupnikcolclaitnereffidgnitrevnI
7KLCtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
8V

pulluP

:ETON

EE

CC

dna

nwodlluP

TABLE 2. PIN CHARACTERISTICS

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

C

NI

R

PULLUP

R

NWODLLUP

rewoP.dnuorgottcennoC.nipylppusevitageN

rewoP.V3.3rov5.2ottcennoC.nipylppusevitisoP

ecnaticapaCtupnIKLCn,KLC4Fp

rotsiseRpulluPtupnI 15KΩ

rotsiseRnwodlluPtupnI 15KΩ

ICS85311

Low Skew, 1-to-2

.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotsrefer

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
Systems, Inc.

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, V
Inputs, V

I

Outputs, V
Package Thermal Impedance, θ

Storage T emperature, T

CC

O

JA

STG

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in

DC Characteristics

the

or

AC Characteristics

periods may affect product reliability .

4.6V

-0.5V to VCC + 0.5V

-0.5V to VCC + 0.5V
112°C/W

-65°C to 150°C

is not implied. Exposure to absolute maximum rating conditions for extended

TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, V

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

V

CC

I

EE

egatloVylppuSevitisoP531.33.3564.3V

tnerruCylppuSrewoP 52Am

TABLE 3B. DIFFERENTIAL DC CHARACTERISTICS, V

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

KLCV

I

HI

I

LI

V

PP

V

RMC

2,1ETON

tnerruChgiHtupnI

tnerruCwoLtupnI

KLCnV

KLCV

KLCnV
egatloVtupnIkaeP-ot-kaeP51.03.1V

;egatloVtupnIedoMnommoC

VsadenifedsiegatlovedomnommoC:1ETON

HI

TABLE 3C. POWER SUPPLY DC CHARACTERISTICS, V

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

V

CC

I

EE

egatloVylppuSevitisoP573.25.2526.2V

tnerruCylppuSrewoP 52Am

= 3.3V±5%, TA = 0°C TO 70°C

CC

= 3.3V±5%, TA = 0°C TO 70°C

CC

V=

CC

NI

V=

CC

NI

CC

CC

V564.3=051Aµ
V564.3=5Aµ

V,V564.3=

V0=5-Aµ

NI

V,V564.3=

V0=051-Aµ

NI

.

= 2.5V±5%, TA = 0°C TO 70°C

CC

V

5.0+V

EE

VsiKLCn,KLCrofgatlovtupnimumixameht,snoitacilppadedneelgnisroF:2ETON

.V3.0+

58.0-V

CC

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
Systems, Inc.

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

TABLE 3D. DIFFERENTIAL DC CHARACTERISTICS, V

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

KLCV

I

HI

I

LI

V

PP

V

RMC

2,1ETON

TABLE 3E. LVPECL DC CHARACTERISTICS, V

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

V

HO

V

LO

V

GNIWS

tnerruChgiHtupnI

tnerruCwoLtupnI

KLCnV

KLCV

KLCnV

egatloVtupnIkaeP-ot-kaeP51.03.1V

;egatloVtupnIedoMnommoC

CC

1ETON;egatloVhgiHtuptuOV

1ETON;egatloVwoLtuptuOV

gniwSegatloVtuptuOkaeP-ot-kaeP 56.09.0V

05htiwdetanimretstuptuO:1ETON Ω Vot

CC

VsadenifedsiegatlovedomnommoC:1ETON

= 2.5V±5%, TA = 0°C TO 70°C

CC

V=

CC

NI

V=

CC

NI

CC

CC

.

HI

V526.2=051Aµ
V526.2=5Aµ

V,V526.2=

V0=5-Aµ

NI

V,V526.2=

V0=051-Aµ

NI

V

5.0+V

EE

VsiKLCn,KLCrofgatlovtupnimumixameht,snoitacilppadedneelgnisroF:2ETON

= 3.3V±5%, VCC = 2.5V±5%, TA = 0°C TO 70°C

4.1-V

CC

0.2-V

CC

.V2-

58.0-V

CC

.V3.0+

0.1-V

CC

7.1-V

CC

TABLE 4F. AC CHARACTERISTICS, V

= 3.3V±5%, VCC = 2.5V±5%, TA = 0°C TO 70°C

CC

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

f

XAM

t

DP

t

)o(ks4,2ETON;wekStuptuO 51sp

t

)pp(ks4,3ETON;wekStraP-ot-traP 001sp

t

R

t

F

emiTesiRtuptuOzHM05@%08ot%02003007sp

emiTllaFtuptuOzHM05@%08ot%02003007sp

ycneuqerFtuptuOmumixaM 1zHG

1ETON;yaleDnoitagaporP IJ zHG19.04.1sn

cdoelcyCytuDtuptuO8425%

.esiwrehtodetonsselnuzHM005taderusaemsretemarapllA

.tniopgnissorctuptuolaitnereffidehtottniopgnissorctupnilaitnereffidehtmorfderusaeM:1ETON

.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON

.stniopssorclaitnereffidtuptuoehttaderusaeM

segatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:3ETON

derusaemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqehtiwdna

.stniopssorclaitnereffidehtta

.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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PARAMETER MEASUREMENT INFORMATION

V

CC

LVPECL

VCC = 2.0V

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

SCOPE

Qx

nQx

VEE = -1.3V ± 0.135V

FIGURE 1A - 3.3V OUTPUT LOAD TEST CIRCUIT

V

CC

LVPECL

VCC = 2.0V

VEE = -0.5V ± 0.125V

SCOPE

Qx

nQx

FIGURE 1B - 2.5V OUTPUT LOAD TEST CIRCUIT

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
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V

CLK

nCLK

V

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

CC

V

VPP

EE

Cross Points

FIGURE 2 - DIFFERENTIAL INPUT LEVEL

CMR

Qx

nQx

Qy

nQy

tsk(o)

FIGURE 3 - OUTPUT SKEW

Qx

PART 1

nQx

Qy

PART 2

nQy

tsk(pp)

FIGURE 4 - PART-TO-PART SKEW

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
Systems, Inc.

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

Clock Inputs
and Outputs

CLK

nCLK

Q0 - Q1

nQ0 - nQ1

80%

20%

t

R

t

F

FIGURE 5 - INPUT AND OUTPUT RISE AND FALL TIME

t

PD

80%

20%

V

SWING

CLK, Qx

nCLK, nQx

FIGURE 6 - PROPAGATION DELAY

Pulse Width

t

PERIOD

t

odc =

PW

t

PERIOD

FIGURE 7 - odc & t

PERIOD

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
Systems, Inc.

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

APPLICATION INFORMATION

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

ICS85311

Figure 8

generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V

shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ VCC/2 is

= 3.3V , V_REF should be 1.25V and R2/R1 = 0.609.

CC

CLK_IN

CLK_IN

C1

0.1uF

C1

0.1uF

R1
1K

R1
1K

V_REF

V_REF

R2
1K

R2
1K

VCC

VCC

+

+

-

-

FIGURE 8 - SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
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ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the ICS85311.
Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation of the ICS85311 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

= 3.3V + 5% = 3.465V, which gives worst case results.

CC

• Power (core) = V

* IEE = 3.465V * 25mA = 86.6mW

CC

• Power (outputs) = 30.2mW/Loaded Output pair

If all outputs are loaded, the total power is 2 x 30.2mW = 60.4mW

Total Power (3.465V, with all outputs switching) = 86.6mW + 60.4mW = 147mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the

reliability of the device. The maximum recommended junction temperature for HiPerClockS

TM

devices is 125°C.

In order to determine if the junction temperature is below 125°C, the appropriate junction-to-ambient thermal
resistance θ
feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per the table below:

Tj = θ

JA

must be used in conjunction with the total power dissipation. Assuming a moderate air low of 200 linear

JA

* Pd_total + TA where Pd_total is the total power dissipation of the device and TA is the ambient

temperature. Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.147W * 103.3°C/W = 85.2°C. This is well below the limit of 125°C.

This calculation is only an example, and the Tj will obviously vary depending on the number of outputs that are
loaded, supply voltage, air flow, and the type of board (single layer or multi-layer).

Thermal Resistance q

for 8-pin SOIC, Forced Convection

JA

qJA by Velocity (Linear Feet per Minute)

0 200 500

Single-Layer PCB, JEDEC Standard Test Boards 153.3°C/W 128.5°C/W 115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 112.7°C/W 103.3°C/W 97.1°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
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Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

3. Calculations and Equations.

LVPECL output driver circuit and termination are shown in Figure 9.

VCC

Q1

RL

50

ICS85311

Low Skew, 1-to-2

V

OUT

V

- 2V

CC

Figure 9 - LVPECL Driver Circuit and Termination

To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load,

and a termination voltage of V

CC

- 2V.

Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.

Pd_H = [(V

Pd_L = [(V

OL_MAX

• For logic high , V

Using V

• For logic low , V

Using V

 (V

OH_MAX

- 2V))/RL]*(V

CC

 (VCC- 2V))/RL]*(V

OUT

= 3.465, this results in V

CC

OUT

= 3.465, this results in V

CC

= V

= V

OH_MAX

OL_MAX

- V

CC

OH_MAX

- V

CC

OL_MAX

= VCC  1.0V

OH_MAX

= V

 1.7V

CC

OL_MAX

= 1.765V

)

)

= 2.465V

Pd_H = [(2.465V - (3.465V - 2V))/50 Ω]*(3.465V - 2.465V) = 20.0mW
Pd_L = [(1.765V - (3.465V - 2V))/50 Ω]*(3.465V - 1.765V) = 10.2mW

Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
Circuit
Systems, Inc.

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

RELIABILITY INFORMATION

TABLE 5. θ

Single-Layer PCB, JEDEC Standard Test Boards 153.3°C/W 128.5°C/W 115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 112.7°C/W 103.3°C/W 97.1°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

TRANSISTOR COUNT

The transistor count for ICS85311 is: 225

. AIR FLOW TABLE

VS

JA

qJA by Velocity (Linear Feet per Minute)

0 200 500

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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Integrated
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PACKAGE OUTLINE - M SUFFIX

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

N

8

5

4

1

D

A2

e

H

E

A

A1

B

C

hx45˚

SEATING
PLANE

.10 (.004)

L

α

TABLE 6. PACKAGE DIMENSIONS

LOBMYS

N8
A53.157.1235.08860.0

1A01.052.00400.08900.0

2A52.105.12940.00950.0
B33.015.0310.0020.0
C91.052.05700.08900.0
D08.400.50981.08691.0
E08.300.47941.04751.0
eCISAB72.1CISAB050.0
H08.502.64822.00442.0

h52.005.0010.0020.0
L04.072.1610.0050.0

α

NUMINIMMUMIXAMNUMINIMMUMIXAM

°0 °8 °0 °8

sretemilliMsehcnI

Reference Document: JEDEC Publication 95, MS-012

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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TABLE 7. ORDERING INFORMATION

rebmuNredrO/traPgnikraMegakcaPtnuoCerutarepmeT

MA11358SCIMA11358SCICIOSdael8ebutrep69C°07otC°0

TMA11358SCIMA11358SCIleeRdnaepaTnoCIOSdael80052C°07otC°0

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.

ICS85311AM www.icst.com/products/hiperclocks.html REV. A JUNE 29, 2001

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