Page 1
40MHz, 32-Channel Serial to Parallel Converter
with Push-Pull Outputs
Ordering Information
Package Options
Device 64 Pin Plastic Gullwing 80-Lead Ceramic Gullwing Die in Wafer Form
HV76 HV7620PG HV7620DG HV7620XW
HV7620
Features
❏ Processed with HVCMOS® technology
❏ 5V CMOS logic and 12V supply rail
❏ Output voltage up to 200V
❏ Low power level shifting
❏ Source/sink current minimum 50mA
❏ 40MHz equivalent data rate
❏ Chip select
❏ Polarity function
❏ Forward and reverse shifting options (DIR pin)
❏ Latched outputs
Absolute Maximum Ratings
Supply voltage1, V
Supply voltage1, V
Supply voltage1, V
Logic input levels
Continuous total power dissipation
DD1
DD2
PP
1
2
Plastic 1200mW
Ceramic 1900mW
-0.5V to +15V
-0.5V to +15V
-0.5V to +225V
-2.0V to V
DD1
+2.0V
General Description
The HV76 is a low-voltage serial to high-voltage parallel converter with push-pull outputs. This device has been designed for
use as a driver for color AC plasma displays.
The device has 4 parallel 8-bit shift registers permitting data rate
4 times the speed of one. The data are clocked in simultaneously
on all four data inputs with a single clock. Data are shifted in on
a low to high transition of the clock. The latches and control logic
perform the output enable function.
The DIR pin causes clockwise (CW) shifting of the data when
connected to V
connected to GND. Operation of the shift register is not affected
by the LE (latch enable) input. Transfer of data from the shift
registers to the latches occurs when the LE input is high. Data is
stored in the latches when LE is low. The current source on the
logic inputs provides active pull up when the input pins are open.
, and counterclockwise (CCW) shifting when
DD1
Operating temperature range Plastic -40°C to +85°C
Ceramic -55°C to 125°C
Storage temperature range -65°C to +150°C
Notes:
1. All voltages are referenced to GND.
2. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plastic and at 19mW/°C for ceramic.
02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1
Page 2
Electrical Characteristics (over recommended operating conditions unless noted)
DC Characteristics (V
Symbol Parameters Min Max Units Condition
I
DD1
I
DD2
I
PP
I
DD1Q
I
DD2Q
V
V
I
IH
I
IL
V
OH
OL
GG
V
DD1
V
DD2
High voltage supply current 2 mA All output high or low
Quiescent V
Quiescent V
High-level output 185 V IO = -50mA
Low-level output 20 V IO = 50mA
High-level logic input current 1.0 µAV
Low-level logic input current -10 µAV
HVGND to LVGND voltage difference -1.0 1.0 V
AC Characteristics (Logic signal inputs and data inputs have t
Symbol Parameters Min Max Units Condition
f
CLK
tWL, t
t
SU
t
H
t
ON
t
WLE
t
DLE
t
SLE
t
DLF
t
COF
t
DLH
t
DHL
WH
, t
OFF
, t
DLN
, t
CON
Clock frequency
Clock width high or low 40 ns
Data set-up time 20 ns
Data hold time 20 ns
Time from LE to HV
Width of LE pulse 25 ns
Delay time clock to LE low to high 50 ns
LE setup time before clock rises 20 ns
BL or CS low to high to HV
Clock to HV
Delay time clock to data low to high 100 ns CL = 15pF
Delay time clock to data high to low 100 ns CL = 15pF
DD1
= 5V, V
= 12V, VPP = 200V and TA = 25°C)
DD2
supply current 5 mA f
supply current 20 mA V
supply current 100 µA All input = V
DD1
supply current 100 µA All input = V
DD2
OUT
OUT
, tf ≤ 5ns. V
r
= 5V 10 MHz Per register CL = 15pF
V
DD1
V
= 12V 5 MHz Per register CL = 15pF
DD1
OUT
= 5V or 12V, V
DD1
DD2
275 ns CL = 15pF
250 ns
275 ns
HV7620
=10MHz
CLK
= V
DD1
DD2
max
DD1
DD1
DD2
= 10 MHz
f
CLK
= V
IN
= 0V
IN
= 12V, VPP = 200V)
Recommended Operating Conditions
Symbol Parameters Min Max Unit
V
DD1
V
DD2
V
PP
V
IH
V
IL
f
CLK
T
A
I
OD
I
GND(Vpp)
V
PP(SLEW)
Notes:
1.The current pulse width = 500ns, duty cycle = 5%.
2.This device cannot be hot-switched for output frequency greater than 500Hz. For output frequency greater than 500Hz, V
Logic supply voltage 4.5 V
DD2
12V supply voltage 10.8 13.2 V
High voltage supply voltage 50 200 V
High-level input voltage V
-0.5V V
DD1
DD1
Low-level input voltage 0 0.5 V
V
Clock frequency
= 5V
DD1
= 12V 5 MHz
V
DD1
10 MHz
Operating free-air temperature Plastic -40 +85 °C
Ceramic -55 +125 °C
Allowable pulsed current through 500 mA
ouptut diodes
Allowable pulsed VPP or HVGND current
2
Slew rate of V
1
1
PP
16 A
340 V/µs
must be ramped.
PP
2
V
V
Page 3
Input and Output Equivalent Circuits
V
DD2
V
DD1
V
DD1
HV7620
V
PP
Input
LVGND
Logic Inputs
Switching Waveforms
Data Input
CLK
50% 50%
Data Output
LVGND
Logic Data Output High Voltage Outputs
50% 50%
t
WL
t
SU
Data Valid
t
t
DLH
DHL
t
H
t
DATA OUT
90%
WH
50%
50%
t
f
50%
10%
HVGND
t
10%
HV
OUT
V
IH
V
IL
r
V
90%
50%
IH
V
IL
V
OH
V
OL
V
OH
V
OL
LE
HV
OUT
HV
OUT
BLA, BLB,
BLC, BLD, or CS
HV
OUT
50%
t
DLE
t
t
DLF
t
DLN
t
COF
CON
t
t
90%
OFF
10%
ON
90%
10%
t
WLE
50%
t
SLE
V
IH
V
IL
V
OH
V
OL
V
OH
V
OL
V
IH
V
IL
V
OH
V
OL
3
Page 4
Functional Block Diagram
HV7620
D
D
D
D
D
OUT
CLK
DINB
OUT
D
OUT
D
OUT
IN
DIR
IN
IN
A
A
8-bit
shift
register
B
8-bit
shift
register
C
C
8-bit
shift
register
D
D
8-bit
shift
register
LE BLA CS POL
QA1
8-bit
latches
8
QA8
≈
≈
BLB
QB1
8-bit
latches
8
QB8
≈
≈
BLC
QC1
8-bit
latches
8
QC8
≈
≈
BLD
QD1
8-bit
latches
8
QD8
≈
≈
HV
A1
OUT
≈
HV
HV
HV
OUT
OUT
OUT
B1
C1
D1
≈
≈
HV
A8
OUT
B8
HV
OUT
C8
HV
OUT
D8
HV
OUT
Function Table
Inputs HV Outputs
Function DINADINBDINCDIND CLK LE DIR BLA BLB BLC BLD CS POL ABCD
All O/P High XXXXXXXXXXXL LHHHH
All O/P Low XXXXXXXXXXXLHLLLL
“A” Outputs Low XXXXXXXLXXXXHL * * *
Normal Polarity XXXXXXXHHHHHH No Inversion
Outputs Inverted XXXXXXXHHHHHL Inversion
Transparent Mode H L L L ↑ HXHHHHHHH L LL
Data Stored XXXXXLXHHHHHH Stored Data
Shift CW XXXX↑ HHHHHHHXA
A
Shift CCW XXXX↑ HLHHHHHXANB
A
Notes:
H = High level, L = Low level, X = Irrelevant, ↑ = Low to high transition.
* = Dependent on previous stage’s state before the last CLK ↑ for last LE high.
Power-up sequence:
GND (HV, LV)
V
DD2
V
DD1
Logic Input Signals
V
PP
To power down reverse the sequence above.
The V
should not drop below VDD or float during operation.
PP
B
C
N
→→→→→→→
N
N+1BN+1CN+1DN+1
N
N–1BN–1CN–1DN–1
D
N
C
D
N
→
N
N
4
Page 5
HV7620
Pin Configurations
HV76
Pin Function
1 HVGND
2V
3HV
4HV
5HV
6HV
7HV
8HV
9HV
10 HV
11 H V
12 HV
13 HV
14 HV
15 HV
16 HV
17 HV
18 HV
19 V
PP
D8
OUT
C8
OUT
B8
OUT
A8
OUT
D7
OUT
C7
OUT
B7
OUT
A7
OUT
D6
OUT
C6
OUT
B6
OUT
A6
OUT
D5
OUT
C5
OUT
B5
OUT
A5
OUT
PP
20 HVGND
21 HVGND
22 V
DD2
23 BLC
24 BLD
25 LE
26 D
27 D
28 D
29 D
OUT
IN
IN
OUT
D
D
C
C
30 POL
31 LVGND
32 DIR
*Pins 65 to 80 are N/C (ceramic only)
Pin Function
33 CS
34 D
35 D
36 D
37 D
38 CLK
39 BLA
40 BLB
41 V
42 LVGND
43 N/C
44 HVGND
45 HVGND
46 V
47 HV
48 HV
49 HV
50 HV
51 HV
52 HV
53 HV
54 HV
55 HV
56 HV
57 HV
58 HV
59 HV
60 HV
61 HV
62 HV
63 V
64 HVGND
OUT
IN
IN
OUT
DD1
PP
PP
B
A
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Package Outline
B
A
Index
24
1
40
D4
C4
B4
A4
D3
C3
B3
A3
D2
C2
B2
A2
D1
C1
B1
A1
25
top view
3-sided Plastic 64-pin Gullwing Package
64
65
Index
80
1
top view
80-pin Ceramic Gullwing Package
64
41
41
40
25
24
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
02/06//02
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
5
www.supertex.com
Loading...