Page 1
Features
•
Operating voltage: 2.7V~5.5V
•
Low power consumption
–
Operation: 25mA Max. (VCC=5V)
10mA Max. (V
–
Standby: 30µA Max. (VCC=5V)
10
•
Access time:150ns Max. (VCC=5V)
µA Max. (V
250ns Max. (V
CC
CC
=3V)
CC
=3V)
=3V)
General Description
The HT23C512 is a read-only memory with high
performance CMOS storage device whose 512K
of memory is arranged in to 65536 words by 8
bits.
For application flexibility, the chip enable and
output enable control pins can be selected as
active high or active low. This flexibility not only
allows easy interface with most microproces-
HT23C512
CMOS 64K×8-Bit Mask ROM
•
65536×8 bits of mask ROM
•
Mask options: chip enable CE/CE/OE1/OE1
and output enable OE/
•
TTL compatible inputs a nd ou t put s
•
Tristate outputs
•
Fully static operation
•
Package type: 28-pin DIP/SOP
sors, but also eliminates bus contention in multiple bus microprocessor systems. An additional
feature of the HT23C512 is its ability to enter
the standby mode whenever the chip enable
(CE/
CE) is inactive, thus redu cing curren t consumption to below 30
these functions makes the chip suitable for high
density low power memory applications.
OE/NC
µA. The combination of
Block Diagram
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Pin Assignment
Pin Description
Pin Name I/O Description
A0~A15 I Address inputs
D0~D7 O Data outputs
CE/
CE/OE1/OE1 I Chip enable/Output enable input
OE/NC I Output enable input
OE/
VSS I Negative power supply
VDD I Positive power supply
HT23C512
Operation Truth Table
Mode CE/CE OE/OE A0~A15 D0~D7
Read H/L H/L Valid Data Out
Deselect H/L L/H X High Z
Standby L/H X X High Z
Note: H=V
, L=VIL, X=VIH or V
IH
IL
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HT23C512
Absolu te Maxim u m R a tin g s *
Supply Voltage.................................–0.3V to 6V Storage Temperature.................–50°C to 125°C
Input Voltage........................–0.3V to V
*Note: These are stress ra tings on ly. Stresses exceeding the range specified under “Abso lute Maxi -
mum Ratings” ma y cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme condition s may affect device reliability.
D.C. Characteristics
Supply voltage: 2.7V~3.6V Ta=–40°C to 85°C
+0.3V Operating Temperature...............–40°C to 85°C
CC
Symbol Pa ra meter
V
CC
I
CC
V
IL
V
IH
V
OL
V
OH
I
LI
I
LO
I
STB1
I
STB2
C
IN
C
OUT
Operating Voltage — — 2.7 — 3.6 V
Operating Current 3V
Input Low Voltage 3V — V
Input High Voltage 3V — 2.0 — V
Output Low Voltage 3V IOL=2.1mA — — 0.4 V
Output High Voltage 3V IOH=–0.4mA 2.4 — V
Input Leakage Current 3V VIN=0 to V
Output Leakage Current 3V V
Standby Current 3V
Standby Current 3V
Input Capacitance (See note) — f=1MHz — — 10 pF
Output Capacitance (See note) — f=1MHz — — 10 pF
Test Conditions
V
CC
Conditions
O/P Unload,
f=5MHz
OUT
CE=V
CE=V
≤0.2V
CE
CE ≥VCC-0.2V
=0 to V
IL
IH
CC
Min. Typ. Max. Unit
——10mA
— 0.4 V
SS
——10µA
CC
——10µA
——500µA
——10
CC
CC
V
V
µA
Note: These parameters are periodically samp led but not 100% tested.
Supply voltage: 4.5V~5.5V Ta=–40°C to 85°C
Symbol Pa ra meter
V
CC
I
CC
V
IL
Operating Voltage — — 4.5 — 5.5 V
Operating Current 5V
Input Low Voltage 5V — V
Test Conditions
V
CC
Conditions
O/P Unload,
f=5MHz
3 24th Aug ’98
Min. Typ. Max. Unit
——25mA
— 0.8 V
SS
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HT23C512
Symbol Parameter
V
IH
V
OL
V
OH
I
LI
I
LO
I
STB1
I
STB2
C
IN
C
OUT
Input High Voltage 5V — 2.2 — V
Output Low Voltage 5V IOL=3.2mA — — 0.4 V
Output High Voltage 5V IOH= –1mA 2.4 — V
Input Leakage Current 5V VIN=0 to V
Output Leakage Current 5V V
Standby Current 5V
Standby Current 5V
Input Capacitance (See note) — f=1MHz — — 10 pF
Output Capacitance (See note) — f=1MHz — — 10 pF
Test Conditions
V
CC
Conditions
OUT
CE=V
CE=V
≤0.2V
CE
CE ≥VCC-0.2V
=0 to V
IL
IH
CC
Min. Typ. Max. Unit
——10µA
CC
——10µA
— — 1.5 mA
——30
CC
CC
V
V
µA
Note: These parameters are periodically samp led but not 100% tested.
A.C. Characteristics Ta=–40°C to 85°C
V
=2.7V~3.6V VCC=4.5V~5.5V
Symbol Parameter
t
CYC
t
AA
t
ACE
t
AOE
t
OH
t
OD
t
OE
Cycle Time 250 — 150 — ns
Address Access Time — 250 — 150 ns
Chip Enable Access Time — 250 — 150 ns
Output Enable Access Time — 150 — 80 ns
Output Hold Time — — 10 — ns
Output Disable Time (See Note) — — — 70 ns
Output Enable Time (See Note) — — 10 — ns
CC
Min. Max. Min. Max.
Unit
Note: These parameters are periodically samp led but not 100% tested.
A.C. test conditions
Output load: see figure right
Input rise and fall time: 10ns
Input pulse levels : 0.4V to 2.4V
Input and output timing reference levels:
0.8V and 2.0V (V
1.5V (V
CC
=3V)
CC
=5V)
Output load circuit
4 24th Aug ’98
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Functional Description
The HT23C512 has two modes, namely data
read mode and standby mode, controlled by
CE/
CE/OE1/OE1 and OE/OE/NC inputs.
•
Standby mode
The HT23C512 has lower current consumption,
controlled by the chip enable input (CE/
When a low/high level is applied to the CE /
input regardless of the output enable
(OE/
OE/NC) states, the chip will enter the
standby mode.
CE).
CE
•
Data read mode
When both the chip enable (CE/
and the out put en able ( OE/
the chip is in data read mode. Otherwise,
active CE/
in deselect mode. The output will remain in
Hi-Z state.
CE and inactive OE /OE/NC result
Timing Diagrams
•
Propagation delay due to address (CE/CE/OE1/OE1 and OE/OE are active)
HT23C512
CE/OE/OE1)
OE/NC) are active,
•
Propagation delay due to chip enable and output enable (address valid)
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Page 6
Characteristic Curves
HT23C512
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Page 7
HT23C512
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HT23C512 MASK ROM ORDERING SHEET
Custom:
HT23C512
User No. Type/Ref. Name Q’ty Check Sum
Control Pin and Package Form Option:
(a) 28 Pin Type Pin 20 :
Pin 22:
(b) Package For m:
Companion User No.
Package Marking :
Delivery Date : Q’ty:
CUSTOM CONFIRMED BY :
(1) CE (2) CE (3) OE1 (4) OE1
(1) OE (2) OE (3) NC
(1) Chip Form (2) 28 DIP (3) 28 SOP
Memory Address
Start End
(NAME, DATE, POSITION & CO. CHOP)
HOL TEK CONFI RMED BY:
(SALES) (SALES MANAGER)
8 24th Aug ’98
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