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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40245B
buffers
Octal bus transceiver with 3-state
outputs
Product specification
File under Integrated Circuits, IC04
January 1995
Page 2
Philips Semiconductors Product specification
Octal bus transceiver with 3-state outputs
DESCRIPTION
The HEF40245B is an octal bus transmitter/receiver
designed for 8-line asynchronous, 2-way data
communication between data buses. It features output
stages with high current output capability suitable for
driving highly capacitive loads.
The direction input (DR) controls transmission of data from
bus A to bus B, or bus B to bus A, depending on its logic
level. The 3-state outputs are controlled by the enable
input EO. A HIGH on EO causes the outputs to assume a
high impedance OFF-state. The device also features
hysteresis on all inputs to improve noise immunity.
Schmitt-trigger action in the inputs makes the circuit highly
tolerant to slower input rise and fall times.
The HEF40245B is pin and functionally compatible with
the TTL ‘245’ device.
PINNING
A
B
DR direction input
EO output enable input (active LOW)
HEF40245BP(N): 20-lead DIL; plastic (SOT146-1)
HEF40245BD(F): 20-lead DIL; ceramic (cerdip) (SOT152)
HEF40245BT(D): 20-lead SO; plastic (SOT163-1)
( ): Package Designator North America
0
0
to A
to B
HEF40245B
buffers
7
7
data input/output
data input/output
Fig.1 Pinning diagram.
January 1995 2
Fig.2 Logic diagram; for functional diagram see
Fig.3.
FAMILY DATA, IDDLIMITS category buffers
See Family Specifications.
Page 3
Philips Semiconductors Product specification
Octal bus transceiver with 3-state outputs
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage)
HEF40245B
buffers
INPUTS INPUTS/OUTPUTS
EO DR A
L L A = B input
L H input B = A
HX Z Z
L = LOW state (the less positive voltage)
X = state is immaterial
Z = high impedance OFF-state
n
B
n
Fig.3 Functional diagram.
January 1995 3
(1) P-channel MOS transistor conducting.
(2) P-channel MOS transistor and bipolar
n-p-n transistor conducting.
Fig.4 Typical output source current characteristic.
Fig.5 Schematic diagram of output stage.
Page 4
Philips Semiconductors Product specification
Octal bus transceiver with 3-state outputs
HEF40245B
buffers
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
See Family Specifications, except for:
D.C. current into any input ± I
D.C. source or sink current into any output ± I
I
O
D.C. current into the supply terminals ± I max. 100 mA
DC CHARACTERISTICS
= 0 V
V
SS
V
V
DD
V
OH
V
V
OL
V
SYMBOL
−40 + 25 + 85
MIN. MAX. MIN. TYP. MAX. MIN. MAX.
Output current 5 4,6 0,75 0,6 1,2 0,45 mA
HIGH 10 9,5 −I
OH
1,85 1,5 3,0 1,1 mA
15 13,5 14,5 15 50 15,5 mA
Output current 5 3,6 9,3 10 24 10,7 mA
HIGH 10 8,4 −I
OH
14,4 15 46 15,0 mA
15 13,2 19,5 20 62 19,8 mA
Output current 5 0,4 2,9 2,3 5,4 1,75 mA
LOW 10 0,5 I
OL
9,5 7,6 17 5,50 mA
15 1,5 30,0 25 45 19,0 mA
Hysteresis 5 220 mV
voltage 10 V
H
250 mV
(any input) 15 320 mV
3-state input/output
leakage current 15 I
pins A
n
or B
n
OZ
(1)
− 1,6 −−1,6 − 12 µA
max. 10 mA
max. 25 mA
T
(°C)
amb
Note
1. Relevant output in OFF-state; A
at VSSor VDD; Bnat VSS or VDD.
n
January 1995 4
Page 5
Philips Semiconductors Product specification
Octal bus transceiver with 3-state outputs
AC CHARACTERISTICS
V
= 0 V; T
SS
Propagation delays
An→ B
HIGH to LOW 10 t
An→ B
LOW to HIGH 10 t
Output transition 5 40 80 ns
times 10 t
HIGH to LOW 15 15 30 ns
LOW to HIGH 10 t
3-state propagation delays
Output disable times
EO → An,B
HIGH 10 t
LOW 10 t
Output enable times
EO → An,B
HIGH 10 t
LOW 10 t
=25°C; CL= 50 pF; input transition times ≤ 20 ns
amb
V
DD
V
n
SYMBOL MIN. TYP. MAX.
5 95 190 ns 83 ns + (0,24 ns/pF) C
PHL
15 30 60 ns 26 ns + (0,07 ns/pF) C
n
5 85 170 ns 82 ns + (0,06 ns/pF) C
PLH
15 30 60 ns 29 ns + (0,02 ns/pF) C
THL
53060ns
TLH
15 15 30 ns
n
5 100 200 ns
PHZ
15 40 80 ns
5 100 200 ns
PLZ
15 50 100 ns
n
5 100 200 ns
PZH
15 35 70 ns
5 115 230 ns
PZL
15 45 90 ns
40 80 ns 35 ns + (0,10 ns/pF) C
40 80 ns 38 ns + (0,03 ns/pF) C
20 40 ns
20 40 ns
50 100 ns
60 120 ns
45 90 ns
55 110 ns
HEF40245B
buffers
TYPICAL EXTRAPOLA TION
FORMULA
L
L
L
L
L
L
see Fig.6
ALL BUFFERS
SWITCHING
Dynamic power 5 4 250 f
dissipation per 10 17 000 f
package (P) 15 46 000 f
V
DD
V
TYPICAL FORMULA FOR P (µW)
+∑(foCL) × V
i
+∑(foCL) × V
i
+∑(foCL) × V
i
January 1995 5
DD
DD
DD
2
2
2
where
fi= input freq. (MHz)
fo= output freq. (MHz)
= load capacitance (pF)
C
L
∑ (f
) = sum of outputs
oCL
= supply voltage (V)
V
DD
Page 6
Philips Semiconductors Product specification
Octal bus transceiver with 3-state outputs
t
TLH
− − − − t
THL
HEF40245B
buffers
Fig.6 Output transition times as a function of the load capacitance.
January 1995 6
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