Page 1
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40240B
buffers
Octal inverting buffers with 3-state
outputs
Product specification
File under Integrated Circuits, IC04
January 1995
Page 2
Philips Semiconductors Product specification
Octal inverting buffers with 3-state outputs
DESCRIPTION
The HEF40240B is an octal inverting buffer with 3-state
outputs. It features output stages with high current output
capability suitable for driving highly capacitive loads.
The 3-state outputs are controlled by the output enable
inputsEOAandEOB. A HIGH onEO causes the outputs to
assume a high impedance OFF-state. The device also
features hysteresis on all inputs to improve noise
immunity.
Schmitt-trigger action in the inputs makes the circuit highly
tolerant to slower input rise and fall times.
The HEF40240B is pin and functionally compatible with
the TTL ‘240’ device.
HEF40240B
buffers
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
HEF40240BP(N): 20-lead DIL; plastic (SOT146-1)
HEF40240BD(F): 20-lead DIL; ceramic (cerdip) (SOT152)
HEF40240BT(D): 20-lead SO; plastic (SOT163-1)
( ): Package Designator North America
PINNING
I
to I
A1
A4
to I
I
B1
B4
O
to O
A1
O
to O
B1
EOA, EO
A4
B4
B
inputs
inputs
bus outputs
bus outputs
output enable inputs (active LOW)
FAMILY DATA, IDDLIMITS category buffers
See Family Specifications
January 1995 2
Page 3
Philips Semiconductors Product specification
Octal inverting buffers with 3-state outputs
HEF40240B
buffers
TRUTH TABLE
INPUTS OUTPUT
I
n
HL L
LL H
XH Z
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
Fig.3 Logic diagram (one buffer).
X = state is immaterial
Z = high impedance off state
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
See Family Specifications except for:
D.C. current into any input ± I
D.C. source or sink current into any output ± I
D.C. current into the supply terminals ± I max. 100 mA
EO O
I
O
max. 10 mA
max. 25 mA
n
DC CHARACTERISTICS
=0 V
V
SS
V
DDVOHVOL
PARAMETER
SYMBOL
V V V MIN. TYP. MIN. TYP. MIN. TYP.
Output current 5 3,6 −−I
HIGH 10 8,4 −−I
15 13,2 −−I
Output current 5 4,6 −−I
HIGH 10 9,5 −−I
15 13,5 −−I
Output current 5 − 0,4 I
LOW 10 − 0,5 I
15 − 1,5 I
Hysteresis 5 −−V
voltage 10 −−V
(any input) 15 −−V
OH
OH
OH
OH
OH
OH
OL
OL
OL
H
H
H
T
(°C)
amb
UNIT−40 +25 +85
9,3 − 10,0 24,0 10,7 − mA
14,4 − 15,0 46,0 15,0 − mA
19,5 − 20,0 62,0 19,8 − mA
0,75 − 0,6 1,2 0,45 mA
1,85 − 1,5 3,0 1,1 − mA
14,5 − 15,0 50,0 15,5 − mA
2,9 − 2,3 5,4 1,75 − mA
9,5 − 7,6 17,0 5,50 − mA
30,0 − 25,0 45,0 19,0 − mA
−−−220,0 −− mV
−−−250,0 −− mV
−−−320,0 −− mV
January 1995 3
Page 4
Philips Semiconductors Product specification
Octal inverting buffers with 3-state outputs
(1) P-channel MOS transistor conducting.
(2) P-channel MOS transistor and bipolar
n-p-n transistor conducting.
Fig.4 Typical output source current characteristic.
HEF40240B
buffers
Fig.5 Schematic diagram of output stage.
AC CHARACTERISTICS
V
= 0 V; T
SS
ALL BUFFERS SWITCHING
=25°C; input transition times ≤ 20 ns
amb
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 4 250 f
dissipation per 10 17 000 f
package (P) 15 46 000 f
+∑(foCL) × V
i
+∑(foCL) × V
i
+∑(foCL) × V
i
DD
DD
DD
2
2
2
where
fi= input freq. (MHz)
fo= output freq. (MHz)
= load capacitance (pF)
C
L
∑ (f
) = sum of outputs
oCL
V
= supply voltage (V)
DD
January 1995 4
Page 5
Philips Semiconductors Product specification
Octal inverting buffers with 3-state outputs
AC CHARACTERISTICS
V
= 0 V; T
SS
PARAMETER
Propagation delays
I
→ O
An/Bn
HIGH to LOW 10 t
I
→ O
An/Bn
LOW to HIGH 10 t
Output transition 5 40 80 ns
times 10 t
HIGH to LOW 15 15 30 ns
LOW to HIGH 10 t
3-state propagation delays
Output disable times
EO → O
HIGH 10 t
LOW 10 t
Output enable times
EO → O
HIGH 10 t
LOW 10 t
=25°C; CL= 50 pF; input transition times ≤ 20 ns
amb
V
DD
V
An/Bn
SYMBOL MIN. TYP. MAX. UNIT
5 95 190 ns 83 ns + (0,24 ns/pF) C
PHL
15 30 60 ns 26 ns + (0,07 ns/pF) C
An/Bn
5 85 170 ns 82 ns + (0,06 ns/pF) C
PLH
15 30 60 ns 29 ns + (0,02 ns/pF) C
THL
53060ns
TLH
15 15 30 ns
An/Bn
5 70 140 ns
PHZ
15 30 60 ns
5 75 150 ns
PLZ
15 30 60 ns
An/Bn
5 80 160 ns
PZH
15 30 60 ns
5 90 180 ns
PZL
15 30 60 ns
40 80 ns 35 ns + (0,10 ns/pF) C
40 80 ns 38 ns + (0,03 ns/pF) C
20 40 ns
20 40 ns
35 70 ns
40 80 ns
35 70 ns
40 80 ns
HEF40240B
buffers
TYPICAL EXTRAPOLATION
FORMULA
L
L
L
L
L
L
see Fig.6
January 1995 5
Page 6
Philips Semiconductors Product specification
Octal inverting buffers with 3-state outputs
HEF40240B
buffers
t
− − − − t
TLH
THL
Fig.6 Output transition times as a function of the load capacitance.
January 1995 6
Loading...