Page 1
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40175B
MSI
Quadruple D-type flip-flop
Product specification
File under Integrated Circuits, IC04
January 1995
Page 2
Philips Semiconductors Product specification
Quadruple D-type flip-flop
DESCRIPTION
The HEF40175B is a quadruple edge-triggered D-type
flip-flop with four data inputs (D0to D3), a clock input (CP),
an overriding asynchronous master reset input (MR), four
buffered outputs (O0to O3), and four complementary
HEF40175B
MSI
buffered outputs (
transferred to O0to O3on the LOW to HIGH transition of
CP if MR is HIGH. When LOW, MR resets all flip-flops
(O0to O3= LOW, O0to O3= HIGH), independent of CP
and D0to D3.
O0to O3). Information on D0to D3is
Fig.2 Pinning diagram.
HEF40175BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF40175BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF40175BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
FAMILY DATA, IDDLIMITS category MSI
See Family Specifications
Fig.1 Functional diagram.
PINNING
to D3data inputs
D
0
CP clock input (LOW to HIGH; edge-triggered)
MR master reset input (active LOW)
O
to O3buffered outputs
0
O0to O3complementary buffered outputs
FUNCTION TABLE
CP D
XXL L H
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
INPUTS OUTPUTS
MR O O
HH H L
LH L H
X H no change no change
January 1995 2
= negative-going transition
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January 1995 3
Philips Semiconductors Product specification
Quadruple D-type flip-flop
Fig.3 Logic diagram.
HEF40175B
MSI
Page 4
Philips Semiconductors Product specification
Quadruple D-type flip-flop
HEF40175B
AC CHARACTERISTICS
V
= 0 V; T
SS
Propagation delays
CP → On, O
HIGH to LOW 10 t
LOW to HIGH 10 t
MR → O
HIGH to LOW 10 t
MR → O
LOW to HIGH 10 t
Output transition times 5 60 120 ns 10 ns + (1,0 ns/pF) C
HIGH to LOW 10 t
LOW to HIGH 10 t
Set-up time 5 60 30 ns
D
→ CP 10 t
n
Hold time 5 25 −5ns
D
→CP 10 t
n
Minimum clock 5 90 45 ns
pulse width; LOW 10 t
Minimum
width; LOW 10 t
Recovery time 5 0 −30 ns
for
MR 10 t
Maximum clock 5 5 11 MHz
pulse frequency 10 f
=25°C; CL= 50 pF; input transition times ≤ 20 ns
amb
V
DD
V
n
5 80 160 ns 53 ns + (0,55 ns/pF) C
SYMBOL MIN. TYP. MAX.
PHL
35 70 ns 24 ns + (0,23 ns/pF) C
15 25 50 ns 17 ns + (0,16 ns/pF) C
5 70 140 ns 43 ns + (0,55 ns/pF) C
PLH
30 65 ns 19 ns + (0,23 ns/pF) C
15 25 45 ns 17 ns + (0,16 ns/pF) C
n
5 75 155 ns 48 ns + (0,55 ns/pF) C
PHL
30 65 ns 19 ns + (0,23 ns/pF) C
15 25 50 ns 17 ns + (0,16 ns/pF) C
n
5 70 140 ns 43 ns + (0,55 ns/pF) C
PLH
30 65 ns 19 ns + (0,23 ns/pF) C
15 25 50 ns 17 ns + (0,16 ns/pF) C
THL
30 60 ns 9 ns + (0,42 ns/pF) C
15 20 40 ns 6 ns + (0,28 ns/pF) C
5 60 120 ns 10 ns + (1,0 ns/pF) C
TLH
30 60 ns 9 ns + (0,42 ns/pF) C
15 20 40 ns 6 ns + (0,28 ns/pF) C
su
20 10 ns
15 15 5 ns
hold
10 0 ns
15 10 0 ns
WCPL
35 15 ns
15 25 10 ns
MR pulse 5 80 40 ns
WMRL
30 15 ns
15 20 10 ns
RMR
0 −20 ns
15 0 −15 ns
max
15 30 MHz
15 20 45 MHz
TYPICAL EXTRAPOLATION
FORMULA
see also waveforms Fig.4
MSI
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
January 1995 4
Page 5
Philips Semiconductors Product specification
Quadruple D-type flip-flop
AC CHARACTERISTICS
V
= 0 V; T
SS
Dynamic power 5 2000 f
dissipation per 10 8400 f
package (P) 15 22 500 f
=25°C; input transition times ≤ 20 ns
amb
V
DD
V
TYPICAL FORMULA FOR P (µW)
+∑(foCL) × V
i
+∑(foCL) × V
i
+∑(foCL) × V
i
DD
DD
DD
HEF40175B
MSI
2
2
2
where
fi= input freq. (MHz)
fo= output freq. (MHz)
= load capacitance (pF)
C
L
∑ (f
) = sum of outputs
oCL
V
= supply voltage (V)
DD
Fig.4 Waveforms showing minimum pulse widths for CP and MR, MR to CP recovery time, and set-up time and
hold time for Dnto CP. Set-up and hold times are shown as positive values but may be specified as
negative values.
APPLICATION INFORMATION
Some examples of applications for the HEF40175B are:
• Shift registers
• Buffer/storage register
• Pattern generator
January 1995 5
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