Datasheet HEF40106BP, HEF40106BT, HEF40106BTT Specification

HEF40106B

Hex inverting Schmitt trigger

Rev. 7 — 21 November 2011 Product data sheet

1. General description

The HEF40106B provides six inverting buffers. Each input has a Schmitt trigger circuit.
The inverting buffer switches at different points for positive-going and negative-going
signals. The difference between the positive volt age (V
is defined as hysteresis voltage (V

) and the negative voltage (VT)

T+

).

H

The HEF40106B
changing waveforms.

It operates over a recommended V
(usually ground). Unused inputs must be connected to V

2. Features and benefits

 Schmitt trigger input discrimination
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specifie d from 40 C to +125 C
 Complies with JEDEC standard JESD 13-B

3. Applications

 Wave and pulse shapers
 Astable multivibrators
 Monostable multivibrators

may be used for enhanced noise immunity or to “square up” slowly

power supply range of 3 V to 15 V referenced to VSS

DD

, VSS, or another input.

DD

4. Ordering information

Table 1. Ordering information

All types operate from 40 C to +125 C

Type number Package

HEF40106BP DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
HEF40106BT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
HEF40106BTT TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

Name Description Version

NXP Semiconductors

mna204

1A 1Y

1

2

2A 2Y

3

4

3A 3Y

5

6

4A 4Y

9

8

5A 5Y

11

10

6A 6Y

13

12

mna025

A

Y

HEF40106B

1A V

DD

1Y 6A

2A 6Y

2Y 5A

3A 5Y

3Y 4A

V

SS

4Y

001aal174

1

2

3

4

5

6

7

8

10

9

12

11

14

13

HEF40106B

Hex inverting Schmitt trigger

5. Functional diagram

Fig 1. Functional diagram Fig 2. Logic diagram (one inverting buffer)

6. Pinning information

6.1 Pinning

Fig 3. Pin configuration

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 2 of 16

NXP Semiconductors

6.2 Pin description

Table 2. Pin description

Symbol Pin Description

1A to 6A 1, 3, 5, 9, 11, 13 input
1Y to 6Y 2, 4, 6, 8, 10, 12 output
V

DD

V

SS

14 supply voltage
7 ground (0 V)

7. Functional description

HEF40106B

Hex inverting Schmitt trigger

Table 3. Function table

[1]

Input Output
nA nY

LH
HL

[1] H = HIGH voltage level; L = LOW voltage level.

8. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V

Symbol Parameter Conditions Min Max Unit

V

DD

I

IK

V

I

I

OK

I

I/O

I

DD

T

stg

T

amb

P

tot

supply voltage 0.5 +18 V
input clamping current VI< 0.5 V or VI>VDD + 0.5 V - 10 mA
input voltage 0.5 VDD + 0.5 V
output clamping current VO< 0.5 V or VO>VDD + 0.5 V - 10 mA
input/output current - 10 mA
supply current - 50 mA
storage temperature 65 +150 C
ambient temperature 40 +125 C
total power dissipation T

= 40 C to +125 C

amb

DIP14
SO14
TSSOP14

[1]

-750mW

[2]

-500mW

[3]

-500mW

P power dissipation per output - 100 mW

= 0 V (ground).

SS

[1] For DIP14 packages: above T
[2] For SO14 packages: above T
[3] For TSSOP14 packages: above T

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 3 of 16

= 70 C, P

amb

= 70 C, P

amb

amb

tot

derates linearly with 8 mW/K.

tot

= 60 C, P

derates linearly with 12 mW/K.

derates linearly with 5.5 mW/K.

tot

NXP Semiconductors

HEF40106B

Hex inverting Schmitt trigger

9. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Max Unit

V

DD

V

I

T

amb

supply voltage 3 15 V
input voltage 0 V

DD

V

ambient temperature in free air 40 +125 C

10. Static characteristics

Table 6. Static characteristics

VSS = 0 V; VI=VSS or VDD; unless otherwise specified.

Symbol Parameter Conditions V

V

OH

HIGH-level

IO < 1 A 5 V 4.95 - 4.95 - 4.95 - 4.95 - V

output voltage

V

OL

LOW-level

IO < 1 A 5 V - 0.05 - 0.05 - 0.05 - 0.05 V

output voltage

I

OH

HIGH-level
output current

I

OL

LOW-level
output current

I

I

input leakage

VO = 2.5 V 5 V - 1.7 - 1.4 - 1.1 - 1.1 mA
V

= 4.6 V 5 V - 0.64 - 0.5 - 0.36 - 0.36 mA

O

= 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA

V

O

= 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA

V

O

VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA

= 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA

V

O

= 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA

V

O

current

I

DD

supply current all valid input

combinations;

=0A

I

O

C

I

input
capacitance

10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V

10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V

15 V - 0.1 - 0.1 - 1.0 - 1.0 A

5 V - 0.25 - 0.25 - 7.5 - 7.5 A

10 V - 0.5 - 0.5 - 15.0 - 15.0 A

15 V - 1.0 - 1.0 - 30.0 - 30.0 A

DD

T

= 40 C T

amb

= +25 C T

amb

= +85 C T

amb

= +125 C Unit

amb

Min Max Min Max Min Max Min Max

---7.5--- -pF

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 4 of 16

NXP Semiconductors

HEF40106B

Hex inverting Schmitt trigger

11. Dynamic characteristics

Table 7. Dynamic characteristics

T

= 25 C; CL = 50 pF; tr = tf  20 ns; wave forms see Figure 4; test circuit see Figure 5; unless otherwise specified.

amb

Symbol Parameter Conditions V

t

PHL

HIGH to LOW

nA or nB to nY 5 V 63 ns + (0.55 ns/pF)C

propagation delay

t

PLH

LOW to HIGH

nA or nB to nY 5 V 58 ns + (0.55 ns/pF)C

propagation delay

t

THL

HIGH to LOW output

nY to LOW 5 V 10 ns + (1.00 ns/pF)C

transition time

t

TLH

LOW to HIGH output
transition time

nA or nB to
HIGH

DD

Extrapolation formula

10 V 2 9 ns + (0.23 ns/pF)C
15 V 2 2 ns + (0.16 ns/pF)C

10 V 2 9 ns + (0.23 ns/pF)C
15 V 2 2 ns + (0.16 ns/pF)C

10 V 9 ns + (0.42 ns/pF)C
15 V 6 ns + (0.28 ns/pF)C

5 V 10 ns + (1.00 ns/pF)C
10 V 9 ns + (0.42 ns/pF)C
15 V 6 ns + (0.28 ns/pF)C

[1]

Min Typ Max Unit

- 90 180 ns

L

-3570ns

L

-3060ns

L

- 75 150 ns

L

-3570ns

L

-3060ns

L

- 60 120 ns

L

-3060ns

L

-2040ns

L

- 60 120 ns

L

-3060ns

L

-2040ns

L

[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).

Table 8. Dynamic power dissipation

VSS = 0 V; tr = tf  20 ns; T

Symbol Parameter V

P

D

dynamic power
dissipation

= 25 C.

amb

Typical formula where:

DD

5V PD = 2300  fi + (fo  CL)  V
10 V P
15 V P

= 9000  fi + (fo  CL)  V

D

= 20000  fi + (fo  CL)  V

D

2

(W) fi = input frequency in MHz;

DD
DD

2

DD

(W)

2

(W)

f

= output frequency in MHz;

o

C

= output load capacitance in pF;

L

(fo  CL) = sum of the outputs;
V

= supply voltage in V.

DD

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 5 of 16

NXP Semiconductors

001aag197

input

output

t

PLH

t

PHL

0 V

V

I

V

M

V

M

V

OH

V

OL

t

TLH

t

THL

90 %

10 %

10 %

90 %

t

r

t

f

V

DD

V

I

V

O

001aag182

DUT

C

L

R

T

G

12. Waveforms

Measurement points are given in Table 9.
Logic levels: V

, tf = input rise and fall times.

t

r

Fig 4. Propagation delay and output transition time

and VOH are typical output voltage levels that occur with the output load.

OL

HEF40106B

Hex inverting Schmitt trigger

Table 9. Measurement points

Supply voltage Input Output
V

DD

5 V to 15 V 0.5V

Test data given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.

= load capacitance including jig and probe capacitance.

C

L

= termination resistance should be equal to the output impedance Zo of the pulse generator.

R

T

V

M

DD

V

M

0.5V

DD

Fig 5. Tes t circ ui t

Table 10. Test data

Supply voltage Input Load
V

DD

5 V to 15 V VSS or V

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 6 of 16

V

I

DD

tr, t

f

C

L

 20 ns 50 pF

NXP Semiconductors

001aag107

V

O

V

I

V

H

V

T+

V

T−

001aag108

V

O

V

I

V

H

V

T+

V

T−

13. Transfer characteristics

Table 11. Transfer characteristics

VSS=0V; see Figure 6 and Figure 7.

Symbol Parameter Conditions V

V

T+

V

T

V

H

positive-going threshold voltage 5 V 2.0 3.0 3.5 2.0 3.5 V

negative-going threshold voltage 5 V 1.5 2.2 3.0 1.5 3.0 V

hysteresis voltage 5 V 0.5 0.8 - 0.5 - V

HEF40106B

Hex inverting Schmitt trigger

T

DD

= 40 C to +85 C T

amb

Min Typ

[1]

Max Min Max

10 V 3.7 5.8 7.0 3.7 7 .0 V
15 V 4.9 8.3 11.0 4.9 11.0 V

10 V 3.0 4.5 6.3 3.0 6 .3 V
15 V 4.0 6.5 10.1 4.0 10.1 V

10 V 0.7 1.3 - 0.7 - V
15 V 0.9 1.8 - 0.9 - V

= 40 C

amb

to +125 C

Unit

[1] All typical values are at T

amb

=25C.

Fig 6. Transfer characteristic Fig 7. Waveforms showing definition of VT+ and VT

(between limits at 30 % and 70 %) and V

H

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 7 of 16

NXP Semiconductors

VI (V)

054231

001aal181

40

60

20

80

100

I

D

(μA)

0

VI (V)

0108462

001aal182

400

600

200

800

1000
I

D

(μA)

0

VI (V)

020168124

001aal183

800

1200

400

1600

2000
I

D

(μA)

0

HEF40106B

Hex inverting Schmitt trigger

a. VDD = 5 V; T

c. V

= 15 V; T

DD

= 25 Cb.V

amb

= 25 C

amb

Fig 8. Typical drain current as a function of input

= 10 V; T

DD

amb

= 25 C

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 8 of 16

NXP Semiconductors

001aal184

VDD (V)

2.5 17.512.57.5

4

6

2

8

10

V

I

(V)

0

V

P

V

N

mna035

R

C

001aal185

R

C

P

C

C

C

P

------

V

DDVSS

–

V

H

------------------------ ->

T

= 25 C.

amb

Fig 9. Ty p ical switching levels as a function of supply voltage

HEF40106B

Hex inverting Schmitt trigger

14. Application information

Some examples of applications for the HEF40106B are:

• Wave and pulse shapers

• Astable multivibrators

• Monostable multivibrators

Fig 10. Astable multivibrator Fig 11. Schmitt trigger driven via a

high-impedance input

If a Schmitt trigger is driven via a high-impedance (R > 1 k), then it is necessary to
incorporate a capacitor C with a value of ; otherwise oscillation can occur

on the edges of a pulse.

is the external parasitic capacit ance be twe en inp uts and output; the value depends on

C

p

the circuit board layout.

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 9 of 16

NXP Semiconductors

UNIT

A

max.

1 2

(1) (1)

b

1

cD

(1)

Z

Ee M

H

L

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

mm

inches

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

SOT27-1

99-12-27
03-02-13

A

min.

A

max.

b

max.

w

M

E

e

1

1.73

1.13

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05

0.2542.54 7.62

8.25

7.80

10.0

8.3

2.24.2 0.51 3.2

0.068

0.044

0.021

0.015

0.77

0.73

0.014

0.009

0.26

0.24

0.14

0.12

0.010.1 0.3

0.32

0.31

0.39

0.33

0.0870.17 0.02 0.13

050G04 MO-001 SC-501-14

M

H

c

(e )

1

M

E

A

L

seating plane

A

1

w M

b

1

e

D

A

2

Z

14

1

8

7

b

E

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

15. Package outline

HEF40106B

Hex inverting Schmitt trigger

Fig 12. Package outline SOT27-1 (DIP14)

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 10 of 16

NXP Semiconductors

UNIT

A

max.

A1A2A

3

b

p

cD

(1)E(1)

(1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

mm

inches

1.75

0.25

0.10

1.45

1.25

0.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

1.27

6.2

5.8

0.7

0.6

0.7

0.3

8
0

o
o

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

X

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

(A )

3

A

7

8

1

14

y

076E06 MS-012

pin 1 index

0.069

0.010

0.004

0.057

0.049

0.01

0.019

0.014

0.0100

0.0075

0.35

0.34

0.16

0.15

0.05

1.05

0.041

0.244

0.228

0.028

0.024

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27
03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

HEF40106B

Hex inverting Schmitt trigger

Fig 13. Package outline SOT108-1 (SO14)

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 11 of 16

NXP Semiconductors

UNIT A1A2A

3

b

p

cD

(1)E(2) (1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

mm

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

0.65

6.6

6.2

0.4

0.3

0.72

0.38

8
0

o
o

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153

99-12-27
03-02-18

w M

b

p

D

Z

e

0.25

17

14

8

θ

A

A

1

A

2

L

p

Q

detail X

L

(A )

3

H

E

E

c

v M

A

X

A

y

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

A

max.

1.1

pin 1 index

HEF40106B

Hex inverting Schmitt trigger

Fig 14. Package outline SOT402-1 (TSSOP14)

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 12 of 16

NXP Semiconductors

HEF40106B

Hex inverting Schmitt trigger

16. Revision history

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HEF40106B v.7 20111121 Product data sheet - HEF40106B v.6
Modifications:

HEF40106B v.6 20110823 Product data sheet - HEF40106B v.5
HEF40106B v.5 20110511 Product data sheet - HEF40106B v.4
HEF40106B v.4 20101115 Product data sheet - HEF40106B_CNV v.3
HEF40106B_CNV v.3 19950101 Product specification - HEF40106B_CNV v.2
HEF40106B_CNV v.2 19950101 Product specification - -

• Legal pages updated.

• Changes in “General description” and “Features and benefits”.

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 13 of 16

NXP Semiconductors

HEF40106B

Hex inverting Schmitt trigger

17. Legal information

17.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed si nce this d ocument was p ublished and may dif fer in case of multiple devices. The latest product statu s

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

17.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to co nt ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.

Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.

17.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environment al
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.

Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.

NXP Semiconductors does not accept any liability related to any default ,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third part y
customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.

, unless otherwise

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

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NXP Semiconductors

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Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lif ied nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, custome r
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, da mages or failed produ ct claims result ing from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.

17.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trademarks
are the property of their respective owners.

18. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

HEF40106B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 7 — 21 November 2011 15 of 16

NXP Semiconductors

19. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Transfer characteristics . . . . . . . . . . . . . . . . . . 7

14 Application information. . . . . . . . . . . . . . . . . . . 9

15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13

17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14

17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14

17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15

18 Contact information. . . . . . . . . . . . . . . . . . . . . 15

19 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

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Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2011. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

Date of release: 21 November 2011

Document identifier: HEF40106B