• Recognized under UL 1577
for Dielectric Withstand
Proof Test Voltages of 5000
Vac, 1 Minute
Applications
• Isolated MOSFET/IGBT Gate
Drive
• AC and DC Motor Drives
• General Purpose Industrial
Inverters
• Uninterruptable Power
Supply
Description
The HCPL-3100/3101 consists of
an LED* optically coupled to an
integrated circuit with a power
output stage. These optocouplers
are suited for driving power
MOSFETs and IGBTs used in
motor control inverter applica-
The HCPL-3100 switches a 3000
pF load in 2 µs and the HCPL3101, using a higher speed LED,
switches a 3000 pF load in 0.5 µs.
With a CMR rating of 5 kV/µs
typical these optocouplers readily
reject transients found in inverter
applications.
tions. The high operating voltage
range of the output stage provides
the voltage drives required by
gate controlled devices. The
voltage and current supplied by
these optocouplers allow for
direct interfacing to the power
device without the need for an
intermediate amplifier stage.
The LED controls the state of the
output stage. Transistor Q2 in the
output stage is on with the LED
off, allowing the gate of the power
device to be held low. Turning on
the LED turns off transistor Q2
and switches on transistor Q1 in
the output stage which provides
current and voltage to drive the
gate of the power device.
Functional Diagram
HCPL-3100
8
ANODE
CATHODE
1
2
3
4
THE USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED BETWEEN PINS 8 AND 7
IS RECOMMENDED. ALSO CURRENT LIMITING RESISTOR IS RECOMMENDED
(SEE FIGURE 1, AND NOTE 2 AND NOTE 7).
V
CC
7
GND
Q2
6
V
O2
Q1
5
V
O1
TRUTH TABLE
LED
OUTPUT
ON
HIGH LEVEL
OFF
LOW LEVEL
ANODE
CATHODE
Q1
ON
OFF
1
2
3
4
Q2
OFF
ON
HCPL-3101
8
V
CC
7
GND
Q2
6
V
O2
Q1
5
V
O1
*HCPL-3100 LED contains Silicon-doped GaAs and HCPL-3101 LED contains AlGaAs.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
1-338
5965-3583E
Page 2
Schematic
HCPL-3100
1
I
ANODE
CATHODE
THE USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED BETWEEN PINS 8 AND 7
IS RECOMMENDED. ALSO CURRENT LIMITING RESISTOR IS RECOMMENDED
(SEE FIGURE 1, AND NOTE 2 AND NOTE 7).
F
+
-
2
I
CC
Q2
I
O2
Q1
I
O1
Outline Drawing
V
CC
8
GND
7
V
O2
6
V
O1
5
ANODE
CATHODE
2
I
F
+
-
3
HCPL-3101
I
CC
V
CC
8
GND
7
Q2
I
O2
V
O2
6
Q1
I
O1
V
O1
5
TYPE
NUMBER
DATE
CODE
0.50
(0.020)
TYP
2.90 (0.114)
3.90 (0.154)
0.65 (0.026)
1.05 (0.040)
87 65
12 34
2.29 (0.090)
2.79 (0.110)
0.90 (0.035)
1.50 (0.059)
HP XXXX
YYWW
9.16 (0.361)
10.16 (0.400)
6.00 (0.236)
7.00 (0.276)
3.00 (0.118)
4.00 (0.157)
2.55 (0.100)
3.55 (0.140)
0.40 (0.016)
0.60 (0.024)
7.32 (0.288)
7.92 (0.312)
ANODE
CATHODE
0°
13°
0.16 (0.006)
0.36 (0.014)
0°
13°
HCPL-3100
8
1
2
3
4
V
CC
7
GND
Q2
6
V
Q1
5
V
ANODE
CATHODE
O2
O1
HCPL-3101
8
1
2
3
4
V
CC
7
GND
Q2
6
V
O2
Q1
5
V
O1
Demonstrated ESD
Performance
Human Body Model: MIL-STD-
883 Method 3015.7: Class 2
Regulatory Information
The HCPL-3100/3101 has been
approved by the following
organization:
Machine Model: EIAJ IC-121-
1988 (1988.3.28 Version 2),
Test Method 20, Condition
C: 1200 V
UL
Recognized under UL 1577,
Component Recognition Program,
File E55361.
1-339
Page 3
Insulation and Safety Related Specifications
ParameterSymbol Value UnitsConditions
Min. External Air Gap L(IO1)6.0mmShortest distance measured through air, between two
(External Clearance)conductive leads, input to output
Min. External Tracking L(IO2)6.0mmShortest distance path measured along outside surface
Path (Externalof optocoupler body between input and output leads
Creepage)
Min. Internal Plastic0.15mmThrough insulation distance conductor to conductor
Gap (Internalinside the optocoupler cavity
Clearance)
Absolute Maximum Ratings
ParameterSymbolDeviceMin.Max. Unit ConditionsFig.Note
Output Power DissipationP
Total Power DissipationP
O
T
Lead Solder Temperature260°C for 10 s, 1.0 mm below seating plane
-55125°C
-2580°C
6VT
35V
0.1A1
35V
0.1A1
500mW121
550mW121
= 25°C
A
Duty cycle = 1%
Duty cycle = 1%
1-340
Page 4
Recommended Operating Conditions
ParameterSymbolDeviceMin.Max.Units
Power Supply VoltageV
CC
1530*V
1524V
Input Current (ON)I
F(ON)
HCPL-310012**24mA
HCPL-31018**16mA
Input Current (OFF)I
F(OFF)
HCPL-3100-0.6mA
HCPL-3101-0.2mA
Operating TemperatureT
A
*For TA = -10°C to 60°C.
**The initial switching threshold is 10 mA or less for the HCPL-3100 and 5 mA or less for the HCPL-3101.
Recommended Protection
for Output Transistors
During switching transitions, the
output transistors Q1 and Q2 of
the HCPL-3100/3101 can conduct
large amounts of current. Figure
1 describes a recommended
limiting resistor R2 which is
necessary in order to prevent
damage to the output transistors
Q1 and Q2. (See Note 7.) A
bypass capacitor C1 is also recommended to reduce power supply
noise.
-2580°C
circuit design showing a current
HCPL-3100/1
R = 25 - 100 Ω
2
R = 180 Ω (HCPL-3100)
3
240 Ω (HCPL-3101)
BYPASS CAPACITOR C = 0.1 µF
1
8
C
1
7
Q2
6
R
2
Q1
5
12V
12V
IGBT
(OR
MOSFET)
CONTROL
INPUT
+5 V
TTL
OR
LSTTL
TOTEM
POLE
OUTPUT
GATE
R
3
ANODE
CATHODE
Figure 1. Recommended Output Transistor Protection and Typical Application Circuit.
+ HVDC
3-PHASE
- HVDC
AC
1-341
Page 5
Electrical Specifications
Over recommended temperature (TA = -25°C to +80°C) unless otherwise specified.
ParameterSym.DeviceMin.Typ.Max. Units Test ConditionsFig.Note
Parameter Sym.DeviceMin.Typ.Max. Units Test ConditionsFig.Note
Propagationt
PLH
Delay Time toV
High OutputHCPL-3101-0.30.5µsI
LevelC
Propagationt
PHL
HCPL-3100-12µsIF = 10 mAVCC = 24 V,9,2, 6
= 24 V,25,
= 5 mARG = 47 Ω,26,
F
O1
= 3000 pF27
G
HCPL-3100-12µsIF = 10 mA
Delay Time to
Low OutputHCPL-3101-0.30.5µsI
= 5 mA
F
Level
Rise Timet
Fall Timet
r
f
Output High|CM
HCPL-3100-0.20.5µsIF = 10 mA
HCPL-3101I
= 5 mA
F
HCPL-3100-0.20.5µsIF = 10 mA
HCPL-3101I
|HCPL-3100 1500 5000-V/µsIF = 10 mAVCM = 600 V102
H
= 5 mA
F
Level Common(peak),
Mode TransientHCPL-3101IF = 5mAVCC = 24 V
∆V
O1
02H
= 24 V
= ∆V
02L
ImmunityV
Output Low|CML|1500 5000-V/µsIF = 0 mA= 2.0 V
Level Common
Mode Transient
Immunity
Packaging Characteristics
Parameter Sym.Min.Typ.Max.Units Test ConditionsFig.Note
Input-Output MomentaryV
ISO
Withstand Voltage*t = 1 min, T
Resistance (Input-Output)R
Capacitance (Input-Output)C
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your
equipment level safety specification, or HP Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”
Notes:
1. Derate absolute maximum ratings with ambient temperatures as shown in Figures 11 and 12.
2. A bypass capacitor of 0.01 µF or more is needed near the device between VCC and GND when measuring output and transfer
characteristics.
3. I
represents the forward current when the output goes from low to high.
FLH
4. Device considered a two terminal device; pins 1-4 are shorted together and pins 5-8 are shorted together.
5. For devices with minimum V
insulation test voltage ≥ 6000 V rms for one second (leakage current detection limit, I
6. The t
7. R2 limits the Q1 and Q2 peak currents. For more applications and circuit design information see Application Note “Power Transistor
Gate/Base Drive Optocouplers.”
PLH
and t
propagation delays are measured from the 50% level of the input pulse to the 50% level of the output pulse.
PHL
specified at 5000 V rms, in accordance with UL 1577, each optocoupler is proof-tested by applying an
ISO
5000V rmsRH = 40% to 60%4, 5
= 25°C
A
I-O
5x101010
11
–ΩV
= 500 V, TA = 25°C4
I-O
RH = 40% to 60%
I-O
–1.2–pFf = 1 MHz4
≤ 200 µA).
I-O
1-343
Page 7
HCPL-3100
1
I
F
2
3
4
V
CC
GND
Q2
Q1
8
I
V
CC1
7
V
CC2
6
V
O2
5
V
O1
I
O1
+
+
-
–
V
O1L
+
F
HCPL-3100
1
2
3
4
V
GND
CC
8
7
Q2
6
V
Q1
5
V
V
CC
+
I
O2
–
V
O2H
+
O2
O1
Figure 2. Test Circuit for Low Level Output Voltage V
HCPL-3100
1
I
F
2
3
4
HCPL-3100
1
I
F
2
3
4
V
CC
GND
Q2
Q1
V
CC
GND
Q2
Q1
8
+
V
CC
7
6
V
O2
5
V
O1
8
7
6
V
O2
5
V
O1
-
–
V
O2L
I
O2
+
+
V
CC
I
O2L
.Figure 3. Test Circuit for High Level Output Voltage V
O1L
O2L
HCPL-3100
1
I
F
2
3
4
Figure 5. Test Circuit for Leakage Current I
.
HCPL-3100
1
I
F
2
3
4
V
GND
V
GND
CC
8
+
V
7
Q2
6
V
O2
Q1
5
V
O1
CC
I
O1L
O1L
I
CC
CC
8
7
Q2
6
V
O2
Q1
5
V
O1
+
V
CC
.
O2H
.Figure 4. Test Circuit for Low Level Output Voltage V
Figure 6. Test Circuit for Leakage Current I
I
F
SWEEP
HCPL-3100
1
2
3
4
V
CC
GND
Q2
Q1
8
V
7
6
V
O2
5
V
O1
CC
–
V
O2
+
.Figure 7. Test Circuit for I
O2L
+
-
Figure 8. Test Circuit for Threshold Input Current I
1-344
FLH
CCH
and I
CCL
.
.
Page 8
t = t = 0.01µs
rf
V
PULSE WIDTH 5 µs
IN
DUTY RATIO 50%
V WAVE FORM
I
F
IN
V WAVE FORM
OUT
HCPL-3100
V
CC
GND
Q2
Q1
8
+
V
CC
7
–
V
O2
+
6
V
O2
-
C
G
R
G
5
V
O1
1
2
3
4
I
F
SW
AB
50%
V
CM
t
PLH
t
PLH
90%
50%
10%
CM , V
HO2
SW AT A, I = 10 mA, HCPL-3100
F
SW AT A, I = 5 mA, HCPL-3101
F
HCPL-3100
V
CC
1
2
3
4
8
+
V
CC
GND
7
Q2
V
6
V
O2
Q1
-
–
O2
+
5
V
O1
–
+
V
CM
V
CM
GND
V
O2H
∆ V
O2H
t
r
Figure 9. Test Circuit for t
60
50
F
40
30
20
10
LED FORWARD CURRENT I (mA)
HCPL-3100
HCPL-3101
0
-250255075100125
AMBIENT TEMPERATURE T (°C)
PLH
80
t
f
CM , V
O2
L
SW AT B, I = 0 mA
F
, t
, tr, and tf.Figure 10. Test Circuit for CMH and CML.
PHL
600
500
T
400
o
300
OUTPUT POWER
DISSIPATION
TOTAL POWER
DISSIPATION
IC AND LED
IC
∆ V
O2L
500
200
100
F
50
20
10
200
100
POWER DISSIPATION P , P (mW)
0
-250255075100125
A
AMBIENT TEMPERATURE T (°C)
80
A
5
FORWARD CURRENT I (mA)
2
1
00.5 1.0 1.5 2.0 2.5 3.0
T = 75°C
A
50°C
25°C
0°C
-20°C
FORWARD VOLTAGE V (V)
V
GND
O2L
3.5
F
Figure 11. LED Forward Current vs.
Ambient Temperature.
Figure 12. Maximum Power Dissipation vs. Ambient Temperature.
Figure 13. Typical Forward Current
vs. Forward Voltage, HCPL-3100.
1-345
Page 9
100
70°C
50°C
10
F
25°C
T = 0°C
A
1
0.1
FORWARD CURRENT I (mA)
1.2
1.1
1.0
0.9
0.8
T = 25°C
A
1.6
V = 24 V
CC
1.4
1.2
1.0
0.8
HCPL-3100
HCPL-3101
0.01
1.01.21.41.61.82.02.2
FORWARD VOLTAGE V (V)
F
Figure 14. Typical Forward Current
vs. Forward Voltage, HCPL-3101.
0.4
01L
0.2
0.1
0.05
V = 12 V
0.02
0.01
LOW LEVEL OUTPUT 1 VOLTAGE V (V)
0.005
0.01 0.020.05 0.10.20.5 1.0
CC1
V = -12 V
CC2
T = 25°C
A
I = 5 mA, HCPL-3101
F
I = 10 mA, HCPL 3100
F
OUTPUT 1 CURRENT I (A)
01
Figure 17. Typical Low Level Output 1
Voltage vs. Output 1 Current.
NORMALIZED THRESHOLD INPUT CURRENT
0.7
151821242730
SUPPLY VOLTAGE V (V)
CC
Figure 15. Normalized Low to High
Threshold Input Current vs. Supply
Voltage.
0.5
01L
0.4
0.3
0.2
0.1
LOW LEVEL OUTPUT 1 VOLTAGE V (V)
I = 0.1 A
01
0
-250255075100
V = 12 V
CC1
V = -12 V
CC2
I = 5 mA, HCPL-3101
F
I = 10 mA, HCPL 3100
F
AMBIENT TEMPERATURE
Figure 18. Typical Low Level Output 1
Voltage vs. Ambient Temperature.
NORMALIZED THRESHOLD INPUT CURRENT
0.6
-250255075100
AMBIENT TEMPERATURE T (°C)
A
Figure 16. Normalized Low to High
Threshold Input Current vs. Ambient
Temperature.
30
I = 5 mA, HCPL-3101
27
O2H
24
21
18
15
HIGH LEVEL OUTPUT 2 VOLTAGE V (V)
12
15182124273033
SUPPLY VOLTAGE V (V)
F
I = 10 mA, HCPL-3100
F
CC
T = 25°C
A
Figure 19. Typical High Level Output 2
Voltage vs. Supply Voltage.
24
23
O2H
I = 0 A
22
21
20
19
HIGH LEVEL OUTPUT 2 VOLTAGE V (V)
18
-250255075100
O2
I = -0.1 A
O2
V = 24 V
I = 5 mA, HCPL-3101
F
I = 10 mA, HCPL-3100
F
AMBIENT TEMPERATURE T (°C)
CC
A
Figure 20. Typical High Level Output 2
Voltage vs. Ambient Temperature.
1-346
4
V = 6 V
CC
T = 25°C
2
02L
LOW LEVEL OUTPUT 2 VOLTAGE V (V)
A
I = 0 mA
F
1
0.5
0.2
0.1
0.05
0.01 0.020.05 0.10.20.5 1.0
OUTPUT 2 CURRENT I (A)
O2
Figure 21. Typical Low Level Output 2
Voltage vs. Output 2 Current.
1.5
02L
1.4
1.3
1.2
1.1
LOW LEVEL OUTPUT 2 VOLTAGE V (V)
1.0
I = 0.1 A
02
-250255075100
AMBIENT TEMPERATURE T (°C)
V = 24 V
CC
I = 0 mA
F
A
Figure 22. Typical Low Level Output 2
Voltage vs. Ambient Temperature.
Page 10
12
I = 10 mA, HCPL-3100
F
I = 5 mA, HCPL-3101
F
10
CCH
8
6
4
T = -25°C
A
25°C
80°C
CCL
14
I = 0 mA
F
12
10
T = -25°C
A
8
6
25°C
80°C
PHL PLH
2.5
2.0
1.5
t
PLH
1.0
0.5
t
PHL
V = 24 V
CC
R = 47 Ω
G
C = 3000 pF
G
T = 75°C
A
-25°C
25°C
HIGH LEVEL SUPPLY CURRENT I (mA)
2
151821242730
SUPPLY VOLTAGE V (V)
CC
Figure 23. Typical High Level Supply
Current vs. Supply Voltage.
1.0
0.8
PHL PLH
0.6
0.4
0.2
T = 75°C
A
PROPAGATION DELAY TIME t , t (µs)
0
0510152025
t
PLH
FORWARD CURRENT I (mA)
t
PHL
25°C
V = 24 V
CC
R = 47 Ω
G
C = 3000 pF
G
T = 75°C
A
25°C
-25°C
-25°C
F
Figure 26. Typical Propagation Delay
Time vs. Forward Current, HCPL-
3101.
LOW LEVEL SUPPLY CURRENT I (mA)
4
151821242730
SUPPLY VOLTAGE V (V)
CC
Figure 24. Typical Low Level Supply
Current vs. Supply Voltage.
1.0
t
0.8
PHL PLH
PROPAGATION DELAY TIME t , t (µs)
HCPL-3100
0.6
0.4
HCPL-3101
0.2
I = 5 mA, HCPL-3101
F
I = 10 mA, HCPL-3100
0
-250255075100
AMBIENT TEMPERATURE T (°C)
F
PLH
t
t
t
V = 24 V
CC
R = 47 Ω
G
C = 3000 pF
G
A
PHL
PLH
PHL
Figure 27. Typical Propagation Delay
Time vs. Ambient Temperature.
T = 75°C
PROPAGATION DELAY TIME t , t (µs)
0
0510152025
A
FORWARD CURRENT I (mA)
25°C
F
-25°C
Figure 25. Typical Propagation Delay
Time vs. Forward Current, HCPL-
3100.
1-347
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