Datasheet FSTD16244 Datasheet (Fairchild Semiconductor)

Page 1
November 2001 Revised November 2001
FSTD16244 16-Bit Bus Switch with Level Shifting (Preliminary)
Preliminary
FSTD16244 16-Bit Bus Switch with Level Shifting (Preliminary)
General Description
integrated into the circuit to allow for leve l shifting b etween 5V inputs and 3.3V outputs.
The device is o rganized a s a 16- bit switch . There are fo ur 4-bit switches with separ ate output enable inputs. When OE
is LOW, the switch in ON and P ort A is connected to Port B. When OE impedance state exists between the A and B Ports.
is HIGH, the switch OFF and a high
has been
CC
Features
4 switch connection between two ports.
Minimal propagation delay through the switch.
Low l
Zero bounce in flow-through mode.
Control inputs compatible with TTL level.
TruTranslation
.
CC
3.3V outputs
voltage translation from 5.0V inp uts to
Ordering Code:
Order Number Package Number Package Description
FSTD16244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP) , JEDEC MO-153, 6.1mm Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
TruTranslation is trademark of Fairc hild Semiconduct or C orporation.
© 2001 Fairchild Semiconductor Corporation DS500693 www.fairchildsemi.com
Page 2
Connection Diagram Logic Diagram
FSTD16244
Pin Descriptions Truth Table
Pin Name Description
OE
, 2An, 3An, 4A
1A
n
1B
, 2Bn, 3Bn, 4B
n
n
Output Enable Input (Active LOW)
n n
Bus A Bus B
H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance
Inputs Outputs
OE
Preliminary
x
LA Port HZ
A, B
= B Port
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Page 3
Preliminary
Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) 0.5V to +7.0V DC Switch Voltage (V DC Input Voltage (V DC Input Diode Current (l DC Output (I DC V
OUT
/GND Current (ICC/I
CC
Storage Temperature Range (T
) (Note 2) 0.5V to +7.0V
S
) (Note 3) 0.5V to +7.0V
IN
) V
< 0V 50mA
IK
IN
) Current 128mA
) ±100mA
GND
) 65°C to +150 °C
STG
Conditions
Power Supply Operating (V Input Voltage (V Output Voltage (V Input Rise and Fall Time (t
Switch Control Input 0 ns/V to 5 ns/V Switch I/O 0 ns/V to DC
Free Air Operating Temperature (T
Note 1: The Absolute Maximum Ratings are those value s beyond which the safety of the d evice cannot b e guaranteed . The device sh ould not be operated at these limit s. The parametric values defi ned in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recomm ended O peratin g Cond itions table will defin e the condition s for actual device operation.
is the volt age observed/applied at either the A or B Ports a c ross
Note 2: V
S
the switch. Note 3: The input and output negative voltage ratings may be exceeded if
the input and ou t put diode current ratings are observed. Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
(Note 4)
CC)
) 0V to 5.5V
IN
) 0V to 5.5V
OUT
, tf)
r
)-40°C to +85°C
A
4.5V to 5.5V
DC Electrical Characteristics
= 40°C to +85°C
T
Symbol Parameter
V
IK
V
IH
V
IL
V
OH
I
I
I
OZ
R
ON
I
CC
I
Note 5: Typical values are at VCC = 5.0V and TA = +25°C Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Clamp Diode Voltage 4.5 −1.2 V IIN = 18mA HIGH Level Input Voltage 4.5 - 5.5 2.0 V LOW Level Input Voltage 4.5 - 5.5 0.8 V HIGH Level 4.5 - 5.5 See Figure 3 V Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN 5.5V
OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ V Switch On Resistance 4.5 4 7 VIN = 0V, IIN = 64mA (Note 6) 4.5 4 7 V
Quiescent Supply Current
Increase in I
CC
per Input 5.5 2.5 mA One Input at 3.4V
CC
CC
(V) (Note 5)
0 ±10 µAV
4.5 35 50 V
5.5
A
Min Typ Max
1.5 mA
10 µA
Units ConditionsV
= 5.5V
IN
= 0V, IIN = 30mA
IN
= 2.4V, IIN = 15mA
IN
OEn = GND V
= VCC or GND, I
IN
= V
OE
n
VIN = VCC or GND, I
Other Inputs at VCC or GND
CC
OUT
CC
OUT
FSTD16244
= 0
= 0
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Page 4
Preliminary
AC Electrical Characteristics
= 40 °C to +85 °C,
T
A
C
= 50pF, RU = RD = 500
Symbol Parameter
FSTD16244
t
, t
PHL
t
PZH
t
PHZ
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the s witch and the 50pF load capacitance, wh en driven by an ideal volt age source (zero output impedance).
Propagation Delay Bus-to-Bus
PLH
(Note 7)
, t
Output Enable Time 1.0 5.1 ns VI = 7V for t
PZL
, t
Output Disable Time 1.0 5.4 ns VI = 7V for t
PLZ
L
= 4.5 – 5.5V
V
CC
Min Max
0.25 ns VI = OPEN Figures
Units Conditions
VI = OPEN for t
VI = OPEN for t
PZL
PZH
PLZ
PHZ
Capacitance (Note 8)
Symbol Parameter Typ Max Units Conditions
C
IN
C
I/O
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Control Pin Input Capacitance 3 pF VCC = 5.0V, VIN = 0V
Input/Output Capacitance OFF State 6pFV
, OE = 5.0V, VIN = 0V
CC
AC Loading and Waveforms
Figure
Number
1, 2
Figures
1, 2
Figures
1, 2
Note: Input driven by 50 source terminated in 50
includes load and stra y capacitance
Note: C
L
Note: Input PRR = 1.0 MHz, t
= 500 ns
W
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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Page 5
Output Voltage HIGH vs. Supply Voltage
Preliminary
FSTD16244
FIGURE 3.
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Page 6
Physical Dimensions inches (millimeters) unless otherwise noted
Preliminary
FSTD16244 16-Bit Bus Switch with Level Shifting (Preliminary)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchilds proven s witch technol ogy used for several years i n its 74LVX3L384(FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are device s or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the user.
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2. A critical component in any compon ent of a l ife supp ort device or system whose failu re to perform can be rea­sonably expected to cause the failure of the li fe su pp ort device or system, or to affect its safety or effectiveness.
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