This document contains information on a preproduction product. Specifications and information herein are subject to change without notice.
3.13.01
FS6345
Triple PLL VCXO Clock Generator IC
ISO9001
ISO9001ISO9001
ISO9001
1.0 Features
• On-chip tunable voltage-controlled crystal oscillator
circuitry (VCXO) allows precise system frequency
tuning (pull range typically 300ppm)
• VCXO tuning range: 0-3V
• Uses inexpensive fundamental-mode crystals
• Two integrated phase-locked loops (PLL) multiply
VCXO frequency to the higher system frequencies
needed
• 5V core supply voltage (contact factory for 3.3V)
• 3.3V / 5V output supply voltage
• Small circuit board footprint (20-pin SOIC)
• Custom frequency selections available - contact your
local AMI Sales Representative for more information
Figure 1: Pin Configuration
1
16
2
3
4
5
6
7
8
15
14
13
12
11
n/c
XOUT
XIN
VDD
XTUNE
VSS
OE
n/c
n/c
CLKB
VSS
VDDO
n/c
FS6345
9
10
CLKA
n/c
18
17
n/c
CLKC
20
19
n/c
n/c
n/c
2.0 Description
The FS6345 is a monolithic CMOS clock generator IC
designed to m inimize c ost and com ponent c ount in di gital
video/audio systems.
At the core of the FS6345 is circuitry that implements a
voltage-controlled crystal oscillator when an external
resonator is attache d. The VCXO allows device frequencies to be precise ly a djuste d f or use in s ystem s that h ave
frequency matchin g req uire m ents, su ch as dig ital s atel lite
receivers.
Three high-resolution phase-locked loops generate the
output clock frequencies (CLKA, CLKB, and CLKC).
These frequencies are phase-locked and frequencylocked to the VCXO frequency. Synthesis error of the
PLLs is +/-0 ppm unless otherwise noted.
Table 1: Crystal / Output Frequencies
DEVICE f
XIN
(MHz) CLKA (MHz) CLKB (MHz) CLKC (MHz)
FS6345-02 13.500 28.224 18.432 27.000
NOTE: Contact AMI for custom PLL frequencies
Figure 2: Block Diagram
VCXO
FS6345
PLL
XOUT
XIN
CLKA
XTUNE
Divider
Array
CLKB
PLL
CLKC
PLL