Datasheet FQI7N60, FQB7N60 Datasheet (Fairchild Semiconductor)

FQB7N60 / FQI7N60

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600V N-Channel MOSFET

April 2000

QFET

QFETQFET

TM

General Description

FQB7N60 / FQI7N60

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supply.

D

G

S

D2-PAK

FQB Series

Absolute Maximum Ratings

Symbol Parameter FQB7N60 / FQI7N60 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

, T

T

J

STG

T

L

Drain-Source Voltage 600 V Drain Current

Drain Current - Pulsed Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy

Power Dissipation (TA = 25°C) * Power Dissipation (T

Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds

G

D

S



TC = 25°C unless otherwise noted

- Continuous (T

= 25°C)

C

- Derate above 25°C 1.14 W/°C

= 25°C)

C

= 100°C)

C

Features

• 7.4A, 600V, R

• Low gate charge ( typical 29 nC)

• Low Crss ( typical 16 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

I2-PAK

FQI Series

(Note 1)

(Note 2) (Note 1) (Note 1) (Note 3)

= 1.0Ω @VGS = 10 V

DS(on)

G

7.4 A

4.7 A

29.6 A

±

30 V

580 mJ

7.4 A

14.2 mJ

4.5 V/ns

3.13 W 142 W

300 °C

D

S

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θ

JC

R

θ

JA

R

θ

JA

* When mounted on the minimum pad size recommended (PCB Mount)

Thermal Resistance, Junction-to-Case -- 0.88 °CW Thermal Resistance, Junction-to-Ambient * -- 40 °CW Thermal Resistance, Junction-to-Ambient -- 62.5 °CW

Rev. A, April 2000

FQB7N60 / FQI7N60

Electrical Characteristics



TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

∆

BV / ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage

DSS

Breakdown Voltage Temperature

DSS

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

= 250 µA, Referenced to 25°C

I

D

V

= 600 V, VGS = 0 V

DS

V

= 480 V, TC = 125°C

DS

= 30 V, VDS = 0 V

V

GS

V

= -30 V, VDS = 0 V

GS

600 -- -- V

-- 0.67 -- V/°C

-- -- 10

-- -- 100

-- -- 100 nA

-- -- -100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

= VGS, ID = 250µ A

V

DS

= 10 V , ID = 3.7 A

V

GS

= 50 V, ID = 3.7 A

V

DS

(Note 4)

3.0 -- 5.0 V

-- 0.8 1.0

-- 6.4 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 135 175 pF Reverse Transfer Capacitance -- 16 21 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 1100 1430 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 80 170 ns Turn-Off Delay Time -- 65 140 ns Turn-Off Fall Time -- 60 130 ns Total Gate Charge Gate-Source Charge -- 7 -- nC Gate-Drain Charge -- 14.5 -- nC

= 300 V, ID = 7.4 A,

V

DD

Ω

= 25

R

G

V

= 480 V, ID = 7.4 A,

DS

V

GS

= 10 V

(Note 4, 5)

-- 30 70 ns

-- 29 38 nC

µ

A

µ

A

Ω

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 19.5mH, I

3. ISD  7.4A, di/dt  200A/µs, VDD  BV

4. Pulse Test : Pulse width 300µs, Duty cycle 2%

5. Essentially independent of operating temperature

Maximum Continuous Drain-Source Diode Forward Current -- -- 7.4 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 29.6 A

= 0 V, IS = 7.4 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 2.4 --

= 7.4A, VDD = 50V, RG = 25

AS

Ω,

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = 7.4 A,

V

GS

/ dt = 100 A/µs

dI

F

(Note 4)

-- -- 1.4 V

-- 320 -- ns

µ

Rev. A, April 2000

C

Typical Characteristics

V

GS

Top : 15.0 V

10.0 V

8.0 V

1

10

7.5 V

7.0 V

6.5 V

6.0 V Bottom : 5.5 V

0

FQB7N60 / FQI7N60

10

, Drain Current [A]

D

I

-1

10

-1

10

0

10



Notes :

1. 250s Pulse Test



= 25

2. T

C

1

10

VDS, Drain-Source Voltage [V]

1

10

0

10

, Drain Current [A]

D

I

-1

10

246810



150



25

VGS, Gate-Source Voltage [V]



Notes :

= 50V

1. V



-55

DS

2. 250s Pulse Test

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

2.5

2.0

VGS = 10V

VGS = 20V

],

1.5



[

1.0

DS(ON)

R

0.5

Drain-Source On-Resistance

0.0 0 5 10 15 20 25

ID, Drain Current [A]



Note : T

1

10



= 25

J

0

10

, Reverse Drain Current [A]

DR

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2



150

VSD, Source-Drain voltage [V]



25

Notes :

= 0V

1. V

GS

2. 250s Pulse Test

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

2000

1600

1200

800

Capacitance [pF]

400

0

-1

10

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Ch a ra ct eristics

C C C

C

iss

C

oss

C

rss

0

10

VDS, Drain-Source Voltage [V]

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

oss

gd

= C

rss

gd



Notes :

= 0 V

1. V

GS

2. f = 1 M H z

1

10

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

12

10

8

6

4

, Gate- Source Voltage [V]

2

GS

V

0

0 5 10 15 20 25 30 35

QG, Total Gate Charge [nC]

VDS = 120V

VDS = 300V

VDS = 480V



Note : I

= 7.4A

D

Rev. A, April 2000

FQB7N60 / FQI7N60

Typical Characteristics

1.2

1.1

1.0

, (Normalized)

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

TJ, Junction Temperature [oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

2

10

1

10

0

10

, Drain Current [A]

D

I

-1

10

0

10

VDS, Drain-Source Voltage [V]

Operation in This Area is Limited by R



Notes :

= 25 oC

1. T

C

= 150 oC

2. T

J

3. Single Pulse

1

10

DS(on)

(Continued)



Notes :

1. V

2. ID = 250 A

1 ms

10 ms

DC

2

10

= 0 V

GS

100 µs

3.0

2.5

2.0

1.5

, (Normalized)

1.0

DS(ON)

R

Drain-Source On-Resistance

0.5

0.0

-100 -50 0 50 100 150 200



1. V

2. I

Notes :

D

= 10 V

GS

= 3.7 A

TJ, Junction Temperature [oC]

Figure 8. On-Resistance Variation

vs. Temperature

8

6

3

10

4

, Drain Current [A]

2

D

I

0

25 50 75 100 125 150

TC, Case Temperature []

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

(t), Thermal R esponse



Z

vs. Case Temperature

0

10

D=0.5



0.2

-1

0.1

10

0.05

0.02

JC

0.01

-2

10

-5

10

single pulse

-4

10

-3

10

-2

10

Notes :

1. Z

(t) = 0 .8 8 /W M a x .



JC

2. D u t y F a c t o r , D = t

3. TJM - TC = PDM * Z

P

DM

t

1

t

2

-1

10

1/t2

(t)



JC

0

1

10

t1, S q u a re W a v e P uls e D u ra tio n [s e c]

Figure 11. Transient Thermal Response Cur ve

Rev. A, April 2000

Gate Charge Test Circuit & Waveform

V

GS

DS

GS

10V

Q

g

Q

gs

Q

gd

Charge

Same Type



50K

200nF

12V

200nF

300nF

FQB7N60 / FQI7N60

V

GS

3mA

Same Type

as DUT

DUT

V

Resistive Switching Test Circuit & Waveforms

R

L

10V

DUT

L

V

DD

V

DS

V

GS

R

G

V

DS

90%

10%

V

GS

t

d(on)tr

t

on

t

d(off)

t

f

t

off

R

G

10V

t

p

Unclamped Inductive Switching Test Circuit & Waveforms

L

V

LL

V

DS

BV

DSS

V

DSS

I

DD

AS

I

IDI

D

V

DD

DUT

1

----

E

=LI

E

=LI

AS

2

AS

(t)

I

D

t

p

BV

DSS

--------------------

-------------------BV

BV

DSS-VDD

Time

V

(t)

V

(t)

DS

Rev. A, April 2000

Peak Diode Recovery dv / dt Test Circuit & Waveforms

+

DUT

I

SD

Driver

R

G

V

GS

+

V

DS

_

L

LL

Same Type

as DUT

• dv/dt controlled by R

•ISDcontrolled by pulse period

G

FQB7N60 / FQI7N60

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

IFM, Body Diode Forward Current

I

RM

Body Diode Reverse Current

Body Diode Recoverydv/dt

V

SD

Body Diode

Forward Voltage Drop

di/dt

10V

V

DD

Rev. A, April 2000

Package Dimensions

D2PAK

4.50 ±0.20

1.30

+0.10 –0.05

(0.40)

9.90

±0.20

FQB7N60 / FQI7N60

1.20 ±0.20

0.10 ±0.15

2.40 ±0.20

0°~3°

+0.10

0.50

–0.05

2.54 ±0.30

1.40 ±0.20

1.27

±0.10

0.80 ±0.10

2.54 TYP 2.54 TYP

9.20 ±0.20

2.00 ±0.10

15.30 ±0.30

4.90 ±0.20

(0.75)

10.00 ±0.20 (8.00) (4.40)

10.00 ±0.20

15.30 ±0.30

(1.75)

(2XR0.45)

(7.20)

9.20 ±0.20

4.90 ±0.20

0.80 ±0.10

Rev. A, April 2000

Package Dimensions

FQB7N60 / FQI7N60

(Continued)

I2PAK

9.90 ±0.20

(0.40)

(1.46)

(0.94)

1.27 ±0.10 1.47 ±0.10

13.08 ±0.20

(45°)

0.80 ±0.10

2.54 TYP2.54 TYP

1.20 ±0.20

9.20 ±0.20

MAX 3.00

10.08 ±0.20 MAX13.40

0.50

4.50 ±0.20

+0.10 –0.05

+0.10

1.30

–0.05

2.40 ±0.20

10.00 ±0.20

Rev. A, April 2000

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™

2

E

CMOS™ FACT™ FACT Quiet Series™

®

FAST FASTr™ GTO™

HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench

®

QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6

SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL.

As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production This datasheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Datasheet FQI7N60, FQB7N60 Datasheet (Fairchild Semiconductor)

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Frequently Asked Questions

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