Datasheet FDR836P Datasheet (Fairchild Semiconductor)

Page 1
FDR836P
P-Channel 2.5V Specified MOSFET
FDR836P
April 1999
General Description
SuperSOT field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to mini­mize on-state resistance and provide superior switch­ing performance. These devices are particularly suited for low voltage applications such as battery powered circuits or portable electronics where low in-line power loss, fast switching and resistance to transients are needed.
Absolute Maximum Ratings
TM
-8 P-Channel enhancement mode power
S
D
D
S
G
SuperSOT -8
TM
D
D
D
TA = 25°C unless otherwise noted
Features
-6.1 A, -20 V. R
R
High density cell design for extremely low R
= 0.030 W @ VGS = -4.5 V
DS(ON)
= 0.040 W @ VGS = -2.5 V
ON)
DS(
DS(ON)
.
Small footprint (38% smaller than a standard SO-8); low
profile package (1 mm thick); power handling capability similar to SO-8.
5
6
7 8
4
3 2 1
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
stg
Drain-Source Voltage -20 V Gate-Source Voltage Drain Current - Continuous
(Note 1a)
8V
±
-6.1 A
- Pulsed -18
Power Dissipation for Single Operation
(Note 1a) (Note 1b)
(Note 1c)
1.8 W
1.0
0.9
Operating and Storage Junction Temperature Range -55 to +150
Thermal Characteristics
R
JA
θ
R
JC
θ
Thermal Resistance, Junction-t o-Amb i ent Thermal Resistance, Junction-t o-Case
(Note 1a) (Note 1)
70 20
Package Outlines and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
836P
.
ã1999 Fairchild Semiconductor Corporation
FDR836P 13’’ 12mm 3000 units
C
°
C/W
°
C/W
°
FDR836P, Rev. C
Page 2
FDR836P
yp
)
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min T Off Characteristics
BV
DSS
BV
T
I
DSS
I
GSSF
I
GSSR
On Characteristics
V
GS(th)
GS(th)
V
T
R
DS(on)
I
D(on)
g
FS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA-20 V
DSS
Breakdown Voltage Temperature Coefficient
J
ID= -250 µA, Referenced to 25°C-24mV/
Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 Gate-Body Leakage Current, Forward VGS = 8 V, VDS = 0 V 100 nA Gate-Body Leakage Current, Reverse VGS = -8 V, VDS = 0 V -100 nA
(Note 2)
Gate Threshold Voltage VDS = VGS, ID = -250 µA-0.4-0.6-1V Gate Threshold Voltage
Temperature Coefficient
J
Static Drain-Source On-Resistance
ID = -250 µA, Referenced to 25°C3mV/
VGS = -4.5 V, ID = -6.1 A V
= -4.5V, ID =-6.1 A,TJ=125°C
GS
V
= -2.5 V, ID = -5 A
GS
On-State Drain Current VGS = -4.5 V, VDS = -5 V -9 A Forward Transconductance VDS = -5 V, ID = -6.1A 22 S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 2200 pF Output Capacitance 570 pF
= -25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
Reverse Transfer Capacitance
Max Units
0.030
0.022
0.048
0.031
0.040
0.029
140 pF
C
°
A
µ
C
°
(Note 2)
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q
g
gs
gd
Turn-On Delay Time 10 18 ns Turn-On Rise Time 14 25 ns Turn-Off Delay Time 225 360 ns Turn-Off Fall Time Total Gate Charge 32 44 nC Gate-Source Charge 3.2 nC Gate-Drain Charge
V
= -10 V, ID = -1 A,
DD
V
= -4.5 V, R
GS
= -10 V, ID = -6.1 A,
V
DS
V
= - 4.5 V
GS
GEN
= 6
Drain-Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
surface of the drain Pins. R
Maximum Continuous Drain-Source Diode Forward Current -1.5 A Drain-Source Diode Forward Voltage V
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting
qJA
is guaranteed by design while R
qJC
a) 70°C/W when mounted on a
1.0 in2 pad of 2 oz. copper.
qCA
= 0 V, I
is determined by the user's board design.
= -1.5 A
b) 125°C/W when mounted on a
0.026 in2 pad of 2oz. copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%
(Note 2
85 135 ns
8.1 nC
-0.65 -1.2 V
c) 135°C/W when mounted on a minimum pad.
FDR836P, Rev. C
Page 3
T ypical Characteristics
FDR836P
20
VGS = -4.5V
16
-3.0V
12
8
4
, DRAIN-SOURCE CURRENT (A)
D
-I
0
00.511.522.53
-2.5V
-
-1.5V
, DRAIN-SOURCE VOLTAGE (V)
-V
DS
Figure 1. On-Region Characteristics.
1.6 ID = -6.1A
= -4.5V
V
GS
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
, JUNCTION TEMPERATURE (oC)
T
J
2
1.8
1.6 VGS = -2.0V
1.4
, NORMALIZED
1.2
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.8
048121620
-2.5V
-3.0V
, DIRAIN CURRENT (A)
-I
D
-3.5V
-4.0V
-4.5V
Figure 2. On-Resistance Variation
with Drain Current and Gate V oltage.
0.1
0.08
0.06
0.04
, ON-RESISTANCE (OHM)
0.02
DS(ON)
R
0
12345
, GATE TO SOURCE VOLTAGE (V)
-V
GS
TA = 125oC
TA = 25oC
ID = -3 A
Figure 3. On-Resistance Variation
with Temperature.
20
VDS = -5V
16
12
8
, DRAIN CURRENT (A)
D
-I
4
0
00.511.522.5
-V
, GATE TO SOURCE VOLTAGE (V)
GS
TA = -55oC
25oC
125oC
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
100
VGS = 0V
10
1
TA = 125oC
0 0.2 0.4 0.6 0.8 1 1.2
-V
SD,
25oC
-55oC
BODY DIODE FORWARD VOLTAGE (V)
, REVERSE DRAIN CURRENT (A)
S
-I
0.1
0.01
0.001
0.0001
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward V oltage
Variation with Source Current
and Temperature.
FDR836P, Rev. C
Page 4
Typical Characteristics (continued)
FDR836P
5
ID = -6.1A VDS = -5V
4
3
-15V
-10V
4000
3000
2000
C
ISS
2
CAPACITANCE (pF)
1
, GATE-SOURCE VOLTAGE (V)
GS
-V
0
0 5 10 15 20 25 30 35 40
Q
, GATE CHARGE (nC)
g
1000
C
OSS
C
0
RSS
0 5 10 15 20 25 30
, DRAIN TO SOURCE VOLTAGE (V)
-V
DS
Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
, DRAIN CURRENT (A)
D
-I
10
1
0.1
LIMIT
DS(ON)
VGS= -4.5V
SINGLE PULSE
= 135oC/W
R
JA
θ
o
TA = 25
C
100ms
1s
10s
DC
10ms
1ms
100µs
0.01
0.1 1 10 100
, DRAIN-SOURCE VOLTA GE ( V )
-V
DS
50
SINGLE PULSE R
JA
40
θ
=
30
20
POWER (W)
10
0
0.0001 0.001 0.01 0.1 1 10 100 1000
SINGLE PULSE TIME (SEC)
f = 1 MHz V
=135oC/W
o
GS
= 0 V
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.5
0.3
0.2
0.2
0.1
0.1
0.05
0.03
r(t), NORMALIZED EFFECTIVE
0.02
TRANSIENT THERMAL RESISTANCE
0.01
0.05
0.02
0.01 Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300 t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R = 135
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cyc le, D = t / t
°C/W
JA
θ
1
JA
θ
2
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design.
FDR836P, Rev. C
Page 5
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging Configuration: Figure 1.0
Customized Label
F63TNR Label
Emboss ed Carrier Tape
Antistatic Cover Tape
Static Dissi pative
852
F
831N
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssipative (carbon filled) po lycarbonate resin. The cov er tap e is a mu lt ilayer film (Heat Act ivat ed Adhesiv e in nat ure) prim aril y c omp osed of po lyes ter film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standar d option are ship ped wi th 3,000 u n i t s pe r 13" or 33 0c m dia m eter r e el . The re el s ar e dark blue in color and is made of poly st yr ene plas t ic (anti­static c oated). Other option comes in 500 units per 7" or 177c m diam eter reel. This and s ome o ther opt ion s are furth er described in the Packaging Information table.
These full reels are in di vidu al ly barcode labeled and placed in side a standard intermediat e box (illus trated in figur e 1.0) made of recyclable c orrugated brow n paper. One box cont ains t wo reels maxi mum. And t hese bo xes are placed ins ide a barc ode labeled shipp ing bo x whic h co m e s i n di f f er e n t si z es depe nd in g on t he nu m b e r of part s sh i ppe d.
852
852
F
831N
F
831N
852
F
831N
852
F
831N
Pin 1
SSOT-8 Packaging Information
Packaging Option Packaging type
Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)
Note/Comments
184mm x 187mm x 47mm
Stan dard
(no flow c ode )
3,000 500
13" Dia
343x64x343 184x187x47
6,000 1,000
0.0416 0.0416
0.5615 0.0980
TNR
D84Z
TNR
7" Dia
F63TNR Label
Pizza Box for D84Z Option
SSOT-8 Tape Leader and Trailer Configuration: Figur e 2.0
F63TNR Label
SSOT-8 Unit Orientation
343mm x 342mm x 64mm
Inter mediate box for Standar d
and L 99Z Options
F63TNR Label sampl e
LOT: CBVK7 41B019
FSID: FDR835N
D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:
F63TNR Label
QTY: 3000
SPEC:
N/F: F (F63TNR)3
Carrier Tape
Cover Tape
Tr ailer Tape 300mm mi n i mum or 38 empty pock ets
Components
Leader Tape 500mm mi n i mum or 62 empty pocket s
August 1999, Rev. C
Page 6
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape Configuration: Figur e 3.0
T
K0
Wc
B0
P0
D0
E1
F
W
E2
Tc
A0
P1
D1
User Direction of Feed
Dimensions are in millimeter
Pkg type
SSOT-8
(12mm)
Notes: A0, B0, and K0 dimensions are determined with r espect to t he EIA/Jedec RS-481
SSOT-8 Reel Configuration: Figur e 4.0
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
4.47
5.00
12.0
1.55
1.50
1.75
10.25
+/-0.10
+/-0.10
+/-0.3
+/-0.05
+/-0.10
+/-0.10
5.50
min
+/-0.05
rotationa l and lateral movement requi remen ts (see sketches A, B, and C).
20 deg maximum
Typical component cavity center line
Typical component center line
A0
Dim A
Max
20 deg maximum component rotation
Sketc h A (Side or Front Section al View)
Component Rotation
B0
Sketc h B (Top View)
Component Rotation
W1 Measured at Hub
8.0 +/-0.1
4.0 +/-0.1
1.37
0.280 +/-0.150
9.5 +/-0.025
0.5mm maximum
+/-0.10
0.5mm maximum
Sketc h C (Top View)
Component lateral movement
0.06 +/-0.02
Dim A
max
13" Diameter Option
Tape Size
12mm 7" Dia
12mm 13" Dia
1998 Fairchild Semiconductor Corporation
Reel
Option
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
7.00
177.8
13.00 330
0.059
1.5
0.059
1.5
Dim N
See detail AA
W3
W2 max Measured at Hub
Dimensions are in inches and millimeters
512 +0.020/-0.008 13 +0.5/-0.2
512 +0.020/-0.008 13 +0.5/-0.2
0.795
20.2
0.795
20.2
5.906 150
7.00 178
Dim D
min
0.488 +0.078/-0.000
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
Diameter Option
7"
DETAIL AA
0.724
18.4
0.724
18.4
See detail AA
B Min
Dim C
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
July 1999, Rev. C
Page 7
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOT-8 (FS PKG Code 34, 35)
1 : 1
Scale 1:1 on letter size paper
Dimensio ns shown below are in:
inches [mil lime ters ]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™
2
CMOS
E
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench
QFET™ QS™
Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8
SyncFET™ TinyLogic™ UHC™ VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. D
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