Page 1
tm
FDP5N50 / FDPF5N50T
D
G
S
TO-220F
FDPF Series
G
S
D
TO-220
FDP Series
G D S
N-Channel MOSFET
500V, 5A, 1.4Ω
FDP5N50 / FDPF5N50T N-Channel MOSFET
May 2012
TM
UniFET
Features
•R
• Low gate charge ( Typ. 11nC)
• Low C
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS compliant
MOSFET Maximum Ratings T
V
DSS
V
GSS
I
D
I
DM
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
P
D
, T
T
J
T
L
*Drain current limited by maximum junction temperature
= 1.15Ω ( Typ.)@ VGS = 10V, ID = 2.5A
DS(on)
( Typ. 5pF)
rss
o
= 25
C unless otherwise noted*
C
Symbol Parameter FDP5N50 FDPF5N50 Units
Drain to Source Voltage 500 V
Gate to Source Voltage ±30 V
-Continuous (T
-Continuous (T
(T
= 25oC) 85 28 W
C
- Derate above 25
STG
Drain Current
Drain Current - Pulsed (Note 1) 20 20* A
Single Pulsed Avalanche Energy (Note 2) 225 mJ
Avalanche Current (Note 1) 5 A
Repetitive Avalanche Energy (Note 1) 8.5 mJ
Power Dissipation
Operating and Storage Temperature Range -55 to +150
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pluse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power suppliesand active power
factor correction.
= 25oC) 5 5*
C
= 100oC) 3 3*
C
o
C 0.67 0.22 W/oC
300
o
o
Thermal Characteristics
Symbol Parameter FDP5N50 FDPF5N50 Units
R
θJC
θCS
R
θJA
Thermal Resistance, Junction to Case 1.4 4.5
Thermal Resistance, Case to Sink Typ. 0.5 Thermal Resistance, Junction to Ambient 62.5 62.5
o
C/WR
A
C
C
©2012 Fairchild Semiconductor Corporation
FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com1
Page 2
FDP5N50 / FDPF5N50T N-Channel MOSFET
Package Marking and Ordering Information T
= 25oC unless otherwise noted
C
Device Marking Device Package Reel Size Tape Width Quantity
FDP5N50 FDP5N50 TO-220 - - 50
FDPF5N50T FDPF5N50T TO-220F - - 50
Electrical Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Dynamic Characteristics
C
iss
C
oss
C
rss
Q
g(tot)
Q
gs
Q
gd
Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V, TJ = 25oC 500 - - V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Body Leakage Current VGS = ±30V, V
I
= 250μA, Referenced to 25oC-0.6-V/
D
V
= 500V, V
DS
= 400V, TC = 125oC--10
V
DS
= 0V - - 1
GS
= 0V - - ±100 nA
DS
Gate Threshold Voltage VGS = VDS, ID = 250μA3.0-5.0V
Static Drain to Source On Resistance VGS = 10V, ID = 2.5A - 1.15 1.4 Ω
Forward Transconductance VDS = 20V , ID = 2.5A (Note 4) -4.3-S
Input Capacitance
Output Capacitance - 66 88 pF
Reverse Transfer Capacitance - 5 8 pF
= 25V, VGS = 0V
V
DS
f = 1MHz
Total Gate Charge at 10V
V
= 400V, ID = 5A
Gate to Source Gate Charge - 3 - nC
Gate to Drain “Miller” Charge - 5 - nC
DS
V
= 10V
GS
(Note 4, 5)
- 480 640 pF
-1115nC
μA
o
C
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Turn-On Rise Time - 22 54 ns
Turn-Off Delay Time - 28 66 ns
Turn-Off Fall Time - 20 50 ns
Drain-Source Diode Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1: Repetitive Rating: Pulse width limited by maximum junction temperature
2: L = 18mH, I
3: I
≤ 5A, di/dt ≤ 200A/μs, VDD ≤ BV
SD
4: Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%
5: Essentially Independent of Operating Temperature Typical Characteristics
Maximum Continuous Drain to Source Diode Forward Current - - 5 A
Maximum Pulsed Drain to Source Diode Forward Current - - 20 A
Drain to Source Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge - 1.8 - μC
= 5A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
AS
, Starting TJ = 25°C
DSS
= 250V, ID = 5A
V
DD
R
= 25Ω
G
(Note 4, 5)
= 0V, I
GS
V
= 0V, I
GS
dI
/dt = 100A/μs (Note 4)
F
= 5A - - 1.4 V
SD
= 5A
SD
-1336ns
- 300 - ns
2FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 3
Typical Performance Characteristics
0.1 1 10
0.1
1
10
30
0.04
*Notes:
1. 250
μs Pulse Test
2. T
C
= 25oC
V
GS
= 15.0V
10.0V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
I
D
,Drain Current[A]
VDS,Drain-Source Voltage[V]
20
45678
0.1
1
10
-55oC
150oC
*Notes:
1. V
DS
= 20V
2. 250
μs Pulse Test
25oC
I
D
,Drain Current[A]
VGS,Gate-Source Voltage[V]
20
036912
1.0
1.5
2.0
2.5
3.0
*Note: TJ = 25oC
VGS = 20V
VGS = 10V
R
DS(ON)
[Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
0.40.81.21.6
1
10
*Notes:
1. VGS = 0V
2. 250
μs Pulse Test
150oC
I
S
, Reverse Drain Current [A]
VSD, Body D iode Forward V oltage [V]
25oC
70
0.1 1 10
0
250
500
750
1000
C
oss
C
iss
C
iss
= Cgs + Cgd (Cds = shorted)
C
oss
= Cds + C
gd
C
rss
= C
gd
*Note:
1. V
GS
= 0V
2. f = 1MH z
C
rss
Capacitances [pF]
VDS, Drain-Source Voltage [V ]
30
04812
0
2
4
6
8
10
*Note: ID = 5A
VDS = 100V
V
DS
= 250V
V
DS
= 400V
V
GS
, Gate-Source Voltage [V]
Qg, Total Ga te C harge [nC]
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
FDP5N50 / FDPF5N50T N-Channel MOSFET
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
3FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 4
Typical Performance Characteristics (Continued)
-75 -25 25 75 125 175
0.8
0.9
1.0
1.1
1.2
*Notes:
1. V
GS
= 0V
2. I
D
= 250μA
BV
DSS
, [Normalized]
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
-75 -25 25 75 125 175
0.5
1.0
1.5
2.0
2.5
3.0
*Notes:
1. V
GS
= 10V
2. I
D
= 2.5A
R
DS(on)
, [Normalized]
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
110100
0.01
0.1
1
10
800
30
30μs
100μs
1ms
10ms
I
D
, Drain Current [A]
VDS, Drain-Source Voltage [V]
Operation in This Area
is Limited by R
DS(on)
*Notes:
1. T
C
= 25oC
2. T
J
= 150oC
3. Single Pulse
DC
110100
0.01
0.1
1
10
800
30μs
100μs
1ms
10ms
I
D
, Drain Current [A]
VDS, Drain-Source Voltage [V]
Operation in This Area
is Limited by R
DS(on)
*Notes:
1. T
C
= 25oC
2. T
J
= 150oC
3. Single Pulse
DC
30
25 50 75 100 125 150
0
1
2
3
4
5
6
I
D
, Drain Current [A]
TC, Case Temperature [oC]
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Safe Operating Area
- FDP5N50 - FDPF5N50T
FDP5N50 / FDPF5N50T N-Channel MOSFET
Figure 11. Maximum Drain Current
vs. Case Temperature
4FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 5
Typical Performance Characteristics (Continued)
t
1
P
DM
t
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
0.01
0.1
1
0.01
0.1
0.2
0.05
0.02
*Notes:
1. Z
θJC
(t) = 1.4oC/W Max.
2. Duty Factor, D= t
1/t2
3. TJM - TC = PDM * Z
θJC
(t)
0.5
Single pulse
Thermal Response [Z
θJC
]
Rectangular Pulse Duration [sec]
3
t
1
P
DM
t
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
0.01
0.1
1
10
0.01
0.1
0.2
0.05
0.02
*Notes:
1. Z
θJC
(t) = 4.5oC/W Max.
2. Duty Fact or, D= t
1/t2
3. TJM - TC = PDM * Z
θJC
(t)
0.5
Single pulse
Thermal Response [Z
θJC
]
Rectangular Pulse Duration [sec]
t
1
P
DM
t
2
Figure 12. Transient Thermal Response Curve - FDP5N50
FDP5N50 / FDPF5N50T N-Channel MOSFET
Figure 13. Transient Thermal Response Curve
- FDPF5N50T
5FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 6
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDP5N50 / FDPF5N50T N-Channel MOSFET
6FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 7
DUT
V
DS
+
_
Driver
R
G
Same Type
as DUT
V
GS
• dv/dt controlled by R
G
•ISDcontrolled by pulse period
V
DD
L
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
IFM, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recoverydv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
V
DS
+
_
Driver
R
G
Same Type
as DUT
V
GS
• dv/dt controlled by R
G
•ISDcontrolled by pulse period
V
DD
LL
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
IFM, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recoverydv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
FDP5N50 / FDPF5N50T N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
7FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 8
Mechanical Dimensions
TO-220
FDP5N50 / FDPF5N50T N-Channel MOSFET
8FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 9
Package Dimensions
FDP5N50 / FDPF5N50T N-Channel MOSFET
TO-220F Potted
* Front/Back Side Isolation Voltage : AC 2500V
Dimensions in Millimeters
9FDP5N50 / FDPF5N50T Rev. C0
www.fairchildsemi.com
Page 10
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®
™
tm
tm
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intended to be an exhaustive list of all such trademarks.
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
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WHICH COVERS THESE PRODUCTS.
FDP5N50 / FDPF5N50T N-Channel MOSFET
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or su stain life,
and (c) whose failure to perform when properly used in accordan ce with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
ANTI-COUNTERFEITING POLICY
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Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Pro duction
Obsolete Not In Production
FDP5N50 / FDPF5N50T Rev. C0 www.fairchildsemi.com
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementa ry data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
10
Rev. I61
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