Datasheet FDP61N20 Datasheet (Fairchild)

Page 1

FDP61N20

D

200V N-Channel MOSFE T

FDP61N20 200V N-Channel MOSF ET
September 2005
TM
UniFET
• 61A, 200V, R
• Low gate charge ( typical 58 nC)
• Low C
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
( typical 80 pF)
rss
= 0.041Ω @VGS = 10 V
DS(on)
G
D
S
TO-220
FCP Series
Description
These N-Channel enhancement mode power field effect transis­tors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to mini­mize on-state resistance, provide superior switching perfor­mance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high effi­cient switched mode power supplies and active power factor correction.
{
{
z
z
z
{
{
G
z z
z
{
{
S
Absolute Maximum Ratings
Symbol Parameter FDP61N20 Unit
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
T
J, TSTG
T
L
Drain-Source Voltage 200 V Drain Current - Continuous (TC = 25°C)

- Continuous (T Drain Current - Pulsed Gate-Source voltage ±30 V Single Pulsed Avalanche Energy Avalanche Current (Note 1) 61 A Repetitive Avalanche Energy (Note 1) 41.7 mJ

Power Dissipation (TC = 25°C)

- Derate above 25°C Operating and Storage Temperature Range -55 to +150 °C Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds
= 100°C)
C
(Note 1)
(Note 2)

(Note 3) 4.5 V/ns

61
38.5 244 A

1440 mJ

417
3.3
300 °C
A A
W

W/°C

Thermal Characteristics
Symbol Parameter Min. Max. Unit
R
θJC
R
θJA
©2005 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDP61N20 Rev. A

Thermal Resistance, Junction-to-Case -- 0.3 °C/W Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

Page 2
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity

FDP61N20 FDP61N20 TO-220 - - 50

FDP61N20 200V N-Channel MOSF ET
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Conditions Min. Typ. Max Units
Off Characteristics
BV
DSS
∆BV / ∆T
I
DSS
I
GSSF
I
GSSR
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Dynamic Characteristics
C
iss
C
oss
C
rss
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 200 -- -- V Breakdown Voltage Temperature
DSS
Coefficient
J
Zero Gate Voltage Drain Current VDS = 200V, VGS = 0V
I
= 250µA, Referenced to 25°C--0.2--V/°C
D
V
= 160V, TC = 125°C
DS
--
--
--
--
1
10
µA µA

Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA

Gate Threshold Voltage VDS = VGS, ID = 250µA3.0--5.0V Static Drain-Source
On-Resistance Forward Transconductance VDS = 40V, ID =30.5A
Input Capacitance VDS = 25V, VGS = 0V, Output Capacitance -- 645 840 pF

= 10V, ID = 30.5A -- 0.034 0.041 Ω

V
GS
(Note 4)

-- 44.5 -- S

-- 2615 3380 pF

f = 1.0MHz
Reverse Transfer Capacitance -- 80 120 pF
Turn-On Delay Time VDD = 100V, ID = 61A
= 25Ω
R
Turn-On Rise Time -- 215 440 ns
G
-- 40 90 ns
Turn-Off Delay Time -- 125 260 ns Turn-Off Fall Time -- 1 7 0 350 ns Total Gate Charge VDS = 160V, ID = 61A
= 10V
V
Gate-Source Charge -- 19 -- nC
GS
Gate-Drain Charge -- 24 -- nC
(Note 4, 5)
-- 58 75 nC
(Note 4, 5)
Maximum Continuous Drain-Source Diode Forward Current -- -- 61 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 244 A Drain-Source Diode Forward Voltage VGS = 0V, IS = 61A -- -- 1.4 V Reverse Recovery Time VGS = 0V, IS = 61A
/dt =100A/µs (Note 4)
dI
Reverse Recovery Charge -- 1.5 -- µC
F
-- 162 -- ns
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 0.58mH, IAS = 61A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3. ISD ≤ 61A, di/dt ≤ 200A/µs, VDD ≤ BV
4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
, Starting TJ = 25°C
DSS
FDP61N20 Rev. A
2 www.fairchildsemi.com
Page 3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
V Top : 1 5.0 V
2
10.0 V
10
8.0 V
7.0 V
6.5 V
6.0 V Bottom : 5.5 V
GS
2
10
FDP61N20 200V N-Channel MOSF ET
1
10
, Drain Current [A]
D
I
? Notes :
1. 250 Pulse Test
탎
0
10
-1
10
0
10
2. TC = 25?
1
10
VDS, Drain-Source Voltage [V]
1
10
, Drain Current [A]
D
I
10
150oC
25oC
-55oC
0
24681012
? Notes :
1. V
= 40V
DS
탎
2. 250 Pulse Test
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
0.06
0.05
0.04
0.03
[O ], Drain-Source O n-Resist ance
DS(ON)
R
0.02 0 255075100125150
VGS = 10V
VGS = 20V
? Note : TJ = 25
ID, Drain C u r rent [A]
2
10
1
10
, Reverse Drain Current [A]
DR
I
0
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
150?
25?
VSD, Source-Drain voltage [V]
? Notes :
= 0V
1. V
GS
2. 250 Pulse Test
탎
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
6000
4000
2000
Capacitances [pF]
0
-1
10
FDP61N20 Rev. A
C
oss
C
iss
C
rss
0
10
VDS, Drain-Sourc e Voltage [V]
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
gd
C
= C
rss
gd
? Note ;
1. V
2. f = 1 MH z
1
10
12
10
8
= 0 V
GS
6
4
, Gate-Source Voltage [V]
2
GS
V
0
0 102030405060
VDS = 40V VDS = 100V VDS = 160V
? Note : ID = 61A
QG, Total Gate Charge [nC]
3 www.fairchildsemi.com
Page 4
Typical Perfor mance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
1.2
3.0
FDP61N20 200V N-Channel MOSF ET
1.1
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-100 -50 0 50 100 150 200
Notes :
※
1. VGS = 0 V
2. I
TJ, Junction Temperature [oC]
= 250 µ A
D
2.5
2.0
1.5
, (Normalized)
1.0
DS(ON)
R
0.5
Drain-Source On-Resistance
0.0
-100 -50 0 50 100 150 200
TJ, Junction Temperature [oC]
? Notes :
1. V
GS
2. I
= 30.5 A
D
= 10 V
Figure 9. Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature
, Drain Current [A]
D
I
3
10
2
10
1
10
10
10
10
Operation in This Area is Limited by R
0
-1
-2 0
10
1 ms
10 ms
100 ms
DC
DS(on)
? Notes :
1. T
2. T
3. Single Pulse
1
10
VDS, Drain-Source Voltage [V]
100 µs
= 25 oC
C
= 150 oC
J
10
70
10 µs
2
60
50
40
30
, Drain Current [A]
20
D
I
10
0
25 50 75 100 125 150
TC, Case Temperature [? ]
Figure 11. Transient Thermal Response Curve
D=0.5
-1
10
0.2
0.1
0.05
-2
0.02
10
(t), Thermal Response Z
FDP61N20 Rev. A
0.01
?JC
sin g le p u ls e
-5
10
-4
10
t1, Square W ave Pulse Duration [sec]
P
DM
t
1
t
? Notes :
1. Z
2. D u ty F a c to r, D = t
3. TJM - TC = PDM * Z
-3
10
-2
10
10
2
(t) = 0.3 ? /W Max .
?JC
-1
1/t2
(t)
?JC
0
10
1
10
4 www.fairchildsemi.com
Page 5
12V
12V
200nF
200nF
3mA
3mA
50K
50K
FDP61N20 200V N-Channel MOSF ET
Gate Charge Test Circuit & Waveform
V
V
GS
DS
DS
GS
10V
10V
Q
Q
g
g
Q
Q
gs
gs
Q
Q
gd
gd
Charge
Charge
Same Type
Ω
Ω
300nF
300nF
V
V
GS
GS
Same Type
as DUT
as DUT
DUT
DUT
V
V
Resistive Switching Test Circuit & Waveforms
10V
10V
10V
10V
R
R
L
DUT
DUT
L
V
V
DD
DD
V
V
DS
DS
V
V
GS
GS
R
R
G
G
V
V
DS
DS
90%
90%
10%
10%
V
V
GS
GS
t
t
d(on)tr
d(on)tr
t
t
on
on
t
t
d(off)
d(off)
t
t
f
f
t
t
off
off
Unclamped Inductive Switching Test Circuit & Waveforms
BV
BV
DSS
L
LL
V
V
DS
DS
BV
BV
DSS
V
V
DSS
I
I
AS
AS
DD
DD
I
IDI
D
D
R
R
G
G
DUT
DUT
t
t
p
p
V
V
DD
DD
1
1
1
1
----
----
----
----
E
=LI
E
=LI
=LI
E
AS
AS
AS
2
2
2
2
2
2
2
AS
AS
AS
(t)
(t)
I
I
D
D
t
t
p
p
DSS
--------------------
-------------------­BV
BV
DSS-VDD
DSS-VDD
Time
Time
V
(t)
V
(t)
DS
DS
FDP61N20 Rev. A
5 www.fairchildsemi.co m
Page 6
Peak Diode Recovery dv /dt Test Circuit & Waveforms
+
DUT
DUT
I
I
SD
SD
Driver
Driver
R
R
G
G
V
V
GS
GS
+
V
V
DS
DS
_
_
L
LL
Same Type
Same Type
as DUT
as DUT
• dv/dt controlled by R
• dv/dt controlled by R
•ISDcontroll ed by pulse period
•ISDcontroll ed by pulse period
G
G
FDP61N20 200V N-Channel MOSF ET
V
V
DD
DD
V
V
GS
GS
( Driver )
( Driver )
I
I
SD
SD
( DUT )
( DUT )
V
V
DS
DS
( DUT )
( DUT )
Gate Pulse Width
Gate Pulse Width
Gate Pulse Width
--------------------------
--------------------------
--------------------------
D =
D =
D =
Gate Pulse Period
Gate Pulse Period
Gate Pulse Period
IFM, Body Diode Forward Current
IFM, Body Diode Forward Current
I
I
RM
RM
Body Diode Reverse Current
Body Diode Reverse Current
Body Diode Recoverydv/dt
Body Diode Recoverydv/dt
V
V
SD
SD
Body Diode
Body Diode
Forward Voltage Drop
Forward Voltage Drop
di/dt
di/dt
10V
10V
V
V
DD
DD
FDP61N20 Rev. A
6 www.fairchildsemi.co m
Page 7
Mechanical Dimensions
FDP61N20 200V N-Channel MOSF ET
TO-220
FDP61N20 Rev. A
Dimensions in Millimeters
7 www.fairchildsemi.com
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ ActiveArray™ Bottomless™
FPS™
Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™
2
E
CMOS™ EnSigna™ FACT™
FACT Quiet Series™
Across the board. Around the world.™ The Power Franchise Programmable Active Droop™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE T O ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PA TENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
®
FAST FAST r™
LittleFET™
FRFET™ GlobalOptoisolator™ GTO™ HiSeC™
2
I
C™ i-Lo™ ImpliedDisconnect™
IntelliMAX™
®
ISOPLANAR™ MICROCOUPLER™
MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC
®
OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™
PowerSaver™ PowerTrench
®
QFET
®
QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ μSerDes™ SILENT SWITCHER SMART ST ART™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6
SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET UniFET™ VCX™
®
Wire™
®
®
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I16
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