Datasheet FDMS3622S Datasheet (Fairchild)

FDMS3622S

Power 56

G1

D1

G2

S2

D1

PHASE (S1/D2)

Top Bottom

Pin 1

PowerTrench® Power Stage

25V Asymmetric Dual N-Channel MOSFET

FDMS3622S PowerTrench

December 2011

Features

Q1: N-Channel

 Max r  Max r

Q2: N-Channel

 Max r  Max r

 Low inductance packaging shortens rise/fall times, resulting in

lower switching losses

 MOSFET integration enables optimum layout for lower circuit

inductance and reduced switch node ringing

 RoHS Compliant

= 5.0 mΩ at VGS = 10 V, ID = 17.5 A

DS(on)

= 5.7 mΩ at VGS = 4.5 V, ID = 16 A

DS(on)

= 1.4 mΩ at VGS = 10 V, ID = 34 A

DS(on)

= 1.6 mΩ at VGS = 4.5 V, ID = 32 A

DS(on)

General Description

This device includes two specialized N-Channel MOSFETs in a dual PQFN package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFET (Q2) have been designed to provide optimal power efficiency.

Applications

 Computing  Communications  General Purpose Point of Load  Notebook VCORE

®

Power Stage

MOSFET Maximum Ratings T

Symbol Parameter Q1 Q2 Units

V

DS

V

GS

I

D

E

AS

P

D

TJ, T

STG

Drain to Source Voltage 25 25 V Gate to Source Voltage (Note 4) ±12 ±12 V Drain Current -Continuous (Package limited) TC = 25 °C 30 70

-Pulsed 70 140 Single Pulse Avalanche Energy (Note 3) 29 145 mJ Power Dissipation for Single Operation TA = 25 °C 2.2 Power Dissipation for Single Operation T Operating and Storage Junction Temperature Range -55 to +150 °C

= 25 °C unless otherwise noted

A

= 25 °C 17.5

A

= 25 °C 1.0

A

1a

1a 1c

34

2.5

1.0

1b

1b 1d

A -Continuous T

W

Thermal Characteristics

R

θJA θJA

R

θJC

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

Thermal Resistance, Junction to Ambient 57 Thermal Resistance, Junction to Ambient 125 Thermal Resistance, Junction to Case 3.0 1.9

08OD 09OD

FDMS3622S Power 56 13 ” 12 mm 3000 units

1a

1c

50

120

1b

1d

°C/WR

FDMS3622S PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Type Min Typ Max Units

Off Characteristics

BV

ΔBV ΔT

I

DSS

I

GSS

DSS

DSS J

= 250 μA, VGS = 0 V

Drain to Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient Zero Gate Voltage Drain Current VDS = 20 V, V

D

I

= 1 mA, VGS = 0 V

D

ID = 250 μA, referenced to 25 °C I

= 10 mA, referenced to 25 °C

D

= 0 V

GS

Gate to Source Leakage Current VGS = 12 V/-8 V, VDS= 0 V

Q1Q225

25

Q1 Q2

V

12 24

500

±100 ±100nAnA

mV/°C

1

I

On Characteristics

V

GS(th)

ΔV ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage Gate to Source Threshold Voltage

Temperature Coefficient

Drain to Source On Resistance

Forward Transconductance

= VDS, ID = 250 μA

GS

V

= VDS, ID = 1 mA

GS

ID = 250 μA, referenced to 25 °C I

= 10 mA, referenced to 25 °C

D

= 10 V, ID = 17.5 A

V

GS

V

= 4.5 V, ID = 16 A

GS

V

= 10 V , ID = 17.5 A,TJ =125 °C

GS

V

= 10 V, ID = 34 A

GS

V

= 4.5 V, ID = 32 A

GS

V

= 10 V, ID =34 A ,TJ =125 °C

GS

V

= 5 V, ID = 17.5 A

DS

V

= 5 V, ID = 34 A

DS

Q1Q20.8

1.1

Q1 Q2

Q1

Q2

Q1 Q2

1.2

1.4

-4

3.8

4.4

5.4

1.1

1.3

1.5

100 272

2.0

2.2 mV/°C

5.0

5.7

7.0

1.4

1.6

2.0

μA μA

V

mΩ

S

®

Power Stage

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g

gs

gd

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Gate Charge V

Gate to Source Gate Charge

Gate to Drain “Miller” Charge

Q1:

= 13 V, VGS = 0 V, f = 1 MHZ

V

DS

Q2:

= 13 V, VGS = 0 V, f = 1 MHZ

V

DS

Q1 Q2

1570 5565

448

1405

61

182

0.4

0.8

pF

Ω

7

14

2 7

23 48

2 6

26 86

12 40

3.3 12

2.7 10

ns

nC

Q1:

= 13 V , ID = 17.5 A, R

V

DD

Q2:

= 13 V, ID = 34 A, R

V

DD

= 0 V to 10 V

GS

= 0 V to 4.5 V

GS

= 6 Ω

GEN

= 6 Ω

GEN

Q1 V

= 13 V,

DD

I

= 17.5 A

D

Q2 VDD = 13 V, I

= 34 A

D

Q1 Q2

FDMS3622S PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Type Min Typ Max Units

Drain-Source Diode Characteristics

0.8

0.8 23

35

43

1.2

9

is determined by

θCA

V

= 0 V, IS = 17.5 A (Note 2)

V

SD

t

rr

Q

rr

Notes:

1.R

is determined with the device mo un ted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. boar d o f FR - 4 mat er i al. R

θJA

the user's board design.

Source to Drain Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

a. 57 °C/W when mounted on

2

a 1 in

pad of 2 oz copper

SS

SF

DS

DF

G

c. 125 °C/W when mounted on a minimum pad of 2 oz copper

GS

V

= 0 V, IS = 34 A (Note 2)Q1Q2

GS

Q1

= 17.5 A, di/dt = 100 A/μs

I

F

Q2 I

= 34 A, di/dt = 300 A/μs

F

DF

DS

G

SF

SS

Q1 Q2

is guaranteed by design while R

θJC

b. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper

d. 120 °C/W when mounted on a minimum pad of 2 oz copper

ns

nC

V

®

Power Stage

SS

SF

DF

DS

G

2 Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

of 29 mJ is based on starting TJ = 25 oC; N-ch: L = 1.2 mH, IAS = 7 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 16 A.

3. Q1 :E

AS

Q2: EAS of 145 mJ is based on starting TJ = 25 oC; N-ch: L = 0.9 mH, IAS = 18 A, VDD = 23 V, VGS = 10 V. 100% test at L= 0.1 mH, IAS = 39 A.

4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.

G

SS

SF

DF

DS

FDMS3622S PowerTrench

0.0 0 .3 0.6 0.9 1.2 1.5

0

10

20

30

40

50

60

70

V

GS

= 2.5 V

V

GS

= 3 V

V

GS

= 10 V

V

GS

= 4.5 V

V

GS

= 3.5 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

I

D

, DRAIN CURRENT (A)

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

0 10203040506070

0.5

1.0

1.5

2.0

2.5

3.0

VGS = 2.5 V

VGS = 4.5 V

VGS = 3 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

I

D

, DRAIN CURRENT (A)

VGS = 3.5 V

V

GS

= 10 V

-75 -50 -25 0 25 50 75 100 125 150

0.6

0.8

1.0

1.2

1.4

1.6

1.8

ID = 17.5 A V

GS

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANC E

T

J

, JUNCTION TEMPERATURE (

o

C)

2345678910

0

4

8

12

16

20

TJ = 125 oC

ID = 17.5 A

TJ = 25 oC

V

GS

, GATE TO SOURCE VOLTA G E (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

0.5 1.0 1.5 2.0 2.5 3.0

0

10

20

30

40

50

60

70

TJ = 150 oC

V

DS

= 5 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

1

10

70

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics (Q1 N-Channel) T

Figure 1.

On Region Characteristics Figure 2.

= 25°C unless otherwise noted

J

Nor ma liz ed O n- Res istan ce

vs Drain Current and Gate Voltage

®

Power Stage

Figure 3. Nor ma li zed On Resistance

vs Junction Temperature

Figure 5. Transfer Characteristics

Figure 4.

On-Resis tance vs Gate to

Source Voltage

Figure 6.

Source to Drai n Diode

Forward Voltage vs Source Current

FDMS3622S PowerTrench

0 4 8 12 16 20 24 28

0

2

4

6

8

10

ID = 17.5 A

V

DD

= 15 V

V

DD

= 10 V

V

GS

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 13 V

0.1 1 10 30

10

100

1000

2000

f = 1 MHz V

GS

= 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

C

rss

C

oss

C

iss

0.001 0.01 0.1 1 10 50

1

10

50

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

I

AS

, AVALANCHE CURRENT (A)

25 50 75 100 125 150

0

10

20

30

40

50

60

70

80

R

θJC

= 3.0 oC/W

V

GS

= 4.5 V

Limited by Package

V

GS

= 10 V

I

D

, DRAIN CURRENT (A)

T

C

, CASE TEMPERATURE (

o

C)

0.01 0.1 1 10 100200

0.01

0.1

1

10

100

100 μs

DC

100 ms

10 ms

1 ms

1s

I

D

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS

LIMITED BY r

DS(on)

SINGLE PULSE T

J

= MAX RATED

R

θJA

= 125

o

C/W

T

A

= 25

o

C

10s

10-410-310-210

-1

110

100 1000

0.5

1

10

100

1000

SINGLE PULSE R

θJA

= 125 oC/W

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

Typical Characteristics (Q1 N-Channel) T

Figure 7.

Gate Charge Characteristics Figure 8.

= 25°C unless otherwise noted

J

Cap aci tan ce v s Dr ain

to Source Voltage

®

Power Stage

Figure 9.

Unc l amp ed I nduc tiv e

Switching Capability

Figure 11. Forward Bias Safe

Op

erating Area

Figure 10.

Ma ximum Cont inuous D rain

Current vs Case Temperature

Figure 12.

Power Dissipation

Si ngle P ulse M aximu m

FDMS3622S PowerTrench

10

-4

10

-3

10

-2

10

-1

110

100 1000

0.001

0.01

0.1

1

2

SINGLE PULSE R

θJA

= 125 oC/W

(Note 1b)

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJA

t, RECTANGULAR PU L SE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

P

DM

t

1

t

2

NOTES: DUTY FACTOR: D = t1/t

2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

Typical Characteristics (Q1 N-Channel) T

Figure 13.

Junction-to-Ambient Transient Thermal Response Curve

= 25°C unless otherwise noted

J

®

Power Stage

FDMS3622S PowerTrench

0.0 0.3 0.6 0.9 1.2 1.5

0

20

40

60

80

100

120

140

V

GS

= 2.5 V

V

GS

= 3 V

V

GS

= 10 V

V

GS

= 4.5 V

V

GS

= 3.5 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

I

D

, DRAIN CURRENT (A)

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

0 20406080100120140

0

1

2

3

4

VGS = 2.5 V

VGS = 3.5 V

PULSE DURA TION = 80 μs DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

I

D

, DRAIN CURRENT (A)

V

GS

= 3 V

VGS = 4.5 V

V

GS

= 10 V

-75 -50 -25 0 25 50 75 100 125 150

0.6

0.8

1.0

1.2

1.4

1.6

ID = 34 A V

GS

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

T

J

, JUNCTION TEMPERATURE (

o

C)

246810

0

1

2

3

4

5

TJ = 125 oC

ID = 34 A

TJ = 25 oC

V

GS

, GATE TO SOURCE VOLTA G E (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

1.0 1.5 2.0 2.5 3.0

0

20

40

60

80

100

120

140

TJ = 125 oC

V

DS

= 5 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.0 0.2 0.4 0.6 0.8 1.0

0.001

0.01

0.1

1

10

100

200

TJ = -55 oC

TJ = 25 oC

TJ = 125 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics (Q2 N-Channel) T

Figure 14.

On-Region Characteristics Figure 15. Normalized on-Resistance vs Drain

= 25 °C unless otherwise noted

J

Current and Gate Voltage

®

Power Stage

Figure 16. Normalized On-Resistance

vs Junction Temperature

Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode

Figure 17. On-Resistance vs Gate to

Source Voltage

Forward Voltage vs Source Current

FDMS3622S PowerTrench

0 153045607590

0

2

4

6

8

10

ID = 34 A

V

DD

= 15 V

V

DD

= 10 V

V

GS

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 13 V

0.1 1 10 30

100

1000

10000

f = 1 MHz V

GS

= 0 V

CAPACITANCE (pF)

VDS, DRA IN TO SOU RCE VO LTAGE ( V )

C

rss

C

oss

C

iss

0.001 0.01 0.1 1 10 100 1000

1

10

100

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

I

AS

, AVALANCHE CURRENT (A)

25 50 75 100 125 150

0

30

60

90

120

150

180

R

θJC

= 1.9 oC/W

V

GS

= 4.5 V

Limited by Package

V

GS

= 10 V

I

D

, DRAIN CURRENT (A)

T

C

, CASE TEMPERATURE (

o

C)

0.01 0.1 1 10 100

0.01

0.1

1

10

100

200

100 μs

DC

100 ms

10 ms

1 ms

1s

I

D

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS

LIMITED BY r

DS(on)

SINGLE PULSE T

J

= MAX RATED

R

θJA

= 120

o

C/W

T

A

= 25

o

C

10s

10-410-310-210

-1

110

100 1000

0.5

1

10

100

1000

3000

SINGLE PULSE R

θJA

= 120 oC/W

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

Typical Characteristics (Q2 N-Channel) T

Figure 20. Gate Charge Characteristics

= 25°C unless otherwise noted

J

Figure 21. Capacitance vs Drain

to Source Voltage

®

Power Stage

Figure 22. Unclamped Inductive

Switching Capability

FDMS3622S Rev.C2

Fi gure 24. F orward Bia s Safe

Operating Area

Figur e 2 3. M ax imum C on tinuo us Drain

Current vs Case Temperature

Figure 25. Single Pulse Maximum Power

Dissipation

10

-4

10

-3

10

-2

10

-1

110

100 1000

0.0001

0.001

0.01

0.1

1

2

SINGLE PULSE R

θJA

= 120 oC/W

(Note 1b)

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

P

DM

t

1

t

2

NOTES: DUTY FACTOR: D = t

1/t2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

FDMS3622S PowerTrench

Typical Characteristics (Q2 N-Channel) T

Figure 26. Junction-to-Ambient Transient Thermal Response Curve

= 25 °C unless otherwise noted

J

®

Power Stage

FDMS3622S Rev.C2

0 40 80 120 160 200 240 280 320 360

-5

0

5

10

15

20

25

30

35

40

CURRENT (A)

TIME (ns)

di/dt = 300 A/μs

0 5 10 15 20 25

10

-6

10

-5

10

-4

10

-3

10

-2

TJ = 125 oC

TJ = 100 oC

TJ = 25 oC

I

DSS

, REVERSE LEAKAGE CURRENT (A)

VDS, REVERSE VOLTAGE (V)

Typical Characteristics (continued)

SyncFET Schottky body diode Characteristics

FDMS3622S PowerTrench

Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 27 shows the reverse recovery characteristic of the FDMS3622S.

Figure 27. FDMS3622S SyncFET body

diode reverse recovery characteristic

Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device.

Figure 28. SyncFET body diode reverse leakage versus drain-source voltage

®

Power Stage

FDMS3622S Rev.C2

Dimensional Outline and Pad Layout

C

L

CPKG

PKG

5.10

4.90

6.10

5.90

C

3.00

2.80

3.81

1.02

0.82

TOP VIEW

SIDE VIEW

BOTTOM VIEW

14

85

123

4

876

0.10 CAB

0.05

C

2.25

2.05

5

0.58

0.38

NOTES : UNLE SS OTHERWISE SPECI FIED

A) DOES NOT FULLY CO NFORM TO

JEDE C REGIS TRATION, MO-240,

ISSUE B DATED 10/2009.

B) ALL DIMENSIONS ARE IN

MILLIMETERS.

C) DIME NSIONS DO NO T INCLUDE

BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.

D) DIME NSI ONING AND TOLERANCI NG

PER ASME Y14.5M-1994.

E) IT IS RECOMMENDED TO HAVE NO

TRACES OR VIAS WITHIN THE KEEP OUT AREA.

F) DRAWING FI L E NAME: PQN08EREV4.

SEE DETAIL A

DETAIL A

(SCALE: 2X)

0.05

0.00

0.30

0.20

0.08

C

PIN #1

IDE N T M A Y

APPEAR AS

OPT IONAL

SEA TING PLANE

0.10 C

1.10

0.90

RE C O M MEN DE D LAND P A TTE R N

0.65 TYP

1

2

3

4

5

6 7 8

1.27

1.32

1.12

A

0.10

C

2X

B

0.10 C

2X

0.00

1.60

2.52

1.21

2.31

1.18

1. 2 7 TY P

2.00

2.15

0.63

0.59

3.18

4.00 C

L

C

L

0.51

0.31

0.58

0.38

2.13

3.15

0.35

0.70

0.50

3.90

3.70

0.44

0.24

6X

0.71

0.61

KEEP OUT AREA

5.10

4.16

FDMS3622S Rev.C2

FDMS3622S PowerTrench

®

Power Stage

TRADEMARKS

tm

®

™

tm

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®

*

FDMS3622S PowerTrench

®

Power Stage

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

ANTI-COUNTERFEITING POLICY

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experie ncing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts exp erience many problems such as loss o f bran d re putat ion, subst and ard performance, fa iled application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and ou r customers from the

proliferation of counterfeit parts. Fairch ild stron gly encourage s custome rs to purchase Fair child part s either dire ctly from Fa irchild or from Au thorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and e ncourage our cust omers to do their part in stopping this practice by bu ying direct or from aut horized distributors.

PRODUCT STATUS DEFINITIONS Definition of Terms

.

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.

Rev. I60

Datasheet FDMS3622S Datasheet (Fairchild)

Specifications and Main Features

Frequently Asked Questions

User Manual