Page 1
®
IPAD
MAIN APPLICATION
ESD protection and EMI filtering for USB port.
■
DESCRIPTION
The EMIF02-USB01 is a highly integrated array
designed tosuppress EMI / RFI noisefor USB port
filtering.
The EMIF02-USB01 flip-chip packaging means
the package size is equal to the die size. That's
why EMIF02-USB01 is a very small device.
Additionally, this filter includes an ESD protection
circuitry which prevents the protected device from
destruction when subjected to ESD surges up to
15 kV.
TM
EMIF02-USB01
2 LINES EMI FILTER
INCLUDING ESD PROTECTION
Flip Chip package
PIN CONFIGURATION
BENEFITS
■ 2 lines low-pass-filter + 2 lines ESD protection
■ High efficiency in EMI filtering
■
Very low PCB space consuming: 2.5 mm
■
Very thin package: 0.65 mm
■
High efficiency in ESD suppression
(IEC61000-4-2 level 4)
■
High reliability offered by monolithic integration
■
High reducing of parasitic elements through
integration & wafer level packaging.
COMPLIES WITHTHE FOLLOWING STANDARDS :
IEC61000-4-2 level 4
on input & output pins.
15kV (air discharge)
8 kV (contact discharge)
2
321
A
B
C
D
E
TM : ASD is trademark of STMicroelectronics.
January 2003 - Ed: 5
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Page 2
EMIF02-USB01
SCHEMATIC
A3
A1
B2
D2
(gnd pin)
Fig. 1: Filtering behavior
EMIF02-USB01: filtering response of lines C1/C3 and E1/E3
0.00
0.00
dB
-5.00
-10.00
-15.00
-20.00
-25.00
-30.00
-35.00
-40.00
-45.00
-50.00
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
E1_E3
Frequency/Hz
C1_C3
1.3K
33R
C1
C3
33R
E1 E3
Fig. 2: ESD response to IEC61000-4-2 Level 4
Vin
Vout
Fig. 3: Capacitance versus reverse applied
voltage
40
35
30
25
C (pF)
20
15
10
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VR (V)
2/6
Fig. 4: Digital crosstalk
0.00
dB
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
-90.00
-100.0
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
f/Hz
Page 3
EMIF02-USB01
ABSOLUTE MAXIMUM RATINGS (T
amb
=25°C)
Symbol Parameter and test conditions Value Unit
V
PP
T
j
T
op
T
stg
ELECTRICAL CHARACTERISTICS (T
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
Junction temperature
Operating temperature range
Storage temperature range
=25°C)
amb
15
8
125 °C
-40 to + 85 °C
-55 to +150 °C
Symbol Parameter
V
I
V
V
Rd
I
BR
RM
RM
CL
PP
Breakdown voltage
Leakage current @ V
Stand-off voltage
Clamping voltage
Dynamic impedance
Peak pulse current
RM
slope: 1/Rd
kV
Symbol Test conditions Min. Typ. Max. Unit
V
BR
I
RM
C
line
R
1,R2
R
3
IR=1mA
VRM=3V
@0V
Tolerance ± 5%
Tolerance ± 5%
6V
0.1 0.5 µ A
40 45 pF
33.0 Ω
1.30 kΩ
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Page 4
APLAC MODELS
Fig. 5: Aplac model of resistors
EMIF02-USB01
C1
3.8nH
E1
0.15nH
cap_33R
0.3nH
cap_33R
Csub
Csub
rsub_1k3
rsub_33R
rsub_33R
R_1k3
bulk
R_33R
rsub_33R
bulk
R_33R
rsub_33R
bulk
rsub_1k3
Csub
Csub
Csub
Csub
A3
0.23nH
C3
cap_33R Csub
0.7nH
E3
cap_33R Csub
Fig. 6: Aplac model of the diodes
A1, A3, B2, C1, C3, E1, E3
0.15nH
D02_usb
D02_usb
Lgnd_D
D2 bulk
D02_Nw
Rsub_D
Fig. 7: Aplac model of bumps & ground
connections
Cbump Rsubump
I/O
D2
bulk
100m
bulk
caphole
D2
Lbump
Rbump
Lhole
Rhole
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Page 5
EMIF02-USB01
Fig. 8: Aplac model parameters
aplacvar R_33R 33.9
aplacvar R_33R 33.9
aplacvar cap_33R 1.2pF
aplacvar cap_33R 1.2pF
aplacvar R_1k3 1.3k
aplacvar R_1k3 1.3k
aplacvar Cz29pF
aplacvar Cz29pF
aplacvar Rsub_D 100
aplacvar Rsub_D 100
aplacvar Csub0.3pF
aplacvar Csub0.3pF
aplacvar Rsub_33R 15
aplacvar Rsub_33R 15
aplacvar Rsub_1k3 50
aplacvar Rsub_1k3 50
aplacvar lhole 10pH
aplacvar lhole 10pH
aplacvar Rhole400m
aplacvar Rhole400m
aplacvar Caphole0.4pF
aplacvar Caphole0.4pF
aplacvar Lgnd_D 150pH
aplacvar Lgnd
aplacvar Lbump50pH
aplacvar Lbump50pH
aplacvar Rbump50m
aplacvar Rbump50m
aplacvar Cbump1.5pF
aplacvar Cbump1.5pF
aplacvar Rsubump150
aplacvar Rsubump150
Model D02_Nw
BV=100
IBV=1m
CJO=6.8p
M=0.3333
RS=2
VJ=0.6
TT=100n
ORDER CODE
EMIF 02 - USB 01
Electro Magnetic
Interference Filter
Model D02_usb
BV=16
IBV=1m
CJO=Cz
M=0.3333
RS=2
VJ=0.6
TT=100n
Fig. 9: Comparison between Aplac simulations
and measured frequency response.
0.00
dB
-5.00
-10.00
-15.00
-20.00
-25.00
-30.00
-35.00
-40.00
-45.00
-50.00
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
Aplac: C1/C3
f/Hz
simulation
measure
Meas: C1_C3_symm
Version
PACKAGE MECHANICAL DATA
495µm ± 50
495µm ± 50
Nb of lines
1.27mm ± 50µm
USB port fonction
315 ± 50 700 ± 50
1.97mm ± 50µm
650µm ± 65
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Page 6
EMIF02-USB01
MARKING
220
365
365
FFT
F
y
ww
240
®
40
PACKING
8 +/- 0.3
Dot identifying Pin A1 location*
yww
xxx
ST
All dimensions in mm
4 +/- 0.1
yww
User direction of unreeling
yww
xxx
ST
4 +/- 0.1
1.5 +/- 0.1
xxx
ST
All dimensions in µm
OTHER INFORMATION
Ordering code Marking Package Weight Base qty Delivery mode
1.75 +/- 0.1
3.5 +/- 0.1
EMIF02-USB01 FFT Flip Chip 3.35 mg 5000 Tape& reel (7”)
Note: More packing informations are available in the application note AN1235: ''Flip-Chip CSP: Package description and
recommandations for use''
Informationfurnishedisbelievedtobeaccurateandreliable.However,STMicroelectronicsassumesnoresponsibilityforthe consequences of
useofsuch information nor for any infringement of patents or other rights of third parties which may result from its use. No license is grantedby
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2003 STMicroelectronics - Printed in Italy - All rights reserved.
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