Page 1
®
IPAD
TM
MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required :
Mobile phones and communication systems
■
Computers, printers and MCU Boards
■
DESCRIPTION
The EMIF02-MIC02 is a highly integrated devices
designed to suppress EMI/RFI noise in all systems
subjected to electromagnetic interferences. The EMIF02
flip chip packaging means the packagesize is equal to the
die size.
This filter includes an ESD protection circuitry which
prevents the device from destruction when subjected to
ESD surges up 15kV.
BENEFITS
EMI symmetrical (I/O) low-pass filter
■
High efficiency in EMI filtering
■
■ Very low PCB space consuming: 1.07mm x 1.57mm
■ Very thin package: 0.65 mm
■ High efficiency in ESD suppression
■ High reliability offered by monolithic integration
■
High reducing of parasitic elements through integration
& wafer level packaging.
EMIF02-MIC02F1
2 LINES EMI FILTER
AND ESD PROTECTION
Flip Chip package
PIN CONFIGURATION (ball side)
123
GND
I2
AI1
COMPLIES WITHTHEFOLLOWINGSTANDARDS:
IEC61000-4-2
Level 4 on input pins 15kV (air discharge)
8 kV (contact discharge)
Level 1 on output pins 2kV (airdischarge)
2kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
BASIC CELL CONFIGURATION
Low-pass Filter
Input
GND GND GND
TM : IPAD is a trademark of STMicroelectronics.
September 2003 - Ed: 4A
O2
GND
Output
O1
Ri/o = 470
B
Ω
Cline = 16pF
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Page 2
EMIF02-MIC02F1
ABSOLUTE RATINGS (limiting values)
Symbol Parameter and test conditions Value Unit
T
j
T
op
T
stg
Maximum junction temperature
Operating temperature range
Storage temperature range
125 °C
-40 to + 85 °C
-55 to 150 °C
ELECTRICAL CHARACTERISTICS (T
Symbol
V
BR
I
RM
V
RM
V
CL
R
d
I
PP
R
I/O
C
line
Breakdown voltage
Leakage current @ V
Stand-off voltage
Clamping voltage
Dynamic impedance
Peak pulse current
Series resistance between Input & Output
Input capacitance per line
Parameter
RM
=25°C)
amb
VCL
I
I
PP
IR
IRM
VRMVBR
IRM
IR
IPP
VCL
VBRVRM
Symbol Test conditions Min. Typ. Max. Unit
V
BR
I
RM
R
I/O
C
line
IR=1mA
VRM= 12V per line
@0V
14 16 V
500 nA
423 470 517 Ω
16 pF
V
Fig. 1: S21(dB) attenuation measurement and
Aplac simulation.
- 10.00
dB
dB
- 15.00
- 20.00
- 25.00
- 30.00
- 35.00
- 40.00
- 45.00
- 50.00
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
f/Hz
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Measurement
Simulation
Fig. 2: Analog crosstalk measurements.
-20.00
dB
-30.00
-
-40.00
-
-50.00
-
-60.00
-
-70.00
-
-80.00
-
1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G
f/Hz
I2/O1
Page 3
EMIF02-MIC02F1
Fig. 3: Digital crosstalk measurement.
Fig. 5: ESD response to IEC61000-4-2 (-15kV air
discharge) on one input V(in) and on one output
(Vout).
Fig. 4: ESD response to IEC61000-4-2 (+15kV air
discharge) on one input V(in) and on one output
(Vout).
Fig. 6: Line capacitance versus applied voltage.
C(pF)
20
18
16
14
12
10
8
6
4
2
0
0123456789101112
V (V)R
V
F=1MHz
=30mV
osc
Tj=25°C
RMS
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Page 4
EMIF02-MIC02F1
Aplac model.
I1
Cox
MODEL = D01-ext
Rsubump
Rsubump
MODEL = D01-ext
Cox
I2
Aplac parameters.
Model D01-ext
BV = 7
CJO = Cz_ext
IBV = 1u
IKF = 1000
IS = 10f
ISR = 100p
N = 1
M = 0.3333
RS = Rs_ext
VJ = 0.6
TT = 50n
R_470R
MODEL = D01-int
MODEL = D01-int
R_470R
EMIF02-MIC02F1 model
Cox
Rsubump
MODEL = D01-gnd
Rsubump
Cox
Model D01-int
BV = 7
CJO = Cz_int
IBV = 1u
IKF = 1000
IS = 10f
ISR = 100p
N = 1
M = 0.3333
RS = Rs_int
VJ = 0.6
TT = 50n
O1
gnd
O2
Model D01-gnd
BV = 7
CJO = Cz_gnd
IBV = 1u
IKF = 1000
IS = 10f
ISR = 100p
N = 1
M = 0.3333
RS = Rs_gnd
VJ = 0.6
TT = 50n
gnd
Cgnd
50pH
50m
Lgnd
Cgnd
Rgnd
Ground return
aplacvar Ls 400pH
aplacvar Rs 100m
aplacvar R_470R 482.6
aplacvar Cz_ext 8.73pF
aplacvar Rs_ext 850m
aplacvar Cz_int 2.9pF
aplacvar Rs_int 850m
aplacvar Cz_gnd 215.61pF
aplacvar Rs_gnd 470m
aplacvar Rgnd 10m
aplacvar Lgnd 48pH
aplacvar Cgnd 0.15pF
50pH
50m
Lgnd
Rgnd
ORDER CODE
EMI Filter
Number of lines
4/6
aplacvar Cox 3.05pF
aplacvar Rsubump 200m
EMIF yy F x- xxx zz
1: Pitch = 500µm
Bump = 315µm
2: Leadfree Pitch = 500µm
Bump = 315µm
Flip Chip
x: resistance value (Ohms) z:capacitance value / 10(pF)
or
Application (3 letters) and Version (2 digits)
Page 5
PACKAGE MECHANICAL DATA
FLIP CHIP
EMIF02-MIC02F1
500µm ± 50
1.07mm ± 50µm
FOOT PRINT RECOMMENDATIONS
Copper pad Diameter :
250µm recommended , 300µm max
315µm ± 50500µm ± 50
1.57mm ± 50µm
650µm ± 65
MARKING
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 300µm copper pad diameter
Dot, ST logo
xxx = marking
yww = datecode
(y = year
ww = week)
All dimensions in µm
365
365
220
240
xyxwx
w
40
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Page 6
EMIF02-MIC02F1
PACKING
Dot identifying Pin A1 location
8 +/- 0.3
4 +/- 0.1
Ø 1.5 +/- 0.1
1.75 +/- 0.1 3.5 +/- 0.1
0.73 +/- 0.05
All dimensions in mm
yww
xxx
ST
User direction of unreeling
yww
xxx
ST
4 +/- 0.1
yww
xxx
ST
OTHER INFORMATION
Ordering code Marking Package Weight Base qty Delivery mode
EMIF02-MIC02F1 FJT Flip Chip 2.3mg 5000 Tape & reel (7”)
Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and
recommandations for use''
Informationfurnished is believed to be accurate and reliable. However,STMicroelectronicsassumes no responsibility for the consequences of
useof such information nor for any infringementofpatents or other rights of third partieswhich may result from its use. Nolicenseis granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners.
© 2003 STMicroelectronics - All rights reserved.
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