EL4501CS -40°C to +85°C 24-Pin SOICMDP0027
EL4501CU -40°C to +85°C 24-Pin QSOPMDP0031
General Description
The EL4501C Video Front End (VFE) is an in tegrated soluti on that
provides the key analog signal conditioning functions for analog video
signals. It forms the front end interface for either an analog or analog/digital video syst em. The VFE contain s a high bandwidth DC
Restore, a sophistica ted Sync Se para tor, and a Data Sl icer for e mbedded data recovery.
The VFE will perform the restoration of the DC reference level
(blanking level) and the extraction of all of the necessary timing signals needed for synchronization and control. The sync separator is
designed for very good nois e im mun ity by incor pora ting a sign al q ualification scheme and internal brick wall filter. A data slicer is also
included to help decode data embedded in the active video or VBI
areas of the signal.
The VFE operates from a single 5 volt supply and is available in a
small 24 pin QSOP pac kag e tha t ta kes on ly 0.0 8in
Values beyond absolute maximum ratings can cause the device to be prematurely damaged. Absolute maximum ratings are stress ratings only and
functional device operation is not implied.
Supply Voltage (V
EL4501C - Preliminary
Input VoltageGND - 0.3V, V
to GND)+6V
S
= 25°C)
A
+0.3V
S
Storage Temperature Range-65°C to +150°C
Ambient Operating Temperature-40°C to +85°C
Operating Junction Temperature125°C
Power DissipationSee Curves
Important Note:
All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the
specified temperature and are pulsed tests, therefore: T
= TC = TA.
J
Electrical Characteristics
VS = +5V, GND = 0V, TA = 25°C, Input Video = 1V
ParameterDescriptionConditionsMinTypMaxUnit
I
S
Supply CurrentNo Load, V
Video Amplifier Section
V
OP
V
ON
+I
OUT
-I
OUT
dGDifferential Gain Error
dPDifferential Phase Error
Positive Output V oltage SwingRL = 150Ω to V
Negative Output V oltage SwingRL = 150Ω to V
Positive Output CurrentRL = 10Ω to V
Negative Output CurrentRL = 10Ω to V
[1]
[1]
BWBandwidth-3dB, G = 1, R
BW1Bandwidth+/-0.1dB, G = 2, R
SRSlew Rate25% to 75%, 3.5V
V
RL
Ref Level Range03.5V
tsSettling Timeto 0.1%, V
R
IN
C
IN
A
VOL
Input Resistance (VIDEO_IN)90115140kΩ
Input Capacitance (VIDEO_IN)1.5pF
Open Loop Voltage GainRL = no load, V
DC Restore Section
CMIRCommon Mode Input Range (REF_IN)CMRR ≥ TBD dB03.5V
V
OS
TCV
I
B
Input Offset VoltageDC restored-20+20mV
Input Offset Voltage Temperature Coefficient10µV/°C
OS
Input Bias Current (REF_IN)VCM = 0V to 3.5V1100nA
Data Slicer Section
I
I
V
V
V
V
I
IH
IL
IH
IL
OH
OL
OUT
Input High Current (DS_MODE & DS_ENAB) VIH = 5V46µA
Input Low Current (DS_MODE & DS_ENAB) VIL = 0V1100nA
Input High Voltage (DS_MODE & DS_ENAB)4.5V
Input Low Voltage (DS_MODE & DS_ENAB)0.5V
Output High V oltage (DS_OUT)I
Output Low Voltage (DS_OUT)I
Short Circuit Current (DS_OUT)RL = 10Ω to 2.5V1520mA
unless otherwise specified.
P-P
R
= 150Ω to GND4.204.60V
L
R
= 1k to V
L
R
= 150Ω to GND0V
L
R
= 1k to V
L
Standard NTSC test, AV = 2, RL = 150Ω0.1%
Standard NTSC test, AV = 2, RL = 150Ω0.1°
-3dB, G = 1, R
R
= 150Ω to GND, V
L
= -1mA4.754.9V
OUT
= 1mA0.10.25V
OUT
= 0V20mA
IN
S
/2
S
/2
S
/2
S
/2
S
/2
S
/2
L = 10kΩ to GND100MHz
L = 150Ω to GND60MHz
L = 150Ω to GND8MHz
, RL = 150Ω150200V/µs
P-P
= 0V to 3V35ns
IN
= 0.5V to 3V5465dB
OUT
= 0.5V to 3V4050dB
OUT
4.704.85V
4.954.97V
0.150.30V
0.030.05V
6080120mA
-50-60-80mA
2
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EL4501C - Preliminary
Video Front End
Electrical Characteristics
VS = +5V, GND = 0V, TA = 25°C, Input Video = 1V
ParameterDescriptionConditionsMinTypMaxUnit
I
B
Input Bias Current (DS_REF)DS_REF = 0V & 5V-1001100nA
VosInput Offset Voltage-20+20mV
V
HYS
t
PD
t
R/F
Hysteresis1015mV
Propagation Delay50% to 50%1828ns
Rise/Fall Time10% to 90%, RL = 150k, CL = 5pF1.21.8ns
Sync Separator Section
V
OH
V
OL
V
THSRH
T
CD
T
CD
V
SR
R
INSR
V
RANGE
t
CD
t
BD
t
BW
t
HD
t
HW
t
VW
t
VDD
f
H
V
LOS
t
JIT
Output High V oltageI
Output Low V oltageI
Slicing Level455055%
Composite Sync DelayWith FilterTBDTBD
Composite Sync DelayWithout FilterTBDTBD
Sync In Reference Level1.5V
Sync Reference Input Impedance90kΩ
Input Dynamic Range0.52.0Vp-p
Comp Sync DelayFrom 50% point of leading edge of sync5075100ns
Back Porch DelayFrom 50% point of trailing edge of sync34 0430520ns
Back Porch Width2.73.03.3µs
Horiz Sync DelayFrom 50% point of leading edge of sync350450550ns
Horiz Sync Width3.74.75.7µs
V ert Sync WidthSerrations185195205µs
Vert Sync Default DelayNo serrations5163.576µs
Horiz Scan RateR
LOS Detect ThresholdCompared to Sync Tip Amplitude72mV
Output JitterAll sync separator outputs5ns
Reference Section
VREFReference Output Voltage (REF_OUT)I
unless otherwise specified.
P-P
= -1.6mA4.6V
OH
= 1.6mA0.4V
OL
= xx to yy kΩ15130kHz
FREQ
= +2mA to -0.5mA1.21.31.4V
OUT
EL4501C - Preliminary
3
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EL4501C - Preliminary
Video Front End
Typical Performance Curves
EL4501C - Preliminary
4
Page 5
Timing Diagrams
Fields One and Three (ODD)
Composite Signal
Composite Sync Output
Burst/Back Porch Output
Horizontal Sync Output
Vertical Sync Output
Odd/Even Output
EL4501C - Preliminary
EL4501C - Preliminary
Video Front End
Fields Two and Four (EVEN)
Composite Signal
Composite Sync Output
Burst/Back Porch Output
Horizontal Sync Output
Vertical Sync Output
Odd/Even Output
5
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EL4501C - Preliminary
Video Front End
Timing Diagrams (cont.)
EL4501C - Preliminary
Video In
Composite Sync Output
Burst/Back Porch Output
Horizontal Sync Output
Video In
Vertical Sync Output
ODD/EVEN
t
CD
t
HD
t<< t
CD
t
HW
tCD+2t
tCD+t
t
BD
t
BW
6
Page 7
EL4501C - Preliminary
Video Front End
Pin Description
Pin
NumberPin NamePin TypePin Description
1VFBInputConnection for gain and feedback resistors, R
2VIDEO_INInputInput to DC restore amplifier. Input coupling capacitor connects from here to video source.
3DS_MODEInputSets the mode of the DS comparator. Logic high selects a standard logic output. Logic low selects an open
4DS_ENABInputEnables the output of the comparator. A logic high enables the comparator. A logic low tri-states it.
5GNDInputAnalog ground.
6GND
7R
8FSELInputEnable/ bypass internal brick wall filter. A logic high is used to enable the filter, a logic low to disable it.
9SYNC_INInputInput to the sync separator. Connects to the video source via a coupling capacitor, or to a color burst input filter.
10LOSOutputLoss of signal output. Goes high if no input video signal is detected.
11COMPOSITEOutputComposite sync output.
12HORIZONTAL OutputHorizontal sync output.
13VERTICALOutputVertical sync output.
14ODD/EVENOutputOdd/Even field indicator output.
15BACK_PORCH OutputBack porch output.
17SYNC_AMPOutputAmplitude of sync tip. Can be used to control AGC circuit.
18V
19V
20REF-OUTOutputVoltage reference for use as blanking level in low cost system
21REF_INInputDc voltage on this pin sets the DC restore voltage and output blanking level.
22DS_REFInputSets the slicing level or reference level for the comparator.
23DS_OUTOutputOutput of the data slicing comparator. The output is either open drain/collector or standard symmetrical logic
24VIDEO_OUTOutputOutput of DC restore amplifier.
D
FREQ
SD
S
InputDigital ground
InputConnection for bias resistor that sets the overall timing.
InputDigital power supply. Nominally +5V
InputAnalog power supply. Nominally +5V.
drain/collector.
depending on the DS_MODE pin.
and RG.
F
EL4501C - Preliminary
7
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EL4501C - Preliminary
Video Front End
Block Diagram
EL4501C - Preliminary
Input video
VIDEO_IN
0.1uF
SYNC_IN
0.1uF
SYNC_AMP
V
S
LOS
R
FREQ
V
SD
+
-
LOS’
FilterFSEL
Sync Separator
GND
DS_REF
GND
D
DS_MODE
+
1.3V
DS_ENAB
DS_OUT
VIDEO_OUT
R
VFB
R
REF_IN
REF_OUT
BACK_PORCH
COMPOSITE
HORIZONTAL
VERTICAL
ODD/EVEN
F
G
+
-
+
-
–
8
Page 9
Description of Operation
The EL4501C incorporates the following functional
blocks:
• DC restore amplifier
• Advanced sync separator
• Data Slicer
Combined they pr ovid e t he key ana l og pr oc essing fun ctions for a number of video system applications. The
operation of each of these blocks is described below.
Sync Separa t or
The sync separator contained in the EL4501C has been
designed to be compatible with a wide range of video
signal standards, operating with horizontal line rates
from PAL/NTSC rates up to 150kHz. The sync separator
EL4501C - Preliminary
Video Front End
also includes a qualification scheme which rejects noise
pulses and other video arti facts. The h orizontal l ine rate
timing is controlled with the use of a resistor, R
The following outputs are available:
• Composite sync
• Horizontal sync
• Vertical sync
• Burst gate
• Odd/Even field identification
• Loss of signal detected
• Sync amplitude detected
FREQ
.
EL4501C - Preliminary
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EL4501C - Preliminary
Video Front End
EL4501C - Preliminary
General Disclaimer
Specifications contained in this data sheet are in effect as of the publicat ion date shown. Elantec, Inc. re serves the r ight to make changes in th e circuitry or specifications cont ained herein at a ny time without notice. Elantec , Inc. assumes no res ponsibili ty for t he us e of an y circuits descr ibed
herein and makes no representations that they are free from patent infringement.
WARNING - Life Support Policy
Elantec, Inc. products are not authorized for and should not be used
within Life Support Systems without the specific written consent of
Elantec, Inc. Life Support systems are equipment intend ed to sup-
Elantec Semiconductor, Inc.
675 Trade Zone Blvd.
Milpitas, CA 95035
Telephone: (408) 945-1323
(888) ELANTEC
Fax:(408) 945-9305
European Office: +44-118-977-6080
Japan Technical Center: +81-45-682 -5820
port or sustain life and whose failure to perform when properly used
in accordance with instructions provided can be reasonably
expected to result in significant personal injury or death. Users contemplating applicatio n of Elantec, Inc. P roducts in Li fe Support
Systems are requested to contact Elantec, Inc. factory headquarters
to establish suitable terms & conditions for these applications. Elantec, Inc. ’s warranty is limited to replacement of defective
components and does not cov er injury to persons or prop erty or
other consequential damages.
September 7, 2000
10
Printed in U.S.A.
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