Datasheet DM74ALS03BN, DM74ALS03BMX, DM74ALS03BM, DM74ALS03BCW Datasheet (Fairchild Semiconductor)

© 2000 Fairchild Semiconductor Corporation DS006176 www.fairchildsemi.com

September 1986
Revised February 2000

DM74ALS03B Quad 2-Input NAND Gate with Open Collector Outputs

DM74ALS03B
Quad 2-Input NAND Gate with Open Collector Outputs

General Description

This device contains four independent gates, each of which
performs the logic NA ND functio n. The open -collector out­puts require external pull-up resistors for proper logical
operation.

Pull-Up Resistor Equations

Where: N

1

(IOH) = total maximum output HIGH current

for all outputs tied to pull-up resistor

N

2

(IIH) = total maximum input HIGH current
for all inputs tied to pull-up resistor
N

3

(IIL) = total maximum input LOW current for
all inputs tied to pull-up resistor

Features

■ Switching specifications at 50 pF

■ Switching specifications guaranteed over full tempera-

ture and V

CC

range

■ Advanced oxide-isolated, ion-implanted Schottky TTL
process

■ Functionally and pin for pin compatible with Schottky
and low power Schottky TTL counterpart

■ Improved AC performance over Schottky and low power
Schottky counterparts

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Connection Diagram Function Table

Y = AB

H = HIGH Logic Level
L = LOW Logic Level

Order Number Package Number Package Description

DM74ALS03BM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74ALS03BN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs Output

ABY

LLH
LHH
HLH
HHL

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DM74ALS03B

Absolute Maximum Ratings(Note 1)

Note 1: The “Absolute Maximum Ratin gs” are those v alues beyon d which

the safety of the dev ice cannot be guaranteed. T he device sh ould not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the co ndition s
for actual device operation.

Recommended Operating Conditions

Electrical Characteristics

over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.

Switching Characteristics

over recommended operating free air temperature range.

Supply Voltage 7V
Input Voltage 7V
HIGH Level Output Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Typical θ

JA

N Package 86.5°C/W
M Package 116.0°C/W

Symbol Parameter Min Nom Max Units

V

CC

Supply Voltage 4.5 5 5 .5 V

V

IH

HIGH Level Input Voltage 2 V

V

IL

LOW Level Input Voltage 0.8 V

V

OH

HIGH Level Output Voltage 5.5 V

I

OL

LOW Level Output Current 8 mA

T

A

Free Air Operating Temperature 0 70 °C

Symbol Parameter Conditions Min Typ Max Units

V

IK

Input Clamp Voltage VCC = 4.5V, II = −18 mA −1.5 V

I

OH

HIGH Level Output Current VCC = 4.5V, VOH = 5.5V 100 µA

V

OL

LOW Level VCC = 4.5V IOL =4 mA 0.25 0.4 V
Output Voltage IOL = 8 mA 0.35 0.5 V

I

I

Input Current @ Max.

VCC = 5.5V, VIH = 7V 0.1 mA

Input Voltage

I

IH

HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA

I

IL

LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.1 mA

I

CC

Supply Current VCC = 5.5V Outputs HIGH 0.43 0.85 mA

Outputs LOW 1.62 3 mA

Symbol Parameter Conditions Min Max Units

t

PLH

Propagation Delay Time VCC = 4.5V to 5.5V

20 50 ns

LOW-to-HIGH Level Output RL = 2 kΩ

t

PHL

Propagation Delay Time CL = 50 pF

313ns

HIGH-to-LOW Level Output

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DM74ALS03B

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M14A

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DM74ALS03B Quad 2-Input NAND Gate with Open Collector Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

2. A critical component i n any compon ent of a lif e support
device or system whose failu re to perform can be rea­sonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.

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