CXP82000
CMOS 8-bit Single Chip Microcomputer
Description
The CXP82000 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type,
which is developed for evaluating the function of the
CXP82052/82060.
Features
• Wide-range instruction system (213 instructions) to
cover various types of data
—16-bit operation/multiplication and division/
Boolean bit operation instructions
• Minimum instruction cycle 250ns at 16MHz operation
122µs at 32kHz operation
• Applicable EPROM LCC type 27C512 (Maximum 60K bytes are available.)
• Incorporated RAM capacity 3984 bytes (Including fluorescent display data area)
• Peripheral functions
— A/D converter 8-bit, 8-channel, successive approximation method
(Conversion time of 1.6µs/16MHz)
— Serial interface Incorporated buffer RAM
(Auto transfer for 1 to 32 bytes), 1 channel
8-bit clock sync type (MSB/LSB first selectabl
Start-stop sync type(UART), 1 channel
— Timers 8-bit timer
8-bit timer/counter
19-bit time base timer
16-bit capture timer/counter
32kHz timer/counter
— Fluorescent display panel controller/driver Supports the universal grid fluorescent display panel.
High voltage drive output port of 56 pins (40V)
Maximum of 640 segments display possible
Display timing number of 1 to 20
Dimmer function
Incorporated pull-down resistor (Mask option)
Hardware key scan function
(Maximum 16 × 8 key matrix compatible)
— Remote control receiving circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO
— PWM output 14 bits, 1 channel
• Interruption 16 factors, 15 vectors, multi-interruption possible
• Standby mode SLEEP/STOP
• Package 100-pin ceramic PQFP
Note) Mask option depends on the type of the CXP82000. Refer to the Products List for details.
100 pin PQFP (Ceramic)
evaluator type
e),1
channel
Piggyback/
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E97207-PS
Pin Configuration in Piggyback Mode
CXP82000
G1/A1
G0/A0
NC
PE0/EC0/INT0
PE1/EC1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5/CINT
PE6/PWM
PE7/TO/ADJ
PC0/KR0
PC1/KR1
PC2/KR2
PC3/KR3
PC4/KR4
PC5/KR5
PC6/KR6
PC7/KR7
PB0/TXD
PB1/CS0/RXD
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PI0
PA0/AN0
PA1/AN1
10
11
12
15
26
29
30
13
14
16
17
18
19
20
21
22
23
24
25
27
28
DD
V
G12/A12
G11/A11
G10/A10
G9/A9
G8/A8
G7/A7
G6/A6
G5/A5
G4/A4
G3/A3
G2/A2
95
10
11
12
13
93
94
5
6
7
8
9
14
92
91
A15
A12
A7
2
3
4
15
16
D2
D1
GND
17
89
90
DD
V
NC
32
1
31
19
18
D3
NC
99
98
100
1
2
3
4
5
6
7
8
9
97
A6
A5
A4
A3
A2
A1
A0
NC
D0
96
G13/A13
88
A14
30
20
D4
G14/A14
87
A13
29
28
27
26
25
24
23
22
21
D5
86
A16
G15/A15
84
85
A8
A9
A11
NC
OE
A10
CE
D7
D6
A17
83
A18
82
A19
81
A20
80
77
76
75
74
70
66
65
64
62
61
60
59
58
57
56
55
54
53
52
51
79
78
73
72
71
69
68
67
63
A21
A22
A23
PH7/A24
PH6/A25
PH5/A26
PH4/A27
PH3/A28
PH2/A29
PH1/A30
PH0/A31
PG7/A32
PG6/A33
PG5/A34
PG4/A35
PG3/A36
PG2/A37
PG1/A38
PG0/A39
PF7/A40
PF6/A41
PF5/A42
PF4/A43
PF3/A44
PF2/A45
PF1/A46
PF0/A47
PD7/A48
PD6/A49
PD5/A50
32
31
PA2/AN2
35
33
34
PA4/AN4
PA3/AN3
36
PA6/AN6
PA5/AN5
37
PI1
PA7/AN7
38
39
RST
40
XTAL
EXTAL
41
Vss
42
PI2/TX
43
44
PI3/TEX
DD
V
45
Note) 1. Do not any connetions toNC (Pin 3).
2. VDD (Pins 44 and 89) are both connected to VDD.
– 2 –
FDP
V
46
48
47
PD1/A54
PD0/A55
49
50
PD3/A52
PD2/A53
PD4/A51
Pin Configuration in Evaluator Mode
CXP82000
G1/A1
G0/A0
NC
PE0/EC0/INT0
PE1/EC1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5/CINT
PE6/PWM
PE7/TO/ADJ
PC0/KR0
PC1/KR1
PC2/KR2
PC3/KR3
PC4/KR4
PC5/KR5
PC6/KR6
PC7/KR7
PB0/TXD
PB1/CS0/RXD
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PI0
PA0/AN0
PA1/AN1
10
11
12
15
16
17
20
26
29
30
13
14
18
19
21
22
23
24
25
27
28
DD
V
19
C2
G13/A13
88
A14
31
C1
43
G14/A14
87
A13
30
20
RST
44
86
29
28
27
26
25
24
23
22
21
45
G12/A12
G11/A11
G10/A10
G9/A9
G8/A8
G7/A7
G6/A6
G5/A5
G4/A4
G3/A3
G2/A2
95
10
11
12
13
37
94
5
6
7
8
9
93
4
14
38
92
A7/D7
3
15
WR
39
91
A12
2
16
SYNC
40
A15
17
GND
1
41
90
NC
NC
32
18
42
89
DD
V
99
98
33
97
A6/D6
A5/D5
A4/D4
A3/D3
A2/D2
A1/D1
A0/D0
NC
RD
34
96
35
36
100
1
2
3
4
5
6
7
8
9
32
31
A16
G15/A15
84
85
46
47
A17
83
A8
A9
A11
NC
HALT
A10
E/P
I/T
MON
48
A18
49
82
A19
50
81
A20
80
77
76
75
74
70
66
65
64
62
61
60
59
58
57
56
55
54
53
52
51
79
78
73
72
71
69
68
67
63
A21
A22
A23
PH7/A24
PH6/A25
PH5/A26
PH4/A27
PH3/A28
PH2/A29
PH1/A30
PH0/A31
PG7/A32
PG6/A33
PG5/A34
PG4/A35
PG3/A36
PG2/A37
PG1/A38
PG0/A39
PF7/A40
PF6/A41
PF5/A42
PF4/A43
PF3/A44
PF2/A45
PF1/A46
PF0/A47
PD7/A48
PD6/A49
PD5/A50
PA3/AN3
PA2/AN2
PA5/AN5
PA4/AN4
PA7/AN7
PA6/AN6
PI1
RST
XTAL
EXTAL
Vss
PI2/TX
PI3/TEX
DD
V
Note) 1. Do not any connetions to NC (Pin 3).
2. VDD (Pins 44 and 89) are both connected to VDD.
– 3 –
FDP
V
PD1/A54
PD0/A55
PD3/A52
PD2/A53
PD4/A51
EPROM Read Timing
(Ta = –20 to +75°C, Vcc = 4.5 to 5.5V, Vss = 0V reference)
Item Symbol Pins Min. Max. Unit
CXP82000
Address → Data
input delay time
Address → Data
hold time
A0 to A15
D0 to D7
Products List
tACC
tIH
A0 to A15
D0 to D7
A0 to A15
D0 to D7
Address data
tACC tIH
Input data
120
0
0.8VDD
0.2VDD
0.8VDD
0.2VDD
ns
ns
Option item
Package
ROM capacitance
Pull-up resistance for reset pin
Pull-down resistance for high
voltage drive pin
Mask
CXP82052
100-pin plastic QFP
52K bytes
Existent/Non-existent
Existent/Non-existent
Products
CXP82060
60K bytes
Piggyback/evaluator
CXP82000-U01Q
100-pin ceramic PQFP
EPROM 60K bytes
Existent
Existent: G0/A0 to A23
Non-existent: PD0/A55 to PH7/A24
– 4 –
Piggyback mode/evaluator mode can be switched as shown below.
CXP82000
Piggyback mode Piggyback/evaluator product
LCC type EPROM
Pin 1 marking
Pin 1 index
Evaluator mode
Pin 1 marking
Note)
CPU Probe
Note) Evaluation cap should be connected to
CPU probe.
– 5 –
CXP82000
GOLD PLATING
42 ALLOY
0.65 ± 0.05
0.3 ± 0.08
CERAMIC
5.7g
1
PIN No. 1 INDEX
100
81
80
100PIN PQFP (CERAMIC)
80
14.22
12.02
1.27 ± 0.13
30
LEAD MATERIAL
LEAD TREATMENT
PACKAGE MATERIAL
PACKAGE STRUCTURE
0.45
50 31
51
0.7
1.0
18.12 ± 0.2
0.3
51
1.3 ± 0.3
PACKAGE WEIGHT
PQFP-100C-L01
AQFP100-C-0000-A
SONY CODE
JEDEC CODE
EIAJ CODE
10.44 MAX
0.50 ± 0.25
0.15 – 0.02
+ 0.05
Package Outline Unit: mm
18.7
16.3 ± 0.2
100 81
INDEX
PIN NO. 1 INDEX
4.5
6.0
1
22.3 ± 0.25
24.7
30
9.48
11.66
15.58 ± 0.2
31 50
3.57 ± 0.36
– 6 –
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