Page 1
PRODUCT BRIEF PRELIMINARY CHL8326/8
DIGITAL MULTI-PHASE GPU BUCK CONTROLLER
Trademarks and registered trademarks are the property of the respective
owners.
PB0011 Rev. 0.05, June 10, 2010
Page 1 of 2
One Highwood Drive, Tewksbury, MA 01876
Tel: +1(978)-640-0011
www.chilsemi.com
© 2010 CHiL Semiconductor Corp. All rights reserved
49 GND
CHL8326
48 Pin 7x7 QFN
Top View
1
2
7
8
5
6
3
4
10
9
12
11
36
35
30
29
32
31
34
33
27
28
25
26
47 4345 4046 4244 394148 38 37
14 1816 2115 1917 222013 23 24
SMB_DIO
PWM5
ISEN6
ENABLE
VRTN
RCSM
ISEN5
ISEN4
ISEN3
PWM6
VSEN
SMB_CLK
PWM4
VR_READY1 /
PWRGD
2
IRTN3
IRTN4
IRTN6
IRTN5
RCSP
TSEN
VR_HOT#
1
/
VRHOT_ICRIT#
2
PWM3
VINSEN
SMB_ALERT#
V18A
RRES
VCC
ISEN2
ISEN1
IRTN1
IRTN2
PWM2
PWM1
GPO_A
1
/ CBOUT
2
RCSM_L2
RCSP_L2
SV_ADDR_GPO_D
1
/ VID[1]
2
CFP1 /
VFIXEN_PSI
2
PM_ADDR_GPO_C
1
/
PM_ADDRVID[0]
2
SV_DIO
1
/ SVDVID[2]
2
SV_CLK
1
/ SVC_VID[3]
2
SV_ALERT
1
/ VID[4]
2
VR_READY_L2
1
/ PWROK
2
VCC
GPO_B_PSI
1
/
VID[5]
2
VAR_GATE
VRTN_L2
VSEN_L2
SMB_DIO
PWM5
ISEN6
ENABLE
VRTN
RCSM
ISEN5
ISEN4
ISEN3
PWM6
VSEN
SMB_CLK
PWM4
VR_READY1 /
PWRGD
2
IRTN3
IRTN4
IRTN6
IRTN5
RCSP
TSEN
VR_HOT#
1
/
VRHOT_ICRIT#
2
PWM3
VINSEN
SMB_ALERT#
V18A
RRES
VCC
ISEN2
ISEN1
IRTN1
IRTN2
PWM2
PWM1
GPO_A
1
/ CBOUT
2
RCSM_L2
RCSP_L2
SV_ADDR_GPO_D
1
/ VID[1]
2
CFP1 /
VFIXEN_PSI
2
PM_ADDR_GPO_C
1
/
PM_ADDR_VID[0]
2
SV_DIO
1
/ SVDVID[2]
2
SV_CLK
1
/ SVC_VID[3]
2
SV_ALERT
1
/ VID[4]
2
VR_READY_L2
1
/ PWROK
2
VCC
PSI(MPoL)
1
/ VID[5]
2
PWM7
VRTN_L2
VSEN_L2
57 GND
CHL8328
56 Pin 8x8 QFN
Top View
55 5153 4854 5052 474956 46 45 4344
1
2
7
8
5
6
3
4
10
9
12
11
14
13
16 2018 2317 2119 242215 25 26 2827
42
41
36
35
38
37
40
39
33
34
31
32
29
30
ISEN8
GPO_B
TSEN2
VAR_GATE
PWM8
ISEN7
IRTN7
IRTN8
1
Intel/MPoL mode
2AMD mode
FEATURES
6-phase & 8-phase dual output PWM Controller
Phases are flexibly assigned between Loops 1 & 2
Intel® VR12, AMD® SVI/PVI/G34 & Memory modes
Overclocking & Gaming Mode with Vmax setting
Switching frequency from 200kHz to 1.2MHz per phase
CHiL Efficiency Shaping Features including Variable
Gate Drive, Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads and
Active Diode Emulation for Very Light Loads
CHiL Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Designed for use with coupled inductors
Auto-Phase Detection with auto-compensation
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry of
Temperature, Voltage, Current & Power for both loops
Non-Volatile Memory (NVM) for custom configuration
Compatible with CHiL ATL and 3.3V tri-state Drivers
+3.3V supply voltage; 0ºC to 85ºC ambient operation
Pb-Free, RoHS, 7x7 48 pin & 8x8 56 pin QFN packages
DESCRIPTION
The CHL8326/8 are dual-loop digital multi-phase buck
controllers. The CHL8326 drives up to 6 phases and the
CHL8328 drives up to 8 phases. The CHL8326/8 is fully
Intel® VR12 and AMD® SVI/PVI compliant on both loops
and provides a Vtt tracking function for DDR memory.
NVM storage saves pins and enables a small package size.
The CHL8326/8 includes the CHiL Efficiency Shaping
Technology to deliver exceptional efficiency at minimum
cost across the entire load range. CHiL Variable Gate Drive
optimizes the MOSFET gate drive voltage based on realtime load current. CHiL Dynamic Phase Control adds/drops
phases based upon load current. The CHL8326/8 can be
configured to enter 1-phase operation and active diode
emulation mode automatically or by command.
CHiL’s unique Adaptive Transient Algorithm (ATA), based
on proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors. In addition, a coupled inductor mode,
with phases added/dropped in pairs, enables further
improvement in transient response and form factor.
The I2C/PMBus interface can communicate with up to 16
CHL8326/8 based VR loops. Device configuration and fault
parameters are easily defined using the CHiL Intuitive
Power Designer (IPD) GUI and stored in on-chip NVM.
The CHL8326/8 provides extensive OVP, UVP, OCP and
OTP fault protection and includes thermistor based
temperature sensing with VRHOT signal.
The CHL8326/8 also includes numerous features like
register diagnostics for fast design cycles and platform
differentiation, truly simplifying VRD design and enabling
fastest time-to-market with its “set-and-forget” methodology.
Figure 1: CHL8326 & CHL8328 Packages
APPLICATIONS
Intel® VR12 & AMD® SVI & PVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
Page 2
PRODUCT BRIEF
CHL8326/8
DIGITAL MULTI-PHASE BUCK CONTROLLER
Page 2 of 2
PB0011
Rev. 0.05, June 10, 2010
+3.3V
V_CPU_L1
CHL8326/8
VINSEN
PWM4
PWM8
1
PWM3
PWM 2
PWM1
ISEN8
1
VR_RDY_L1
VSEN
VCC
RRES
GPO_A
V18A
VRTN
IRTN3
ISEN4
IRTN1
RCSP
IRTN2
RCSM
ISEN3
ISEN2
ISEN1
IRTN4
+12V Main
To/From
System
L
O
A
D
RCS
CCS
R
series
R
series
R
Th
R
VIN_1
R
VIN_2
IRTN8
1
VR_RDY_L2
TSEN
R
Th2
GND
HVCC
LoGate
HiGate
Vcc
GND
PWM
LVCC
12V
V
Boot
Switch
CHL8510
V_VGD
VAR_GATE
Optional Variable
Gate Drive Circuit
V_CPU_L2
L
O
A
D
VR_HOT#
SMB_CLK
SMB_DIO
I2C or
SMBus
V
V
RCSP_L2
RCSM_L2
RCS
CCS
R
series
R
series
R
Th
VSEN_L2
VRTN_L2
SV_DIO
SV_CLK
V
V
To/From
CPU
PWM5
ISEN5
IRTN5
PWM6
ISEN6
IRTN6
PWM7
1
ISEN7
1
IRTN7
1
SV_ALERT#
V
GPO_B
1
SMB_ALERT
V
PSI
2
CFP
Notes
1
CHL8328 only
2
MPoL mode only
Only Intel/MPoL Mode pin names
shown
SV_ADDR
PM_ADDR
3.3V
Mode
HVCC
LoGate
HiGate
Vcc
GND
PWM
LVCC
12V
V
Boot
Switch
V
V_VGD
CHL8510
Mode
HVCC
LoGate
HiGate
Vcc
GND
PWM
LVCC
12V
V
Boot
Switch
V
V_VGD
CHL8510
Mode
HVCC
LoGate
HiGate
Vcc
GND
PWM
LVCC
12V
V
Boot
Switch
V
V_VGD
CHL8510
Mode
HVCC
LoGate
HiGate
Vcc
GND
PWM
LVCC
12V
V
Boot
Switch
V
V_VGD
CHL8510
Mode
HVCC
LoGate
HiGate
Vcc
GND
PWM
LVCC
12V
V
Boot
Switch
V
V_VGD
CHL8510
Mode
Unused
Phases
TSEN2
1
R
Th2
Package
Tape & Reel Qty
Part Number
QFN
3000
CHL8326-00CRT1
QFN
3000
CHL8326-xxCRT2
QFN
3000
CHL8328-00CRT1
QFN
3000
CHL8328-xxCRT2
Notes
1 For unprogrammed/default parts, use
configuration file 00. Unprogrammed parts will not
start up until programmed in order to insure a safe
power up.
2 -xx indicates a customer specific configuration file.
T: Tape & Reel
xx: Configuration file
Operating Temperature
C: Commercial
Package type
R : QFN
Part
6: CHL8326
8: CHL8328
TYPICAL APPLICATIONS BLOCK DIAGRAM
ORDERING INFORMATION
CHL832 -
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